Fixed data from/to sd to be on the correct pins on SCSI

sw/include/blacksasi.h

@@ -92,8 +92,8 @@
 
 // SCSI Data Direction
 //BLACKSASI verify dir
-#define SCSI_OUTPUT_IN()        PCREG->BSRR = 0b0000000000000001 << 16 ;
-#define SCSI_OUTPUT_OUT()       PCREG->BSRR = 0b0000000000000001;
+#define SCSI_BUFFERS_IN()        PCREG->BSRR = 0b0000000000000001 << 16 ;
+#define SCSI_BUFFERS_OUT()       PCREG->BSRR = 0b0000000000000001;
 
 // Virtual pin (Arduio compatibility is slow, so make it MCU-dependent)
 #define PA(BIT)       (BIT)

sw/src/main.cpp

@@ -90,10 +90,10 @@ static const uint32_t scsiDbInputOutputPullAnd_PEREG  = 0b0000000000000000010101
 
 
 // Put DB and DP in output mode
-#define SCSI_DB_OUTPUT() { PDREG->MODER = (PDREG->MODER & scsiDbInputOutputAnd_PDREG) | scsiDbOutputRegOr_PDREG; PEREG->MODER = (PEREG->MODER & scsiDbInputOutputAnd_PEREG) | scsiDbOutputRegOr_PEREG; SCSI_OUTPUT_OUT() ;}
+#define SCSI_DB_OUTPUT() { PDREG->MODER = (PDREG->MODER & scsiDbInputOutputAnd_PDREG) | scsiDbOutputRegOr_PDREG; PEREG->MODER = (PEREG->MODER & scsiDbInputOutputAnd_PEREG) | scsiDbOutputRegOr_PEREG; SCSI_BUFFERS_OUT() ;}
 
 // Put DB and DP in input mode
-#define SCSI_DB_INPUT()  { PDREG->MODER = (PDREG->MODER & scsiDbInputOutputAnd_PDREG); PEREG->MODER = (PEREG->MODER & scsiDbInputOutputAnd_PEREG); SCSI_OUTPUT_IN();}
+#define SCSI_DB_INPUT()  { PDREG->MODER = (PDREG->MODER & scsiDbInputOutputAnd_PDREG); PEREG->MODER = (PEREG->MODER & scsiDbInputOutputAnd_PEREG); SCSI_BUFFERS_IN();}
 #define SCSI_SET_PULL()  { PDREG->PUPDR |= scsiDbInputOutputPullAnd_PDREG; PEREG->PUPDR |= scsiDbInputOutputPullAnd_PEREG; }
 
 // BSY,REQ,MSG,CD,IO Turn off output, BSY is the last input
@@ -136,12 +136,14 @@ static uint32_t genBSRR(uint32_t data) {
   // Positions array indicates which bit position each data bit goes in
   // positions[0] is for data bit 0, position[1] for data bit 1, etc
   // DB0, DB1, DB2, DB4, DB5, DB6, DB7 in order
-  uint8_t positions[] = {8UL, 9UL, 10UL, 2UL, 12UL, 13UL, 14UL, 15UL};
+  uint8_t positions[] = {0UL, 1UL, 2UL, 3UL, 4UL, 5UL, 6UL, 7UL};
   uint8_t dbpPosition = 0UL;
   int reqPosition = 6;
   uint8_t bitsAsserted = 0;
 
   uint32_t output = 0x00000000;
+
+  //BLACKSASI should be simplied now
   for (int i = 0; i < 8; i++) {
     if (data & (0x1 << masks[i])) {
       // There's a one in this bit position, BSRR reset
@@ -153,6 +155,7 @@ static uint32_t genBSRR(uint32_t data) {
     }
   }
 
+  //Blacksasi not in same block need to be fixed
   // Set the parity bit
   if (bitsAsserted % 2 == 0) {
     // Even number of bits asserted, Parity asserted (0, low, BSRR reset)
@@ -309,10 +312,10 @@ void setup()
   //Setup GPIO
   gpioInit();
   
-  SCSI_OUTPUT_IN() ;
+  SCSI_BUFFERS_IN() ;
 
   SCSI_SET_PULL();
-  
+
   //Default turn termination off
   TERMINATION_HIGH();
 #if DEBUG > 0
@@ -541,7 +544,7 @@ inline void writeHandshake(byte d)
   // ACK.Fall to REQ.Raise delay 500ns(typ.) (DTC-510B)
    //BLACKSASI NEED TO BE FIXED !!!!
   uint32_t bsrrCall = ((db_bsrr[0xff] & 0xFFBFFFFF) | 0x00000040);
-  GPIOB->regs->BSRR = bsrrCall;  // DB=0xFF , SCSI_OUT(vREQ,inactive)
+  GPIOD->regs->BSRR = bsrrCall;  // DB=0xFF , SCSI_OUT(vREQ,inactive)
   
   // REQ.Raise to DB hold time 0ns
   SCSI_DB_INPUT() // (150ns)