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- #ifndef CFG_TUD_ENDPOINT0_SIZE
- #define CFG_TUD_ENDPOINT0_SIZE 64
- #endif
- #define CFG_TUD_ENABLED 1
- #define CFG_TUD_CDC 2
- #define CFG_TUSB_MCU OPT_MCU_STM32F7
- #define CFG_TUSB_OS OPT_OS_FREERTOS
- #define BOARD_DEVICE_RHPORT_SPEED OPT_MODE_HIGH_SPEED
- #define BOARD_DEVICE_RHPORT_NUM 1
- #define CFG_TUSB_RHPORT1_MODE (OPT_MODE_DEVICE | OPT_MODE_HIGH_SPEED)
- #define CFG_TUD_MSC 1
- #define CFG_TUD_MSC_EP_BUFSIZE 8192
- // CDC FIFO size of TX and RX
- #define CFG_TUD_CDC_RX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
- #define CFG_TUD_CDC_TX_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
- // CDC Endpoint transfer buffer size, more is faster
- #define CFG_TUD_CDC_EP_BUFSIZE (TUD_OPT_HIGH_SPEED ? 512 : 64)
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