Browse Source

Cont. work on new FPGA

Per Mårtensson 4 năm trước cách đây
mục cha
commit
f6d5485e3f
3 tập tin đã thay đổi với 895 bổ sung233 xóa
  1. 292 64
      abc80bus.sch
  2. 541 125
      max80.kicad_pcb
  3. 62 44
      max80.sch

+ 292 - 64
abc80bus.sch

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 Wire Wire Line
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 $EndSCHEMATC

Những thai đổi đã bị hủy bỏ vì nó quá lớn
+ 541 - 125
max80.kicad_pcb


+ 62 - 44
max80.sch

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 $EndComp
 Wire Wire Line
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 Wire Wire Line
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 NoConn ~ 9400 4200
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-NoConn ~ 1650 2700
 NoConn ~ 3900 5850
 NoConn ~ 3900 5950
 NoConn ~ 3900 6050
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 NoConn ~ 3900 6250
 NoConn ~ 3900 6350
 NoConn ~ 3900 6550
-NoConn ~ 3900 6650
 NoConn ~ 3900 6750
 NoConn ~ 3900 6850
 NoConn ~ 3900 6950
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 NoConn ~ 6500 6700
 NoConn ~ 6500 8100
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 FLASH_CS#
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 $EndComp
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 Wire Bus Line
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-	650  1700 650  8000
 Wire Bus Line
 	8700 1800 8700 4000
+Wire Bus Line
+	650  1700 650  8000
 Wire Bus Line
 	9100 5750 9100 8350
 Wire Bus Line

Một số tệp đã không được hiển thị bởi vì quá nhiều tập tin thay đổi trong này khác