spirom: control the spi_sck buffer on the negative edge

There is a race condition between spi_sck_en being set and its input
into the DDR buffer. Fix it by using the half-cycle delayed
spi_sck_en_q.

fpga/spirom.sv

@@ -206,14 +206,6 @@ module spirom (
       .q ( go_spi_s )
       );
 
-   ddio_out spi_clk_buf (
-			 .aclr ( ~rst_n ),
-			 .datain_h ( spi_clk_en ),
-			 .datain_l ( 1'b0 ),
-			 .outclock ( rom_clk ),
-			 .dataout ( spi_sck )
-			 );
-
    always @(negedge rst_n or posedge rom_clk)
      if (~rst_n)
        begin
@@ -300,4 +292,15 @@ module spirom (
 	    spi_cmd <= (spi_cmd << 1) | 1'b1;
        end
 
+   //
+   // SPI_SCK output buffer
+   //
+   ddio_out spi_clk_buf (
+			 .aclr ( ~rst_n ),
+			 .datain_h ( spi_clk_en_q ),
+			 .datain_l ( 1'b0 ),
+			 .outclock ( rom_clk ),
+			 .dataout ( spi_sck )
+			 );
+
 endmodule // spirom