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sdram: make it a little clearer what the equation actually is

Use logical operators to avoid confusion.
No change in synthesis result.
H. Peter Anvin 3 lat temu
rodzic
commit
0b53a475f8
3 zmienionych plików z 3 dodań i 3 usunięć
  1. 2 2
      output_files/max80.jam
  2. BIN
      output_files/max80.sof
  3. 1 1
      sdram.sv

+ 2 - 2
output_files/max80.jam

@@ -13,7 +13,7 @@
 'refer to the applicable agreement for further details, at
 'https://fpgasoftware.intel.com/eula.
 
-'Device #1: EP4CE15 - /home/hpa/abc80/max80/blinktest/output_files/max80.sof Sun Sep  5 22:11:54 2021
+'Device #1: EP4CE15 - /home/hpa/abc80/max80/blinktest/output_files/max80.sof Sun Sep  5 22:21:35 2021
 
 
 NOTE "CREATOR" "QUARTUS PRIME JAM COMPOSER 20.1";
@@ -2439,4 +2439,4 @@ NEXT j;
 POP j;
 ENDPROC;
 ' END OF FILE
-CRC A0A5;
+CRC 6D2B;

BIN
output_files/max80.sof


+ 1 - 1
sdram.sv

@@ -277,7 +277,7 @@ module sdram (
 
 	  dram_d_en     <= 1'b1; // Don't float except during read
 
-	  if (state == st_reset | state == st_idle)
+	  if (state == st_reset || state == st_idle)
 	    op_cycle <= 1'b1;	// == 0 + 1
 	  else
 	    op_cycle <= op_cycle + 1'b1;