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video: revert to outputting "real" data on the HDMI channels

From the logic simulation it looks like we ought to get valid data on
the HDMI channel outputs now, but do we?
H. Peter Anvin 3 年之前
父節點
當前提交
0b53cefc85
共有 5 個文件被更改,包括 3 次插入8 次删除
  1. 二進制
      fpga/output_files/max80.jbc
  2. 二進制
      fpga/output_files/max80.jic
  3. 二進制
      fpga/output_files/max80.pof
  4. 二進制
      fpga/output_files/max80.sof
  5. 3 8
      fpga/video.sv

二進制
fpga/output_files/max80.jbc


二進制
fpga/output_files/max80.jic


二進制
fpga/output_files/max80.pof


二進制
fpga/output_files/max80.sof


+ 3 - 8
fpga/video.sv

@@ -82,14 +82,9 @@ module video (
        end // else: !if(~rst_n)
 
    wire [7:0] hdmi_data[0:2];
-   //assign hdmi_data[2] = r;
-   //assign hdmi_data[1] = g;
-   //assign hdmi_data[0] = b;
-   //assign hdmi_data[2] = 8'b11110000;
-   //assign hdmi_data[1] = 8'b11001100;
-   assign hdmi_data[2] = 8'b10101010;
-   assign hdmi_data[1] = 8'b10101010;
-   assign hdmi_data[0] = 8'b10101010;
+   assign hdmi_data[2] = r;
+   assign hdmi_data[1] = g;
+   assign hdmi_data[0] = b;
 
    wire [1:0] hdmi_ctl[0:2];
    assign hdmi_ctl[0]      = { vsync, hsync };