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@@ -2,6 +2,7 @@
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#define DEBUG 1
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#include "common.h"
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+#include "pins.h"
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#include "spiflash.h"
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#include "spz.h"
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#include "fw.h"
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@@ -14,10 +15,10 @@
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static const struct jtag_config jtag_config_spiflash = {
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.hz = JTAG_SPIFLASH_HZ,
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- .pin_tms = 10, /* CS# */
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- .pin_tdi = 12, /* MOSI */
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- .pin_tdo = 13, /* MISO */
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- .pin_tck = 11, /* SCLK */
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+ .pin_tms = PIN_BYPASS_CS, /* CS# */
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+ .pin_tdi = PIN_BYPASS_MOSI, /* MOSI */
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+ .pin_tdo = PIN_BYPASS_MISO, /* MISO */
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+ .pin_tck = PIN_BYPASS_CLK, /* SCLK */
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.be = true /* Bit order within bytes */
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};
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@@ -334,9 +335,6 @@ static void spiflash_show_status(void)
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spiflash_read_status(ROM_READ_SR3));
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}
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-#define PIN_FPGA_READY 9
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-#define PIN_FPGA_BOARD_ID 1
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-
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/* Set data and data_len if the data to be written is not from the spz */
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int spiflash_write_spz(spz_stream *spz,
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const void *data, unsigned int data_left)
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@@ -351,19 +349,19 @@ int spiflash_write_spz(spz_stream *spz,
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if (!data_left || spz->err)
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return spz->err;
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- pinMode(PIN_FPGA_READY, INPUT);
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- pinMode(PIN_FPGA_BOARD_ID, INPUT);
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+ pinMode(PIN_BYPASS_READY, INPUT);
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+ pinMode(PIN_BYPASS_BOARD_ID, INPUT);
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- if (digitalRead(PIN_FPGA_READY) == LOW) {
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+ if (digitalRead(PIN_BYPASS_READY) == LOW) {
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MSG("waiting for FPGA bypass to be ready..");
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- while (digitalRead(PIN_FPGA_READY) != LOW) {
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+ while (digitalRead(PIN_BYPASS_READY) != LOW) {
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CMSG(".");
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yield();
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}
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CMSG("\n");
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}
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MSG("FPGA bypass ready, board version v%c.\n",
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- digitalRead(PIN_FPGA_BOARD_ID) ? '1' : '2');
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+ digitalRead(PIN_BYPASS_BOARD_ID) ? '1' : '2');
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jtag_enable(&jtag_config_spiflash);
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