|
@@ -355,7 +355,7 @@ module max80
|
|
.rst_n ( rst_n ),
|
|
.rst_n ( rst_n ),
|
|
.clk ( sdram_clk ), // Internal memory clock
|
|
.clk ( sdram_clk ), // Internal memory clock
|
|
.init_tmr ( sys_clk_stb[14] ), // > 100 μs (tP) after reset
|
|
.init_tmr ( sys_clk_stb[14] ), // > 100 μs (tP) after reset
|
|
- .rfsh_tmr ( sys_clk_stb[8] ), // < 3.9 μs (tREFI/2)
|
|
|
|
|
|
+ .rfsh_tmr ( sys_clk_stb[6] ), // < 3.9 μs (tREFI/2)
|
|
|
|
|
|
.sr_cs_n ( sr_cs_n ),
|
|
.sr_cs_n ( sr_cs_n ),
|
|
.sr_ras_n ( sr_ras_n ),
|
|
.sr_ras_n ( sr_ras_n ),
|