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Update and recompile with Quartus 23.1

H. Peter Anvin 2 달 전
부모
커밋
50196d02b0
12개의 변경된 파일2개의 추가작업 그리고 2개의 파일을 삭제
  1. BIN
      esp32/output/max80.ino.bin
  2. 1 1
      fpga/Makefile
  3. BIN
      fpga/output/bypass.jic
  4. BIN
      fpga/output/bypass.sof
  5. BIN
      fpga/output/max80.fw
  6. BIN
      fpga/output/v1.fw
  7. BIN
      fpga/output/v1.jic
  8. BIN
      fpga/output/v1.sof
  9. BIN
      fpga/output/v2.fw
  10. BIN
      fpga/output/v2.jic
  11. BIN
      fpga/output/v2.sof
  12. 1 1
      rv32/checksum.h

BIN
esp32/output/max80.ino.bin


+ 1 - 1
fpga/Makefile

@@ -39,7 +39,7 @@ PREREQFILES = $(mifdir)/sram.mif \
 		$(outdir)/$(rev).$(coffmt).cof))
 
 alltarg := sof pof jic svf svf.gz xsvf xsvf.gz rbf rbf.gz rpf rpf.gz \
-	   rpd rpd.gz pow.rpt sta.rpt
+	   rpd rpd.gz sta.rpt # pow.rpt
 allout   = $(foreach o,$(alltarg),$(outdir)/$(1).$(o))
 #vartarg := sof svf svf.gz rbf rbf.gz
 #varout   = $(foreach o,$(vartarg),$(outdir)/$(1).$(o))

BIN
fpga/output/bypass.jic


BIN
fpga/output/bypass.sof


BIN
fpga/output/max80.fw


BIN
fpga/output/v1.fw


BIN
fpga/output/v1.jic


BIN
fpga/output/v1.sof


BIN
fpga/output/v2.fw


BIN
fpga/output/v2.jic


BIN
fpga/output/v2.sof


+ 1 - 1
rv32/checksum.h

@@ -1,4 +1,4 @@
 #ifndef CHECKSUM_H
 #define CHECKSUM_H
-#define SDRAM_SUM 0xcdd99e87
+#define SDRAM_SUM 0xcdd83687
 #endif