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@@ -3,53 +3,7 @@
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#include "compiler.h"
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#include "compiler.h"
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#include "iodevs.h"
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#include "iodevs.h"
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-
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+#include "iodeva.h"
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-/* Address for I/O device d, subregister r, offset o */
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-#define IODEVA(b,r,o) ((b ## _BASE)+((r) << 2)+(o))
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-
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-#ifdef __ASSEMBLY__
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-
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-/*
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- * The I/O device range is designed so that it can be addressed via
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- * negative offsets from the zero register, so no explicit base
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- * pointer register is necesary.
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- */
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-#define IODEVV(d,r) IODEVA(d,r,0)(zero)
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-#define IODEVB(d,r) IODEVV(d,r,0)
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-#define IODEVH(d,r) IODEVV(d,r,0)
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-#define IODEVL(d,r) IODEVV(d,r,0)
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-
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-#define PTR(x) x
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-
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-#else
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-
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-/* Writable registers */
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-#define IODEVV(d,r) (*(volatile void *)IODEVA(d,r,0))
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-#define IODEVB(d,r) (*(volatile uint8_t *)IODEVA(d,r,0))
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-#define IODEVB0(d,r) (*(volatile uint8_t *)IODEVA(d,r,0))
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-#define IODEVB1(d,r) (*(volatile uint8_t *)IODEVA(d,r,1))
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-#define IODEVB2(d,r) (*(volatile uint8_t *)IODEVA(d,r,2))
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-#define IODEVB3(d,r) (*(volatile uint8_t *)IODEVA(d,r,3))
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-#define IODEVH(d,r) (*(volatile uint16_t *)IODEVA(d,r,0))
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-#define IODEVH0(d,r) (*(volatile uint16_t *)IODEVA(d,r,0))
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-#define IODEVH1(d,r) (*(volatile uint16_t *)IODEVA(d,r,2))
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-#define IODEVL(d,r) (*(volatile uint32_t *)IODEVA(d,r,0))
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-
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-/* Readonly registers */
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-#define IODEVRV(d,r) (*(const volatile void *)IODEVA(d,r,0))
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-#define IODEVRB(d,r) (*(const volatile uint8_t *)IODEVA(d,r,0))
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-#define IODEVRB0(d,r) (*(const volatile uint8_t *)IODEVA(d,r,0))
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-#define IODEVRB1(d,r) (*(const volatile uint8_t *)IODEVA(d,r,1))
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-#define IODEVRB2(d,r) (*(const volatile uint8_t *)IODEVA(d,r,2))
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-#define IODEVRB3(d,r) (*(const volatile uint8_t *)IODEVA(d,r,3))
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-#define IODEVRH(d,r) (*(const volatile uint16_t *)IODEVA(d,r,0))
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-#define IODEVRH0(d,r) (*(const volatile uint16_t *)IODEVA(d,r,0))
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-#define IODEVRH1(d,r) (*(const volatile uint16_t *)IODEVA(d,r,2))
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-#define IODEVRL(d,r) (*(const volatile uint32_t *)IODEVA(d,r,0))
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-
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-#define PTR(x) (&(x))
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-
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-#endif
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#define CPU_HZ 84000000
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#define CPU_HZ 84000000
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#define TIMER_HZ (1 << TIMER_SHIFT)
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#define TIMER_HZ (1 << TIMER_SHIFT)
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@@ -79,6 +33,7 @@
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#define ROMCOPY_INPUT IODEVRL(ROMCOPY,4)
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#define ROMCOPY_INPUT IODEVRL(ROMCOPY,4)
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#define ROMCOPY_STATUS_DONE 1
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#define ROMCOPY_STATUS_DONE 1
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+/* n = 0...7 */
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#define TTY_DATA(n) IODEVB(TTY,0+((n) << 2))
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#define TTY_DATA(n) IODEVB(TTY,0+((n) << 2))
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#define TTY_WATERCTL(n) IODEVH0(TTY,1+((n) << 2))
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#define TTY_WATERCTL(n) IODEVH0(TTY,1+((n) << 2))
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#define TTY_WATERCTL_TX_LOW(x) ((x) << 0)
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#define TTY_WATERCTL_TX_LOW(x) ((x) << 0)
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@@ -174,7 +129,10 @@
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#define ABC_INP1_DATA IODEVB1(ABC,5)
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#define ABC_INP1_DATA IODEVB1(ABC,5)
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#define ABC_INP_ENABLE IODEVB2(ABC,5)
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#define ABC_INP_ENABLE IODEVB2(ABC,5)
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+/* n = 0 ... 511 */
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#define ABCMEMMAP_PAGE(n) IODEVL(ABCMEMMAP,n)
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#define ABCMEMMAP_PAGE(n) IODEVL(ABCMEMMAP,n)
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+
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+/* n = 0 ... 255 */
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#define ABCMEMMAP_WRPORT(n) IODEVL(ABCMEMMAP,128+((n) << 1))
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#define ABCMEMMAP_WRPORT(n) IODEVL(ABCMEMMAP,128+((n) << 1))
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#define ABCMEMMAP_RDPORT(n) IODEVL(ABCMEMMAP,129+((n) << 1))
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#define ABCMEMMAP_RDPORT(n) IODEVL(ABCMEMMAP,129+((n) << 1))
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#define ABCMEMMAP_WRCOUNT(n) IODEVL(ABCMEMMAP,384+((n) << 1))
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#define ABCMEMMAP_WRCOUNT(n) IODEVL(ABCMEMMAP,384+((n) << 1))
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