Create separate scripts for each phase

Create a simple script to automatically spawn a script file for any
particular phase of compilation, if and only if it actually exists.

max80.qsf

@@ -283,7 +283,12 @@ set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
 set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 3.3V
 
 set_global_assignment -name RESERVE_ALL_UNUSED_PINS_WEAK_PULLUP "AS OUTPUT DRIVING GROUND"
-set_global_assignment -name TCL_SCRIPT_FILE max80jic.tcl
+set_global_assignment -name POST_MODULE_SCRIPT_FILE "quartus_sh:postmodule.tcl"
+
+
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name TCL_SCRIPT_FILE post_quartus_asm.tcl
+set_global_assignment -name TCL_SCRIPT_FILE postmodule.tcl
 set_global_assignment -name SOURCE_FILE max80jic.cof
 set_global_assignment -name VERILOG_FILE ip/hdmitx.v
 set_global_assignment -name VERILOG_FILE ip/pll.v
@@ -291,7 +296,4 @@ set_global_assignment -name SYSTEMVERILOG_FILE transpose.sv
 set_global_assignment -name SYSTEMVERILOG_FILE syncho.sv
 set_global_assignment -name SYSTEMVERILOG_FILE tmdsenc.sv
 set_global_assignment -name SDC_FILE max80.sdc
-set_global_assignment -name SYSTEMVERILOG_FILE max80.sv
-set_global_assignment -name POST_FLOW_SCRIPT_FILE "quartus_sh:max80jic.tcl"
-
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
+set_global_assignment -name SYSTEMVERILOG_FILE max80.sv

output_files/max80.asm.rpt

@@ -1,5 +1,5 @@
 Assembler report for max80
-Fri Aug  6 19:23:59 2021
+Fri Aug  6 19:38:14 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -41,7 +41,7 @@ https://fpgasoftware.intel.com/eula.
 +---------------------------------------------------------------+
 ; Assembler Summary                                             ;
 +-----------------------+---------------------------------------+
-; Assembler Status      ; Successful - Fri Aug  6 19:23:59 2021 ;
+; Assembler Status      ; Successful - Fri Aug  6 19:38:14 2021 ;
 ; Revision Name         ; max80                                 ;
 ; Top-level Entity Name ; max80                                 ;
 ; Family                ; Cyclone IV E                          ;
@@ -113,7 +113,7 @@ https://fpgasoftware.intel.com/eula.
 Info: *******************************************************************
 Info: Running Quartus Prime Assembler
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:23:57 2021
+    Info: Processing started: Fri Aug  6 19:38:12 2021
 Info: Command: quartus_asm --lower_priority --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (115031): Writing out detailed assembly data for power analysis
@@ -123,9 +123,9 @@ Device 1 (EP4CE15F17; /home/hpa/abc80/max80/blinktest/output_files/max80.sof)
 Info (210117): Created JAM or JBC file for the specified chain: 
 Device 1 (EP4CE15F17; /home/hpa/abc80/max80/blinktest/output_files/max80.sof)
 Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
-    Info: Peak virtual memory: 568 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:00 2021
-    Info: Elapsed time: 00:00:03
+    Info: Peak virtual memory: 569 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:14 2021
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:02
 
 

output_files/max80.cmp.rpt

@@ -1,5 +1,5 @@
 Compilation report for max80
-Fri Aug  6 19:24:04 2021
+Fri Aug  6 19:38:21 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -211,7 +211,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Flow Summary                                                                     ;
 +------------------------------------+---------------------------------------------+
-; Flow Status                        ; Successful - Fri Aug  6 19:24:04 2021       ;
+; Flow Status                        ; Successful - Fri Aug  6 19:38:21 2021       ;
 ; Quartus Prime Version              ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -235,7 +235,7 @@ https://fpgasoftware.intel.com/eula.
 +-------------------+---------------------+
 ; Option            ; Setting             ;
 +-------------------+---------------------+
-; Start date & time ; 08/06/2021 19:23:45 ;
+; Start date & time ; 08/06/2021 19:37:59 ;
 ; Main task         ; Compilation         ;
 ; Revision Name     ; max80               ;
 +-------------------+---------------------+
@@ -246,7 +246,7 @@ https://fpgasoftware.intel.com/eula.
 +--------------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
 ; Assignment Name                            ; Value                                  ; Default Value ; Entity Name ; Section Id                        ;
 +--------------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
-; COMPILER_SIGNATURE_ID                      ; 108036541379687.162830302549278        ; --            ; --          ; --                                ;
+; COMPILER_SIGNATURE_ID                      ; 64552973467468.162830387951874         ; --            ; --          ; --                                ;
 ; EDA_ENABLE_GLITCH_FILTERING                ; On                                     ; --            ; --          ; eda_simulation                    ;
 ; EDA_GENERATE_FUNCTIONAL_NETLIST            ; Off                                    ; --            ; --          ; eda_board_design_timing           ;
 ; EDA_GENERATE_FUNCTIONAL_NETLIST            ; Off                                    ; --            ; --          ; eda_board_design_boundary_scan    ;
@@ -278,7 +278,7 @@ https://fpgasoftware.intel.com/eula.
 ; PARTITION_COLOR                            ; -- (Not supported for targeted family) ; --            ; --          ; Top                               ;
 ; PARTITION_FITTER_PRESERVATION_LEVEL        ; -- (Not supported for targeted family) ; --            ; --          ; Top                               ;
 ; PARTITION_NETLIST_TYPE                     ; -- (Not supported for targeted family) ; --            ; --          ; Top                               ;
-; POST_FLOW_SCRIPT_FILE                      ; quartus_sh:max80jic.tcl                ; --            ; --          ; --                                ;
+; POST_MODULE_SCRIPT_FILE                    ; quartus_sh:postmodule.tcl              ; --            ; --          ; --                                ;
 ; POWER_BOARD_THERMAL_MODEL                  ; None (CONSERVATIVE)                    ; --            ; --          ; --                                ;
 ; POWER_DEFAULT_INPUT_IO_TOGGLE_RATE         ; 12.5 %                                 ; 12.5%         ; --          ; --                                ;
 ; POWER_PRESET_COOLING_SOLUTION              ; No Heat Sink With Still Air            ; --            ; --          ; --                                ;
@@ -300,13 +300,13 @@ https://fpgasoftware.intel.com/eula.
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
 ; Module Name          ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis ; 00:00:05     ; 1.0                     ; 711 MB              ; 00:00:16                           ;
-; Fitter               ; 00:00:05     ; 1.0                     ; 1522 MB             ; 00:00:07                           ;
-; Assembler            ; 00:00:02     ; 1.0                     ; 568 MB              ; 00:00:02                           ;
-; Power Analyzer       ; 00:00:01     ; 1.0                     ; 1022 MB             ; 00:00:01                           ;
-; Timing Analyzer      ; 00:00:01     ; 1.1                     ; 729 MB              ; 00:00:01                           ;
+; Analysis & Synthesis ; 00:00:05     ; 1.0                     ; 678 MB              ; 00:00:15                           ;
+; Fitter               ; 00:00:06     ; 1.0                     ; 1524 MB             ; 00:00:07                           ;
+; Assembler            ; 00:00:02     ; 1.0                     ; 569 MB              ; 00:00:02                           ;
+; Power Analyzer       ; 00:00:01     ; 1.0                     ; 1020 MB             ; 00:00:01                           ;
+; Timing Analyzer      ; 00:00:01     ; 1.1                     ; 736 MB              ; 00:00:01                           ;
 ; EDA Netlist Writer   ; 00:00:01     ; 1.0                     ; 813 MB              ; 00:00:00                           ;
-; Total                ; 00:00:15     ; --                      ; --                  ; 00:00:27                           ;
+; Total                ; 00:00:16     ; --                      ; --                  ; 00:00:26                           ;
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
 
 
@@ -339,7 +339,7 @@ quartus_eda --lower_priority --read_settings_files=off --write_settings_files=of
 +----------------------------------------------------------------------------------+
 ; Analysis & Synthesis Summary                                                     ;
 +------------------------------------+---------------------------------------------+
-; Analysis & Synthesis Status        ; Successful - Fri Aug  6 19:23:50 2021       ;
+; Analysis & Synthesis Status        ; Successful - Fri Aug  6 19:38:04 2021       ;
 ; Quartus Prime Version              ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -457,8 +457,7 @@ quartus_eda --lower_priority --read_settings_files=off --write_settings_files=of
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   0.0%      ;
-;     Processors 3-8         ;   0.0%      ;
+;     Processors 2-8         ;   0.0%      ;
 +----------------------------+-------------+
 
 
@@ -1372,7 +1371,7 @@ The equations can be found in /home/hpa/abc80/max80/blinktest/output_files/max80
 Info: *******************************************************************
 Info: Running Quartus Prime Analysis & Synthesis
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:23:45 2021
+    Info: Processing started: Fri Aug  6 19:37:59 2021
 Info: Command: quartus_map --lower_priority --read_settings_files=on --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (20030): Parallel compilation is enabled and will use 8 of the 8 processors detected
@@ -1797,16 +1796,16 @@ Info (21057): Implemented 485 device resources after synthesis - the final resou
     Info (21061): Implemented 340 logic cells
     Info (21065): Implemented 2 PLLs
 Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 217 warnings
-    Info: Peak virtual memory: 711 megabytes
-    Info: Processing ended: Fri Aug  6 19:23:51 2021
-    Info: Elapsed time: 00:00:06
-    Info: Total CPU time (on all processors): 00:00:16
+    Info: Peak virtual memory: 678 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:04 2021
+    Info: Elapsed time: 00:00:05
+    Info: Total CPU time (on all processors): 00:00:15
 
 
 +----------------------------------------------------------------------------------+
 ; Fitter Summary                                                                   ;
 +------------------------------------+---------------------------------------------+
-; Fitter Status                      ; Successful - Fri Aug  6 19:23:56 2021       ;
+; Fitter Status                      ; Successful - Fri Aug  6 19:38:11 2021       ;
 ; Quartus Prime Version              ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -3825,8 +3824,8 @@ Warning (169064): Following 52 pins have no output enable or a GND or VCC output
     Info (169065): Pin hdmi_hpd has a permanently disabled output enable File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 114
 Info (144001): Generated suppressed messages file /home/hpa/abc80/max80/blinktest/output_files/max80.fit.smsg
 Info: Quartus Prime Fitter was successful. 0 errors, 29 warnings
-    Info: Peak virtual memory: 1522 megabytes
-    Info: Processing ended: Fri Aug  6 19:23:57 2021
+    Info: Peak virtual memory: 1524 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:11 2021
     Info: Elapsed time: 00:00:06
     Info: Total CPU time (on all processors): 00:00:07
 
@@ -3840,7 +3839,7 @@ The suppressed messages can be found in /home/hpa/abc80/max80/blinktest/output_f
 +---------------------------------------------------------------+
 ; Assembler Summary                                             ;
 +-----------------------+---------------------------------------+
-; Assembler Status      ; Successful - Fri Aug  6 19:23:59 2021 ;
+; Assembler Status      ; Successful - Fri Aug  6 19:38:14 2021 ;
 ; Revision Name         ; max80                                 ;
 ; Top-level Entity Name ; max80                                 ;
 ; Family                ; Cyclone IV E                          ;
@@ -3912,7 +3911,7 @@ The suppressed messages can be found in /home/hpa/abc80/max80/blinktest/output_f
 Info: *******************************************************************
 Info: Running Quartus Prime Assembler
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:23:57 2021
+    Info: Processing started: Fri Aug  6 19:38:12 2021
 Info: Command: quartus_asm --lower_priority --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (115031): Writing out detailed assembly data for power analysis
@@ -3922,9 +3921,9 @@ Device 1 (EP4CE15F17; /home/hpa/abc80/max80/blinktest/output_files/max80.sof)
 Info (210117): Created JAM or JBC file for the specified chain: 
 Device 1 (EP4CE15F17; /home/hpa/abc80/max80/blinktest/output_files/max80.sof)
 Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
-    Info: Peak virtual memory: 568 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:00 2021
-    Info: Elapsed time: 00:00:03
+    Info: Peak virtual memory: 569 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:14 2021
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:02
 
 
@@ -3936,19 +3935,19 @@ Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
 ; Number detected on machine ; 16          ;
 ; Maximum allowed            ; 8           ;
 ;                            ;             ;
-; Average used               ; 1.05        ;
+; Average used               ; 1.04        ;
 ; Maximum used               ; 8           ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processors 2-8         ;   0.7%      ;
+;     Processors 2-8         ;   0.6%      ;
 +----------------------------+-------------+
 
 
 +-------------------------------------------------------------------------------------------+
 ; Power Analyzer Summary                                                                    ;
 +----------------------------------------+--------------------------------------------------+
-; Power Analyzer Status                  ; Successful - Fri Aug  6 19:24:01 2021            ;
+; Power Analyzer Status                  ; Successful - Fri Aug  6 19:38:17 2021            ;
 ; Quartus Prime Version                  ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition      ;
 ; Revision Name                          ; max80                                            ;
 ; Top-level Entity Name                  ; max80                                            ;
@@ -4275,7 +4274,7 @@ Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
 Info: *******************************************************************
 Info: Running Quartus Prime Power Analyzer
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:24:00 2021
+    Info: Processing started: Fri Aug  6 19:38:16 2021
 Info: Command: quartus_pow --lower_priority --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (21077): Low junction temperature is 0 degrees C
@@ -4316,9 +4315,9 @@ Info (334004): Delay annotation completed successfully
 Info (215049): Average toggle rate for this design is 10.833 millions of transitions / sec
 Info (215031): Total thermal power estimate for the design is 217.59 mW
 Info: Quartus Prime Power Analyzer was successful. 0 errors, 11 warnings
-    Info: Peak virtual memory: 1022 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:01 2021
-    Info: Elapsed time: 00:00:01
+    Info: Peak virtual memory: 1020 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:18 2021
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:01
 
 
@@ -4364,12 +4363,12 @@ https://fpgasoftware.intel.com/eula.
 ; Number detected on machine ; 16          ;
 ; Maximum allowed            ; 8           ;
 ;                            ;             ;
-; Average used               ; 1.06        ;
+; Average used               ; 1.05        ;
 ; Maximum used               ; 8           ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   1.4%      ;
+;     Processor 2            ;   1.1%      ;
 ;     Processors 3-8         ;   0.7%      ;
 +----------------------------+-------------+
 
@@ -4379,7 +4378,7 @@ https://fpgasoftware.intel.com/eula.
 +---------------+--------+--------------------------+
 ; SDC File Path ; Status ; Read at                  ;
 +---------------+--------+--------------------------+
-; max80.sdc     ; OK     ; Fri Aug  6 19:24:02 2021 ;
+; max80.sdc     ; OK     ; Fri Aug  6 19:38:19 2021 ;
 +---------------+--------+--------------------------+
 
 
@@ -7487,7 +7486,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 Info: *******************************************************************
 Info: Running Quartus Prime Timing Analyzer
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:24:02 2021
+    Info: Processing started: Fri Aug  6 19:38:18 2021
 Info: Command: quartus_sta --lower_priority max80 -c max80
 Info: qsta_default_script.tcl version: #1
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -7609,16 +7608,16 @@ Info (332146): Worst-case minimum pulse width slack is 2.563
 Info (332102): Design is not fully constrained for setup requirements
 Info (332102): Design is not fully constrained for hold requirements
 Info: Quartus Prime Timing Analyzer was successful. 0 errors, 10 warnings
-    Info: Peak virtual memory: 729 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:03 2021
-    Info: Elapsed time: 00:00:01
+    Info: Peak virtual memory: 736 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:20 2021
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:01
 
 
 +-------------------------------------------------------------------+
 ; EDA Netlist Writer Summary                                        ;
 +---------------------------+---------------------------------------+
-; EDA Netlist Writer Status ; Successful - Fri Aug  6 19:24:04 2021 ;
+; EDA Netlist Writer Status ; Successful - Fri Aug  6 19:38:21 2021 ;
 ; Revision Name             ; max80                                 ;
 ; Top-level Entity Name     ; max80                                 ;
 ; Family                    ; Cyclone IV E                          ;
@@ -7665,14 +7664,14 @@ Info: Quartus Prime Timing Analyzer was successful. 0 errors, 10 warnings
 Info: *******************************************************************
 Info: Running Quartus Prime EDA Netlist Writer
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:24:03 2021
+    Info: Processing started: Fri Aug  6 19:38:20 2021
 Info: Command: quartus_eda --lower_priority --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (204019): Generated file max80.vo in folder "/home/hpa/abc80/max80/blinktest/simulation/modelsim/" for EDA simulation tool
 Info (204020): Writing VCD Dump Commands for all nodes to /home/hpa/abc80/max80/blinktest/simulation/modelsim/max80_dump_all_vcd_nodes.tcl
 Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
     Info: Peak virtual memory: 816 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:04 2021
+    Info: Processing ended: Fri Aug  6 19:38:21 2021
     Info: Elapsed time: 00:00:01
     Info: Total CPU time (on all processors): 00:00:00
 

output_files/max80.done

@@ -1 +1 @@
-Fri Aug  6 19:24:06 2021
+Fri Aug  6 19:38:21 2021

output_files/max80.eda.rpt

@@ -1,5 +1,5 @@
 EDA Netlist Writer report for max80
-Fri Aug  6 19:24:04 2021
+Fri Aug  6 19:38:21 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -37,7 +37,7 @@ https://fpgasoftware.intel.com/eula.
 +-------------------------------------------------------------------+
 ; EDA Netlist Writer Summary                                        ;
 +---------------------------+---------------------------------------+
-; EDA Netlist Writer Status ; Successful - Fri Aug  6 19:24:04 2021 ;
+; EDA Netlist Writer Status ; Successful - Fri Aug  6 19:38:21 2021 ;
 ; Revision Name             ; max80                                 ;
 ; Top-level Entity Name     ; max80                                 ;
 ; Family                    ; Cyclone IV E                          ;
@@ -84,14 +84,14 @@ https://fpgasoftware.intel.com/eula.
 Info: *******************************************************************
 Info: Running Quartus Prime EDA Netlist Writer
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:24:03 2021
+    Info: Processing started: Fri Aug  6 19:38:20 2021
 Info: Command: quartus_eda --lower_priority --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (204019): Generated file max80.vo in folder "/home/hpa/abc80/max80/blinktest/simulation/modelsim/" for EDA simulation tool
 Info (204020): Writing VCD Dump Commands for all nodes to /home/hpa/abc80/max80/blinktest/simulation/modelsim/max80_dump_all_vcd_nodes.tcl
 Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
     Info: Peak virtual memory: 816 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:04 2021
+    Info: Processing ended: Fri Aug  6 19:38:21 2021
     Info: Elapsed time: 00:00:01
     Info: Total CPU time (on all processors): 00:00:00
 

output_files/max80.fit.rpt

@@ -1,5 +1,5 @@
 Fitter report for max80
-Fri Aug  6 19:23:56 2021
+Fri Aug  6 19:38:11 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -74,7 +74,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Fitter Summary                                                                   ;
 +------------------------------------+---------------------------------------------+
-; Fitter Status                      ; Successful - Fri Aug  6 19:23:56 2021       ;
+; Fitter Status                      ; Successful - Fri Aug  6 19:38:11 2021       ;
 ; Quartus Prime Version              ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -2093,8 +2093,8 @@ Warning (169064): Following 52 pins have no output enable or a GND or VCC output
     Info (169065): Pin hdmi_hpd has a permanently disabled output enable File: /home/hpa/abc80/max80/blinktest/max80.sv Line: 114
 Info (144001): Generated suppressed messages file /home/hpa/abc80/max80/blinktest/output_files/max80.fit.smsg
 Info: Quartus Prime Fitter was successful. 0 errors, 29 warnings
-    Info: Peak virtual memory: 1522 megabytes
-    Info: Processing ended: Fri Aug  6 19:23:57 2021
+    Info: Peak virtual memory: 1524 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:11 2021
     Info: Elapsed time: 00:00:06
     Info: Total CPU time (on all processors): 00:00:07
 

output_files/max80.fit.summary

@@ -1,4 +1,4 @@
-Fitter Status : Successful - Fri Aug  6 19:23:56 2021
+Fitter Status : Successful - Fri Aug  6 19:38:11 2021
 Quartus Prime Version : 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 Revision Name : max80
 Top-level Entity Name : max80

output_files/max80.flow.rpt

@@ -1,5 +1,5 @@
 Flow report for max80
-Fri Aug  6 19:24:04 2021
+Fri Aug  6 19:38:21 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -41,7 +41,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Flow Summary                                                                     ;
 +------------------------------------+---------------------------------------------+
-; Flow Status                        ; Successful - Fri Aug  6 19:24:04 2021       ;
+; Flow Status                        ; Successful - Fri Aug  6 19:38:21 2021       ;
 ; Quartus Prime Version              ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -65,7 +65,7 @@ https://fpgasoftware.intel.com/eula.
 +-------------------+---------------------+
 ; Option            ; Setting             ;
 +-------------------+---------------------+
-; Start date & time ; 08/06/2021 19:23:45 ;
+; Start date & time ; 08/06/2021 19:37:59 ;
 ; Main task         ; Compilation         ;
 ; Revision Name     ; max80               ;
 +-------------------+---------------------+
@@ -76,7 +76,7 @@ https://fpgasoftware.intel.com/eula.
 +--------------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
 ; Assignment Name                            ; Value                                  ; Default Value ; Entity Name ; Section Id                        ;
 +--------------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
-; COMPILER_SIGNATURE_ID                      ; 108036541379687.162830302549278        ; --            ; --          ; --                                ;
+; COMPILER_SIGNATURE_ID                      ; 64552973467468.162830387951874         ; --            ; --          ; --                                ;
 ; EDA_ENABLE_GLITCH_FILTERING                ; On                                     ; --            ; --          ; eda_simulation                    ;
 ; EDA_GENERATE_FUNCTIONAL_NETLIST            ; Off                                    ; --            ; --          ; eda_board_design_timing           ;
 ; EDA_GENERATE_FUNCTIONAL_NETLIST            ; Off                                    ; --            ; --          ; eda_board_design_boundary_scan    ;
@@ -108,7 +108,7 @@ https://fpgasoftware.intel.com/eula.
 ; PARTITION_COLOR                            ; -- (Not supported for targeted family) ; --            ; --          ; Top                               ;
 ; PARTITION_FITTER_PRESERVATION_LEVEL        ; -- (Not supported for targeted family) ; --            ; --          ; Top                               ;
 ; PARTITION_NETLIST_TYPE                     ; -- (Not supported for targeted family) ; --            ; --          ; Top                               ;
-; POST_FLOW_SCRIPT_FILE                      ; quartus_sh:max80jic.tcl                ; --            ; --          ; --                                ;
+; POST_MODULE_SCRIPT_FILE                    ; quartus_sh:postmodule.tcl              ; --            ; --          ; --                                ;
 ; POWER_BOARD_THERMAL_MODEL                  ; None (CONSERVATIVE)                    ; --            ; --          ; --                                ;
 ; POWER_DEFAULT_INPUT_IO_TOGGLE_RATE         ; 12.5 %                                 ; 12.5%         ; --          ; --                                ;
 ; POWER_PRESET_COOLING_SOLUTION              ; No Heat Sink With Still Air            ; --            ; --          ; --                                ;
@@ -130,13 +130,13 @@ https://fpgasoftware.intel.com/eula.
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
 ; Module Name          ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
-; Analysis & Synthesis ; 00:00:05     ; 1.0                     ; 711 MB              ; 00:00:16                           ;
-; Fitter               ; 00:00:05     ; 1.0                     ; 1522 MB             ; 00:00:07                           ;
-; Assembler            ; 00:00:02     ; 1.0                     ; 568 MB              ; 00:00:02                           ;
-; Power Analyzer       ; 00:00:01     ; 1.0                     ; 1022 MB             ; 00:00:01                           ;
-; Timing Analyzer      ; 00:00:01     ; 1.1                     ; 729 MB              ; 00:00:01                           ;
+; Analysis & Synthesis ; 00:00:05     ; 1.0                     ; 678 MB              ; 00:00:15                           ;
+; Fitter               ; 00:00:06     ; 1.0                     ; 1524 MB             ; 00:00:07                           ;
+; Assembler            ; 00:00:02     ; 1.0                     ; 569 MB              ; 00:00:02                           ;
+; Power Analyzer       ; 00:00:01     ; 1.0                     ; 1020 MB             ; 00:00:01                           ;
+; Timing Analyzer      ; 00:00:01     ; 1.1                     ; 736 MB              ; 00:00:01                           ;
 ; EDA Netlist Writer   ; 00:00:01     ; 1.0                     ; 813 MB              ; 00:00:00                           ;
-; Total                ; 00:00:15     ; --                      ; --                  ; 00:00:27                           ;
+; Total                ; 00:00:16     ; --                      ; --                  ; 00:00:26                           ;
 +----------------------+--------------+-------------------------+---------------------+------------------------------------+
 
 

output_files/max80.jam

@@ -13,7 +13,7 @@
 'refer to the applicable agreement for further details, at
 'https://fpgasoftware.intel.com/eula.
 
-'Device #1: EP4CE15 - /home/hpa/abc80/max80/blinktest/output_files/max80.sof Fri Aug  6 19:23:58 2021
+'Device #1: EP4CE15 - /home/hpa/abc80/max80/blinktest/output_files/max80.sof Fri Aug  6 19:38:12 2021
 
 
 NOTE "CREATOR" "QUARTUS PRIME JAM COMPOSER 20.1";
@@ -2284,4 +2284,4 @@ NEXT j;
 POP j;
 ENDPROC;
 ' END OF FILE
-CRC 2DD2;
+CRC 2D51;

output_files/max80.map.rpt

@@ -1,5 +1,5 @@
 Analysis & Synthesis report for max80
-Fri Aug  6 19:23:51 2021
+Fri Aug  6 19:38:04 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -68,7 +68,7 @@ https://fpgasoftware.intel.com/eula.
 +----------------------------------------------------------------------------------+
 ; Analysis & Synthesis Summary                                                     ;
 +------------------------------------+---------------------------------------------+
-; Analysis & Synthesis Status        ; Successful - Fri Aug  6 19:23:50 2021       ;
+; Analysis & Synthesis Status        ; Successful - Fri Aug  6 19:38:04 2021       ;
 ; Quartus Prime Version              ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition ;
 ; Revision Name                      ; max80                                       ;
 ; Top-level Entity Name              ; max80                                       ;
@@ -186,8 +186,7 @@ https://fpgasoftware.intel.com/eula.
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   0.0%      ;
-;     Processors 3-8         ;   0.0%      ;
+;     Processors 2-8         ;   0.0%      ;
 +----------------------------+-------------+
 
 
@@ -1101,7 +1100,7 @@ The equations can be found in /home/hpa/abc80/max80/blinktest/output_files/max80
 Info: *******************************************************************
 Info: Running Quartus Prime Analysis & Synthesis
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:23:45 2021
+    Info: Processing started: Fri Aug  6 19:37:59 2021
 Info: Command: quartus_map --lower_priority --read_settings_files=on --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (20030): Parallel compilation is enabled and will use 8 of the 8 processors detected
@@ -1526,9 +1525,9 @@ Info (21057): Implemented 485 device resources after synthesis - the final resou
     Info (21061): Implemented 340 logic cells
     Info (21065): Implemented 2 PLLs
 Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 217 warnings
-    Info: Peak virtual memory: 711 megabytes
-    Info: Processing ended: Fri Aug  6 19:23:51 2021
-    Info: Elapsed time: 00:00:06
-    Info: Total CPU time (on all processors): 00:00:16
+    Info: Peak virtual memory: 678 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:04 2021
+    Info: Elapsed time: 00:00:05
+    Info: Total CPU time (on all processors): 00:00:15
 
 

output_files/max80.map.summary

@@ -1,4 +1,4 @@
-Analysis & Synthesis Status : Successful - Fri Aug  6 19:23:50 2021
+Analysis & Synthesis Status : Successful - Fri Aug  6 19:38:04 2021
 Quartus Prime Version : 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 Revision Name : max80
 Top-level Entity Name : max80

output_files/max80.pow.rpt

@@ -1,5 +1,5 @@
 Power Analyzer report for max80
-Fri Aug  6 19:24:01 2021
+Fri Aug  6 19:38:18 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -53,19 +53,19 @@ https://fpgasoftware.intel.com/eula.
 ; Number detected on machine ; 16          ;
 ; Maximum allowed            ; 8           ;
 ;                            ;             ;
-; Average used               ; 1.05        ;
+; Average used               ; 1.04        ;
 ; Maximum used               ; 8           ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processors 2-8         ;   0.7%      ;
+;     Processors 2-8         ;   0.6%      ;
 +----------------------------+-------------+
 
 
 +-------------------------------------------------------------------------------------------+
 ; Power Analyzer Summary                                                                    ;
 +----------------------------------------+--------------------------------------------------+
-; Power Analyzer Status                  ; Successful - Fri Aug  6 19:24:01 2021            ;
+; Power Analyzer Status                  ; Successful - Fri Aug  6 19:38:17 2021            ;
 ; Quartus Prime Version                  ; 20.1.1 Build 720 11/11/2020 SJ Lite Edition      ;
 ; Revision Name                          ; max80                                            ;
 ; Top-level Entity Name                  ; max80                                            ;
@@ -392,7 +392,7 @@ https://fpgasoftware.intel.com/eula.
 Info: *******************************************************************
 Info: Running Quartus Prime Power Analyzer
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:24:00 2021
+    Info: Processing started: Fri Aug  6 19:38:16 2021
 Info: Command: quartus_pow --lower_priority --read_settings_files=off --write_settings_files=off max80 -c max80
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
 Info (21077): Low junction temperature is 0 degrees C
@@ -433,9 +433,9 @@ Info (334004): Delay annotation completed successfully
 Info (215049): Average toggle rate for this design is 10.833 millions of transitions / sec
 Info (215031): Total thermal power estimate for the design is 217.59 mW
 Info: Quartus Prime Power Analyzer was successful. 0 errors, 11 warnings
-    Info: Peak virtual memory: 1022 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:01 2021
-    Info: Elapsed time: 00:00:01
+    Info: Peak virtual memory: 1020 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:18 2021
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:01
 
 

output_files/max80.pow.summary

@@ -1,4 +1,4 @@
-Power Analyzer Status : Successful - Fri Aug  6 19:24:01 2021
+Power Analyzer Status : Successful - Fri Aug  6 19:38:17 2021
 Quartus Prime Version : 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 Revision Name : max80
 Top-level Entity Name : max80

output_files/max80.sta.rpt

@@ -1,5 +1,5 @@
 Timing Analyzer report for max80
-Fri Aug  6 19:24:03 2021
+Fri Aug  6 19:38:20 2021
 Quartus Prime Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
 
 
@@ -118,12 +118,12 @@ https://fpgasoftware.intel.com/eula.
 ; Number detected on machine ; 16          ;
 ; Maximum allowed            ; 8           ;
 ;                            ;             ;
-; Average used               ; 1.06        ;
+; Average used               ; 1.05        ;
 ; Maximum used               ; 8           ;
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   1.4%      ;
+;     Processor 2            ;   1.1%      ;
 ;     Processors 3-8         ;   0.7%      ;
 +----------------------------+-------------+
 
@@ -133,7 +133,7 @@ https://fpgasoftware.intel.com/eula.
 +---------------+--------+--------------------------+
 ; SDC File Path ; Status ; Read at                  ;
 +---------------+--------+--------------------------+
-; max80.sdc     ; OK     ; Fri Aug  6 19:24:02 2021 ;
+; max80.sdc     ; OK     ; Fri Aug  6 19:38:19 2021 ;
 +---------------+--------+--------------------------+
 
 
@@ -3241,7 +3241,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 Info: *******************************************************************
 Info: Running Quartus Prime Timing Analyzer
     Info: Version 20.1.1 Build 720 11/11/2020 SJ Lite Edition
-    Info: Processing started: Fri Aug  6 19:24:02 2021
+    Info: Processing started: Fri Aug  6 19:38:18 2021
 Info: Command: quartus_sta --lower_priority max80 -c max80
 Info: qsta_default_script.tcl version: #1
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -3363,9 +3363,9 @@ Info (332146): Worst-case minimum pulse width slack is 2.563
 Info (332102): Design is not fully constrained for setup requirements
 Info (332102): Design is not fully constrained for hold requirements
 Info: Quartus Prime Timing Analyzer was successful. 0 errors, 10 warnings
-    Info: Peak virtual memory: 729 megabytes
-    Info: Processing ended: Fri Aug  6 19:24:03 2021
-    Info: Elapsed time: 00:00:01
+    Info: Peak virtual memory: 736 megabytes
+    Info: Processing ended: Fri Aug  6 19:38:20 2021
+    Info: Elapsed time: 00:00:02
     Info: Total CPU time (on all processors): 00:00:01
 
 

max80jic.tcl → post_quartus_asm.tcl

@@ -1 +1,2 @@
+# Run after assembler
 qexec "quartus_cpf -c max80jic.cof"

postmodule.tcl

@@ -0,0 +1,9 @@
+set module   [lindex $quartus(args) 0]
+set project  [lindex $quartus(args) 1]
+set revision [lindex $quartus(args) 1]
+
+set module_script "post_$module.tcl"
+
+if [file exists $module_script] {
+    source $module_script
+}