fw: add machinery for switching to test image

Add machinery for loading and switching to the test image. Not yet
actually invocable, though.

fw/Makefile

@@ -44,6 +44,7 @@ max80.elf: head.o die.o main.o dummy.o irqtable.o irqasm.o sbrk.o \
 	  sdcard.o diskcache.o \
 	  abcio.o abcdisk.o \
 	  memset.o memcpy.o \
+	  runtest.o start_test.o \
 	  $(ROMOBJS) \
 	  testimg.o \
 	  fatfs.a

fw/fw.h

@@ -72,4 +72,6 @@ extern void read_rtc(void);
 
 extern uint32_t romcopy_time[2];
 
+extern void run_test_image(void);
+
 #endif /* FW_H */

fw/irq.h

@@ -13,6 +13,14 @@ extern irqhandler_t __irq_handler_table[];
   void irqhandler_ ##x (unsigned int vector __attribute__((unused)), \
 			size_t pc __attribute__((unused)))
 
+static inline unsigned int disable_irqs(void)
+{
+    return p_maskirq(~0U, 0);
+}
+static inline unsigned int restore_irqs(unsigned int mask)
+{
+    return p_maskirq(mask, 0);
+}
 static inline unsigned int mask_irqs(unsigned int mask)
 {
     return p_maskirq(mask, ~mask);

fw/main.c

@@ -75,10 +75,15 @@ static void init(void)
     abcdisk_init();
 }
 
+bool dont_gc;			/* Keep things from linker gc */
+
 void main(void)
 {
     init();
 
+    if (dont_gc)
+	run_test_image();
+
     while (1) {
 	wait_for_irq();
 	abcdisk_io_poll();

fw/runtest.c

@@ -0,0 +1,26 @@
+/*
+ * Load and switch to test image
+ */
+
+#include "fw.h"
+#include "irq.h"
+#include "io.h"
+#include "sys.h"
+
+extern const char __dram_start[];
+extern const char __dram_test_start[], __dram_test_end[], __dram_test_size[];
+
+extern no_return __start_test(void);
+
+void __dram_text run_test_image(void)
+{
+    disable_irqs();
+
+    ROMCOPY_RAMADDR = (size_t)__dram_test_start;
+    ROMCOPY_ROMADDR = __rom_offset + (__dram_test_start - __dram_start);
+    ROMCOPY_DATALEN = (size_t)__dram_test_size;
+
+    waitfor(ROMCOPY_IRQ);
+
+    __start_test();
+}

fw/start_test.S

@@ -0,0 +1,47 @@
+/*
+ * Move test image to SRAM and jump to it
+ */
+#include "sys.h"
+
+	.section ".dram.text","ax"
+	.globl __start_test
+__start_test:
+	la	a0,__dram_test_start
+	li	a1,SRAM_SIZE
+	li	a2,0
+	li	a3,32
+
+	.balign 4
+.L_loop:
+	lw	a5,0(a0)
+	sw	a5,0(a2)
+	lw	a5,4(a0)
+	sw	a5,4(a2)
+	lw	a5,8(a0)
+	sw	a5,8(a2)
+	lw	a5,12(a0)
+	sw	a5,12(a2)
+	lw	a5,16(a0)
+	sw	a5,16(a2)
+	lw	a5,20(a0)
+	sw	a5,20(a2)
+	lw	a5,24(a0)
+	sw	a5,24(a2)
+	lw	a5,28(a0)
+	sw	a5,28(a2)
+	add	a0,a0,a3
+	add	a2,a2,a3
+	bltu	a2,a1,.L_loop
+
+	/* For future compatibility... */
+	li	sp,SRAM_SIZE
+	li	tp,0
+	li	a0,0
+	li	a1,0
+	li	a2,0
+	li	a3,0
+	li	a4,0
+	li	a5,0
+
+	li	ra,_PC_RESET
+	jr	ra