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@@ -83,7 +83,6 @@ static int fpga_finish(int err)
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/* Reset?! */
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jtag_disable(NULL);
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- fpga_enable_config();
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return err;
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}
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@@ -110,9 +109,6 @@ int fpga_program_spz(spz_stream *spz)
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uint32_t idcode;
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uint32_t check_status_buf[(JTAG_FPGA_CHECK_STATUS_BITS+31) >> 5];
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- /* Disable onboard configuration circuitry */
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- fpga_disable_config();
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-
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/* Configure JTAG to access the FPGA */
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jtag_enable(&jtag_config_fpga);
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@@ -207,35 +203,18 @@ int fpga_program_spz(spz_stream *spz)
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//
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// XXX: Actually try to detect board revision 2.1...
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//
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-void fpga_enable_config(void)
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+void fpga_enable_nce(void)
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{
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pinMode(PIN_FPGA_nCE, INPUT_PULLDOWN);
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-}
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-void fpga_disable_config(void)
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-{
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- digitalWrite(PIN_FPGA_nCE, 1);
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- pinMode(PIN_FPGA_nCE, OUTPUT);
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- delayMicroseconds(1000);
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-}
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-bool fpga_jtag_busy(void)
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-{
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- return digitalRead(PIN_FPGA_nCE);
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+ delayMicroseconds(100); /* Just in case */
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}
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int fpga_reset(void)
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{
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int err = 0;
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- fpga_enable_config();
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+ fpga_enable_nce();
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jtag_enable(&jtag_config_fpga);
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- jtag_delay(1000);
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-
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- if (fpga_jtag_busy()) {
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- MSG("FPGA nCE = 0; JTAG controlled by external device?\n");
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- err = FWUPDATE_ERR_FPGA_JTAG;
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- goto fail;
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- }
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-
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tap_run_test_idle(JTAG_FPGA_MS);
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/* Make sure to enable loader (not supposed to be needed...) */
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