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nCE: nCE should always be low, no matter what

nCE should never be high. Might as well have grounded the pin.
H. Peter Anvin 2 years ago
parent
commit
99fc9c46ec

+ 1 - 3
esp32/max80/fpga.h

@@ -42,9 +42,7 @@ extern_c esp_err_t fpga_io_write(unsigned int cmd, const volatile void *addr,
 extern_c esp_err_t fpga_io_read(unsigned int cmd, const volatile void *addr,
 				void *data, size_t len);
 extern_c uint32_t fpga_io_status(unsigned int cmd);
-extern_c void fpga_enable_config(void);
-extern_c void fpga_disable_config(void);
-extern_c bool fpga_jtag_busy(void);
+extern_c void fpga_enable_nce(void);
 
 struct esplink_head;
 extern_c void esplink_init(void);

+ 3 - 24
esp32/max80/fpgajtag.c

@@ -83,7 +83,6 @@ static int fpga_finish(int err)
     /* Reset?! */
 
     jtag_disable(NULL);
-    fpga_enable_config();
 
     return err;
 }
@@ -110,9 +109,6 @@ int fpga_program_spz(spz_stream *spz)
     uint32_t idcode;
     uint32_t check_status_buf[(JTAG_FPGA_CHECK_STATUS_BITS+31) >> 5];
 
-    /* Disable onboard configuration circuitry */
-    fpga_disable_config();
-
     /* Configure JTAG to access the FPGA */
     jtag_enable(&jtag_config_fpga);
 
@@ -207,35 +203,18 @@ int fpga_program_spz(spz_stream *spz)
 //
 // XXX: Actually try to detect board revision 2.1...
 //
-void fpga_enable_config(void)
+void fpga_enable_nce(void)
 {
     pinMode(PIN_FPGA_nCE, INPUT_PULLDOWN);
-}
-void fpga_disable_config(void)
-{
-    digitalWrite(PIN_FPGA_nCE, 1);
-    pinMode(PIN_FPGA_nCE, OUTPUT);
-    delayMicroseconds(1000);
-}
-bool fpga_jtag_busy(void)
-{
-    return digitalRead(PIN_FPGA_nCE);
+    delayMicroseconds(100);	/* Just in case */
 }
 
 int fpga_reset(void)
 {
     int err = 0;
 
-    fpga_enable_config();
+    fpga_enable_nce();
     jtag_enable(&jtag_config_fpga);
-    jtag_delay(1000);
-
-    if (fpga_jtag_busy()) {
-	MSG("FPGA nCE = 0; JTAG controlled by external device?\n");
-	err = FWUPDATE_ERR_FPGA_JTAG;
-	goto fail;
-    }
-
     tap_run_test_idle(JTAG_FPGA_MS);
 
     /* Make sure to enable loader (not supposed to be needed...) */

+ 2 - 2
esp32/max80/max80.ino

@@ -55,8 +55,8 @@ static void init_hw()
     for (int i = 1; i <= 18; i++)
 	pinMode(i, INPUT);
 
-    // Make sure FPGA nCE input (board 2.1+) is not pulled high
-    fpga_enable_config();
+    // Make sure FPGA nCE input (board 2.1+) is not accidentally pulled high
+    fpga_enable_nce();
 
     // Configure USB power control. Try to detect 36k pulldown
     // resistor on USB_PWR_EN first, to determine board version 2

BIN
esp32/output/max80.ino.bin


BIN
fpga/output/bypass.rpd.gz


BIN
fpga/output/v1.fw


BIN
fpga/output/v1.rpd.gz


BIN
fpga/output/v2.fw


BIN
fpga/output/v2.rpd.gz