When adding Smartaid map handling, managed to mess up which bits go to the MMU RAM. Now it seems to actually work again...
@@ -303,13 +303,13 @@ module abcbus (
wire [17:0] rdata_abcmemmap; // RV32 access port
wire [17:0] abc_memmap_rd; // ABC-bus access port
- abcmapram
+ abcmapram abcmapram
(
.aclr ( ~rst_n ),
.clock ( sdram_clk ),
- .address_a ( { abc_a_map, abc_a_addr } ),
+ .address_a ( { abc_a_map, abc_a_addr[15:10] } ),
.data_a ( 18'bx ),
.wren_a ( 1'b0 ),
.q_a ( abc_memmap_rd ),