usb_device_core: hook up tx_data_strb

... a missing signal ...

fpga/usb/usb_serial/src_v/usb_cdc_core.sv

@@ -972,9 +972,9 @@ module usb_cdc_core
 
    assign inport_accept_o     = !inport_valid_q | usb_ep[2].u.tx_data_accept;
 
-   assign outport_valid_o     = usb_ep[1].u.rx_valid && usb_ep[1].uc.rx_strb;
-   assign outport_data_o      = usb_ep[1].uc.rx_data;
-   assign usb_ep[1].d.rx_space      = outport_accept_i;
+   assign outport_valid_o      = usb_ep[1].u.rx_valid && usb_ep[1].uc.rx_strb;
+   assign outport_data_o       = usb_ep[1].uc.rx_data;
+   assign usb_ep[1].d.rx_space = outport_accept_i;
 
    always @(posedge clk_i or posedge rst_i)
      if (rst_i)

fpga/usb/usb_serial/src_v/usbf_device_core.sv

@@ -314,6 +314,7 @@ module usbf_device_core
 
    assign tx_ready_r           = ept.d.tx_ready;
    assign tx_data_valid_r      = ept.d.tx_data_valid;
+   assign tx_data_strb_r       = ept.d.tx_data_strb;
    assign tx_data_r            = ept.d.tx_data;
    assign tx_data_last_r       = ept.d.tx_data_last;