Consolidate firmware format definitions into common/fwimg.h

common/fwimg.h

@@ -0,0 +1,35 @@
+/*
+ * Common firmware image format
+ */
+
+#ifndef FWIMG_H
+#define FWIMG_H
+
+#include <inttypes.h>
+
+/*
+ * Firmware chunk header.
+ */
+#define FW_MAGIC		0x7a07fbd6
+
+struct fw_header {
+    uint32_t magic;		/* Magic number */
+    uint16_t type;		/* Content type */
+    uint16_t flags;		/* Content flags */
+    uint32_t len;		/* Content length (excluding header) */
+    uint32_t addr;		/* Address or similar */
+};
+
+enum fw_data_type {
+    FDT_END,			/* End of stream */
+    FDT_DATA,			/* FPGA firmware ata to be flashed */
+    FDT_TARGET,			/* Subsystem string (must match) */
+    FDT_NOTE,			/* Version: XXXXX or similar */
+    FDT_ESP_OTA,		/* ESP32 OTA image */
+    FDT_FPGA_INIT		/* FPGA bitstream for update */
+};
+enum fw_data_flags {
+    FDF_OPTIONAL     = 0x0001	/* Ignore if chunk data type unknown */
+};
+
+#endif /* FW_H */

esp32/max80/fw.h

@@ -1,32 +1,9 @@
 #pragma once
 
 #include "common.h"
-#include <zlib.h>
-
-/*
- * Firmware chunk header.
- */
-#define FW_MAGIC		0x7a07fbd6
-
-struct fw_header {
-    uint32_t magic;		/* Magic number */
-    uint16_t type;		/* Content type */
-    uint16_t flags;		/* Content flags */
-    uint32_t len;		/* Content length (excluding header) */
-    uint32_t addr;		/* Address or similar */
-};
+#include "fwimg.h"
 
-enum fw_data_type {
-    FDT_END,			/* End of stream */
-    FDT_DATA,			/* FPGA firmware ata to be flashed */
-    FDT_TARGET,			/* Subsystem string (must match) */
-    FDT_NOTE,			/* Version: XXXXX or similar */
-    FDT_ESP_OTA,		/* ESP32 OTA image */
-    FDT_FPGA_INIT		/* FPGA bitstream for update */
-};
-enum fw_data_flags {
-    FDF_OPTIONAL     = 0x0001	/* Ignore if chunk data type unknown */
-};
+#include <zlib.h>
 
 /*
  * Additional error codes

fpga/max80.qpf

@@ -19,15 +19,15 @@
 #
 # Quartus Prime
 # Version 21.1.0 Build 842 10/21/2021 SJ Lite Edition
-# Date created = 11:53:07  June 06, 2022
+# Date created = 12:23:20  June 22, 2022
 #
 # -------------------------------------------------------------------------- #
 
 QUARTUS_VERSION = "21.1"
-DATE = "11:53:07  June 06, 2022"
+DATE = "12:23:20  June 22, 2022"
 
 # Revisions
 
-PROJECT_REVISION = "v1"
 PROJECT_REVISION = "v2"
+PROJECT_REVISION = "v1"
 PROJECT_REVISION = "bypass"

rv32/esp.c

@@ -128,7 +128,7 @@ size_t esp_rb_read(enum esplink_ringbuf_user ring, void *data, size_t len)
 size_t esp_rb_write(enum esplink_ringbuf_user ring,
 		    const void *data, size_t len)
 {
-    const size_t size          = rb_desc[ring].ustr.size;
+    const size_t size          = RINGBUF_BUF_SIZE;
     const size_t sizemask      = size - 1;
     uint8_t * const base       = rb_desc[ring].ustr.start;
     size_t tail                = rb_ustr[ring].tail;
@@ -166,9 +166,9 @@ size_t esp_rb_write(enum esplink_ringbuf_user ring,
  * esp_rb_putc() returns -1 on failure, otherwise the number of
  * bytes still free in the ring (a nonnegative number.)
  */
-int esp_rb_getc(enum esplink_ringbuf_user ring)
+__hot int esp_rb_getc(enum esplink_ringbuf_user ring)
 {
-    const size_t size          = rb_desc[ring].dstr.size;
+    const size_t size          = RINGBUF_BUF_SIZE;
     const size_t sizemask      = size - 1;
     const uint8_t * const base = rb_desc[ring].dstr.start;
     size_t head                = rb_ustr[ring].head;
@@ -186,9 +186,9 @@ int esp_rb_getc(enum esplink_ringbuf_user ring)
     return data;
 }
 
-int esp_rb_putc(enum esplink_ringbuf_user ring, uint8_t data)
+__hot int esp_rb_putc(enum esplink_ringbuf_user ring, uint8_t data)
 {
-    const size_t size          = rb_desc[ring].ustr.size;
+    const size_t size          = RINGBUF_BUF_SIZE;
     const size_t sizemask      = size - 1;
     uint8_t * const base       = rb_desc[ring].ustr.start;
     size_t tail                = rb_ustr[ring].tail;
@@ -205,6 +205,24 @@ int esp_rb_putc(enum esplink_ringbuf_user ring, uint8_t data)
     return avail;
 }
 
+__hot enum ringbuf_status esp_rb_status(enum esplink_ringbuf_user ring)
+{
+    const size_t size          = RINGBUF_BUF_SIZE;
+    const size_t sizemask      = size - 1;
+    const size_t utail         = rb_ustr[ring].tail;
+    const size_t dhead         = rb_ustr[ring].head;
+    const size_t uhead         = rb_dstr[ring].head;
+    const size_t dtail         = rb_dstr[ring].tail;
+    enum ringbuf_status status = RB_CONNECTED;
+
+    if (dhead != dtail)
+	status |= RB_RXDATA;
+    if ((utail - uhead - 1) & sizemask)
+	status |= RB_TXFREE;
+
+    return status;
+}
+
 void esp_init(void)
 {
     static char __dram_data esp_signature[] = "Hej tomtebuggar slå i glasen!";

rv32/esp.h

@@ -12,5 +12,12 @@ extern size_t esp_rb_write(enum esplink_ringbuf_user ring,
 			   const void *data, size_t len);
 extern int esp_rb_getc(enum esplink_ringbuf_user ring);
 extern int esp_rb_putc(enum esplink_ringbuf_user ring, uint8_t data);
+enum ringbuf_status {
+    RB_RXDATA    = 1,
+    RB_TXFREE    = 2,
+    RB_SUSPEND   = 4,
+    RB_CONNECTED = 8
+};
+extern enum ringbuf_status esp_rb_status(enum esplink_ringbuf_user ring);
 
 #endif /* RV32_ESP_H */

rv32/spiflash.c

@@ -1,6 +1,7 @@
 #include "common.h"
 #include "zlib.h"
 #include "spiflash.h"
+#include "esp.h"
 
 #if 1
 # include "console.h"
@@ -27,7 +28,7 @@ struct spz_stream {
 	    uint8_t *vbuf;	    /* Readback/verify buffer */
 	};
     };
-    struct spiflash_header header;  /* Header of currently processed chunk */
+    struct fw_header header;	    /* Header of currently processed chunk */
     int err;			    /* Error code to return */
     bool eoi;			    /* Reached end of input */
     bool cleanup;		    /* Call inflateEnd() */
@@ -609,7 +610,7 @@ static int spiflash_process_chunk(spz_stream *spz)
     else if (rv != sizeof spz->header)
 	return spz->err = Z_STREAM_ERROR;
 
-    if (spz->header.magic != SPIFLASH_MAGIC) {
+    if (spz->header.magic != FW_MAGIC) {
 	MSG("update: bad chunk header magic 0x%08x\n", spz->header.magic);
 	return spz->err = Z_DATA_ERROR;
     }

rv32/spiflash.h

@@ -5,6 +5,8 @@
 #include <stddef.h>
 #include <string.h>
 
+#include "fwimg.h"
+
 /* SPI flash command opcodes */
 enum romcmd {
     /* Standard SPI mode commands */
@@ -60,31 +62,6 @@ enum romcmd {
 
 #define SPIFLASH_SFDP_SIZE	256
 
-/*
- * Firmware chunk header.
- */
-#define SPIFLASH_MAGIC		0x7a07fbd6
-
-struct spiflash_header {
-    uint32_t magic;		/* Magic number */
-    uint16_t type;		/* Content type */
-    uint16_t flags;		/* Content flags */
-    uint32_t len;		/* Content length (excluding header) */
-    uint32_t addr;		/* Address or similar */
-};
-
-enum fw_data_type {
-    FDT_END,			/* End of stream */
-    FDT_DATA,			/* FPGA firmware ata to be flashed */
-    FDT_TARGET,			/* Subsystem string (must match) */
-    FDT_NOTE,			/* Version: XXXXX or similar */
-    FDT_ESP_OTA,		/* ESP32 OTA image */
-    FDT_FPGA_INIT		/* FPGA bitstream for update */
-};
-enum flash_data_flags {
-    FDF_OPTIONAL     = 0x0001	/* Ignore if chunk data type unknown */
-};
-
 /*
  * A page is an amount that can be programmed in one operation.
  * A sector is the minimum amount that can be erased in one operation.