esplink: better error checking, test ESP -> FPGA write direction

Better error checking to avoid inadvertent looping when FPGA is
offline. Test writing from ESP to FPGA by writing into the test string
at an unaligned offset and length (it works.)

esp32/max80/fpgasvc.c

@@ -157,7 +157,7 @@ static esp_err_t fpga_io_write(unsigned int cmd, uint32_t addr,
 
     if (!len && !(cmd & ~FPGA_CMD_RD))
 	return ESP_OK;
-    
+
     memset(&trans, 0, sizeof trans);
     trans.base.flags   =
 	SPI_TRANS_MODE_DIO |
@@ -184,7 +184,7 @@ static esp_err_t fpga_io_read(unsigned int cmd, uint32_t addr,
 
     if (!len && !(cmd & ~FPGA_CMD_RD))
 	return ESP_OK;
-    
+
     memset(&trans, 0, sizeof trans);
     trans.base.flags   =
 	SPI_TRANS_MODE_DIO |
@@ -245,29 +245,34 @@ static void fpga_service_task(void *dummy)
     while (1) {
 	/* Wait until an interrupt is received */
 	xTaskNotifyWaitIndexed(NOTIFY_INDEX, 0, -1U, NULL, portMAX_DELAY);
-	
-	while (!digitalRead(PIN_FPGA_INT)) {
-	    printf("[FPGA] FPGA signals ready\n");
 
+	while (!digitalRead(PIN_FPGA_INT)) {
+	    bool ok = false;
 	    uint32_t status = fpga_io_status(0);
 	    printf("[FPGA] Link status bits = 0x%08x\n", status);
-	    
-	    fpga_io_read(FPGA_CMD_ACK(ESP_IRQ_READY), FPGA_HDR_ADDR,
-			 &head, sizeof head);
-
-	    if (head.magic == DRAM_IO_MAGIC && head.hlen >= sizeof head) {
-		printf("[FPGA] Ready, board = %u.%u fixes %02x fpga %u\n",
-		       head.board.major, head.board.minor,
-		       head.board.fixes, head.board.fpga);
-	    }
 
-	    char signature_string[head.signature_len+1];
-	    fpga_io_read(0, (size_t)head.signature,
-			 signature_string, head.signature_len);
-	    signature_string[head.signature_len] = '\0';
+	    if ((status & 0x000fc010) == 0x00008000) {
+		fpga_io_read(FPGA_CMD_ACK(ESP_IRQ_READY), FPGA_HDR_ADDR,
+			     &head, sizeof head);
 
-	    printf("[FPGA] \"%s\"\n", signature_string);
-	}
+		if (head.magic == DRAM_IO_MAGIC && head.hlen >= sizeof head) {
+		    printf("[FPGA] Ready, board = %u.%u fixes %02x fpga %u\n",
+			   head.board.major, head.board.minor,
+			   head.board.fixes, head.board.fpga);
+
+		    char signature_string[head.signature_len+1];
+		    fpga_io_read(0, (size_t)head.signature,
+				 signature_string, head.signature_len);
+		    signature_string[head.signature_len] = '\0';
+
+		    fpga_io_write(0, (size_t)head.signature + 9, "GUBBAR", 6);
 
+		    printf("[FPGA] \"%s\"\n", signature_string);
+		    ok = true;
+		}
+	    } else {
+		printf("[FPGA] None or invalid FPGA response, offline\n");
+	    }
+	}
     }
 }

fpga/max80.qpf

@@ -19,15 +19,15 @@
 #
 # Quartus Prime
 # Version 21.1.0 Build 842 10/21/2021 SJ Lite Edition
-# Date created = 00:54:28  May 03, 2022
+# Date created = 01:22:16  May 03, 2022
 #
 # -------------------------------------------------------------------------- #
 
 QUARTUS_VERSION = "21.1"
-DATE = "00:54:28  May 03, 2022"
+DATE = "01:22:16  May 03, 2022"
 
 # Revisions
 
-PROJECT_REVISION = "v1"
 PROJECT_REVISION = "v2"
+PROJECT_REVISION = "v1"
 PROJECT_REVISION = "bypass"

rv32/checksum.h

@@ -1,4 +1,4 @@
 #ifndef CHECKSUM_H
 #define CHECKSUM_H
-#define SDRAM_SUM 0x2591a983
+#define SDRAM_SUM 0x36019fd3
 #endif

rv32/esp.c

@@ -25,7 +25,7 @@ IRQHANDLER(esp,0)
 
 void esp_init(void)
 {
-    static const char esp_signature[] = "Hej tomtebuggar slå i glasen!";
+    static char __dram_data esp_signature[] = "Hej tomtebuggar slå i glasen!";
 
     dram_io_head.magic         = 0;
     dram_io_head.hlen          = sizeof dram_io_head;