spi_master: add support for CPOL=1 (SPI mode 2)

spi_master.sv

@@ -19,6 +19,7 @@ module spi_master
 #(
   parameter width = 1,		// Width of SPI data
   parameter n_cs  = 1,		// Number of CS# outputs
+  parameter CPOL = 0,		// Inverted SPI clock polarity
   parameter cs_delay = 1,
   parameter io_max  = max(ilog2c(width)-1, 1)
   )
@@ -61,7 +62,7 @@ module spi_master
    reg				   eack_q;
 
    assign spi_cs_n = ~spi_cs_q;
-   assign spi_sck  = spi_sck_q;
+   assign spi_sck  = spi_sck_q ^ CPOL;
 
    wire spi_cs_changed = |(spi_cs_q ^ cs);