synchro: allow synchronizer to use I/O input registers

Using I/O input registers improves skew, possibly at the expense of
metastability, but the latter can usually be dealt with by adding
another synchronizer stage if necessary. Do allow overriding this
option, however.

fpga/synchro.sv

@@ -9,7 +9,10 @@
 // them into a synchronizer chain. No inferring RAMs or anything like that,
 // and pack them close together.
 //
-module synchronizer #(parameter width = 1, parameter stages = 2)
+module synchronizer
+  #(parameter width = 1,
+    parameter stages = 2,
+    parameter ioregs = 1)
    (
     input rst_n,
     input clk,
@@ -26,6 +29,8 @@ module synchronizer #(parameter width = 1, parameter stages = 2)
 `ifdef ALTERA_RESERVED_QIS
    (*
     syn_preserve = 1,
+    dont_replicate = 1,
+    useioff = ~ioregs,
     altera_attribute =
 	{"-name SYNCHRONIZER_IDENTIFICATION FORCED ; ",
 	 "-name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH ", tostr(stages-1)}
@@ -36,6 +41,8 @@ module synchronizer #(parameter width = 1, parameter stages = 2)
 `ifdef ALTERA_RESERVED_QIS
    (*
     syn_preserve = 1,
+    dont_replicate = 1,
+    useioff = 1,
     altera_attribute =
 	{"-name SYNCHRONIZER_IDENTIFICATION AUTO ; ",
 	 "-name SYNCHRONIZATION_REGISTER_CHAIN_LENGTH ", tostr(stages-1)}