fpga: don't generate .jam file

fpga/max80.qsf

@@ -129,7 +129,7 @@ set_global_assignment -name EDA_TEST_BENCH_DESIGN_INSTANCE_NAME max80 -section_i
 set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to led[1]
 set_global_assignment -name CYCLONEIII_CONFIGURATION_DEVICE EPCQ128A
 
-set_global_assignment -name GENERATE_JAM_FILE ON
+set_global_assignment -name GENERATE_JAM_FILE OFF
 set_global_assignment -name FORCE_CONFIGURATION_VCCIO ON
 set_global_assignment -name CONFIGURATION_VCCIO_LEVEL 3.3V
 
@@ -234,7 +234,7 @@ set_global_assignment -name SOURCE_FILE max80.pins
 set_global_assignment -name SOURCE_TCL_SCRIPT_FILE scripts/pins.tcl
 set_global_assignment -name VERILOG_FILE ip/fifo.v
 set_global_assignment -name VERILOG_FILE ip/ddufifo.v
-set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
 
 set_global_assignment -name OCP_HW_EVAL DISABLE
-set_global_assignment -name TIMING_ANALYZER_DO_REPORT_TIMING ON
+set_global_assignment -name TIMING_ANALYZER_DO_REPORT_TIMING ON
+set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top