spirom: implement 1-bit DMA mode

1-bit DMA support for spirom. This is completely untested, but might
be useful in troubleshooting.

fpga/max80.qpf

@@ -19,12 +19,12 @@
 #
 # Quartus Prime
 # Version 21.1.0 Build 842 10/21/2021 SJ Lite Edition
-# Date created = 01:00:33  January 22, 2022
+# Date created = 04:00:36  January 27, 2022
 #
 # -------------------------------------------------------------------------- #
 
 QUARTUS_VERSION = "21.1"
-DATE = "01:00:33  January 22, 2022"
+DATE = "04:00:36  January 27, 2022"
 
 # Revisions
 

fpga/spirom.sv

@@ -131,18 +131,22 @@ module spirom (
    //
    // FIFO and input latches
    //
-   reg [1:0]		  spi_in_q;
+   reg [0:0]		  spi_in_q;
    reg			  spi_in_req;
    reg			  spi_in_req_q;
    wire [11:0]		  wrusedw;
    wire [8:0]		  rdusedw;
    wire [15:0]		  fifo_out;
+   wire [1:0] 		  spi_in_data;
+
+   assign spi_in_data[0] = spi_dual ? spi_in_q[0]   : spi_in_shr[0];
+   assign spi_in_data[1] = spi_dual ? spi_in_shr[0] : spi_in_shr[1];
 
    ddufifo spirom_fifo (
 			.aclr ( ~rst_n ),
 
 			.wrclk ( rom_clk ),
-			.data ( spi_in_q ),
+			.data ( spi_in_data ),
 			.wrreq ( spi_in_req_q ),
 			.wrusedw ( wrusedw ),
 
@@ -226,7 +230,7 @@ module spirom (
 
    // Negative indicies refer to fractional bytes
    reg [2:-3]  spi_cmd_ctr;
-   reg [23:-2] spi_data_ctr;
+   reg [23:-3] spi_data_ctr;
    reg	       spi_clk_en = 1'b0;
    reg	       spi_mosi_en;
    reg [1:0]   go_spi_q;
@@ -256,20 +260,19 @@ module spirom (
        begin
 	  spi_cmd_ctr  <= 6'b0;
 	  spi_clk_en   <= 1'b0;
-	  spi_data_ctr <= 26'b0;
+	  spi_data_ctr <= 27'b0;
 	  spi_cs_n     <= 1'b1;
 	  spi_cs_ctr   <= 'b0;
 	  spi_in_req   <= 1'b0;
 	  spi_in_req_q <= 1'b0;
 	  spi_mosi_en  <= 1'b1;
-	  spi_in_q     <= 2'bx;
+	  spi_in_q     <= 1'b0;
 	  spi_in_shr   <= 32'b0;
 	  spi_active   <= 1'b0;
 	  spi_more_q   <= 1'b0;
        end
      else
        begin
-	  spi_in_q     <= spi_io;
 	  spi_in_req   <= 1'b0;
 	  spi_in_req_q <= spi_in_req;
 	  spi_clk_en   <= 1'b0;
@@ -285,7 +288,7 @@ module spirom (
 	    begin
 	       // Starting new transaction
 	       spi_cmd_ctr  <= { cmdlen,  3'b0 };
-	       spi_data_ctr <= { datalen, 4'b0 };
+	       spi_data_ctr <= { datalen, 5'b0 };
 	       spi_active   <= 1'b1;
 	       spi_cs_n     <= 1'b0;
 	       spi_more_q   <= spi_more;
@@ -310,15 +313,18 @@ module spirom (
 
 		    if ( spi_clk_en )
 		      begin
+			 // Note: spi_in_shr[0] and spi_in_q[1] should
+			 // be merged into a single register.
 			 spi_in_shr   <= { spi_in_shr[30:0], spi_io[1] };
+			 spi_in_q[0]  <= spi_io[0];
 
 			 if ( spi_cmd_ctr == 6'd1 )
-			      spi_mosi_en  <= ~spi_dual;
+			   spi_mosi_en  <= ~spi_dual;
 
 			 if ( ~|spi_cmd_ctr )
 			   begin
-			      spi_in_req   <= 1'b1;
-			      spi_data_ctr <= spi_data_ctr - 1'b1;
+			      spi_in_req <= spi_data_ctr[-3] | spi_dual;
+			      spi_data_ctr <= spi_data_ctr - (1'b1 << spi_dual);
 			   end
 			 else
 			   begin

rv32/boot.mif

@@ -710,7 +710,7 @@ CONTENT BEGIN
 02BF : 8333A0A0;
 02C0 : 03B300E2;
 02C1 : 053700B3;
-02C2 : 22232D00;
+02C2 : 22232500;
 02C3 : 8E49A070;
 02C4 : A0C02423;
 02C5 : 20238082;

rv32/romcopy.c

@@ -50,7 +50,7 @@ void __hot romcopy_download(void *dst, size_t offset, size_t len)
     ROMCOPY_RAMADDR = (size_t)dst;
     ROMCOPY_ROMCMD  = __rom_offset + offset + (ROM_FAST_READ_DUAL << 24);
     ROMCOPY_DATALEN =
-	len | ROMCOPY_SPI_CMDLEN(5) | ROMCOPY_SPI_DUAL | ROMCOPY_WRITE_RAM;
+	len | ROMCOPY_SPI_CMDLEN(5) | /*ROMCOPY_SPI_DUAL |*/ ROMCOPY_WRITE_RAM;
 }
 
 void __hot romcopy_bzero(void *dst, size_t len)