max80_fw/fpga/Makefile

MAKEFLAGS      += -R -r

PROJECT		= max80
REVISIONS	= v1 v2
QU        	= quartus

# Common options for all Quartus tools
QPRI    	= --lower_priority
QCPF		= $(QU)_cpf $(QPRI)
QSH		= $(QU)_sh  $(QPRI)
QSTA		= $(QU)_sta $(QPRI)
QPGM    	= $(QU)_pgm $(QPRI)

# Common options for Quartus in-flow tools
QOPT    	= --write_settings_files=off $(QPRI)
QMAP    	= $(QU)_map $(QOPT)
QFIT    	= $(QU)_fit $(QOPT)
QCDB    	= $(QU)_cdb $(QOPT)
QASM    	= $(QU)_asm $(QOPT)
QPOW    	= $(QU)_pow $(QOPT)

outdir		= output

PERL    = perl

SUBDIRS = usb

alltarg := sof jic pow.rpt sta.rpt
allout   = $(foreach o,$(alltarg),$(outdir)/$(1).$(o))

.SUFFIXES: .targets

.SECONDARY:

.DELETE_ON_ERROR:

all:
	$(MAKE) prereq
	$(MAKE) $(foreach rev,$(REVISIONS),$(rev).targets)

.PHONY: $(REVISIONS)
$(REVISIONS):
	$(MAKE) prereq
	$(MAKE) $@.targets

.PHONY: %.targets
%.targets:
	$(MAKE) $(call allout,$*)

$(outdir)/%.map.rpt: %.qsf
	$(QMAP) $(PROJECT) -c $*

$(outdir)/%.fit.rpt: $(outdir)/%.map.rpt
	$(QFIT)  $(PROJECT) -c $*

$(outdir)/%.mif_update.rpt: $(outdir)/%.fit.rpt
	$(QCDB) --update_mif $(PROJECT) -c $*

$(outdir)/%.sof: $(outdir)/%.mif_update.rpt
	$(QASM) $(PROJECT) -c $*

$(outdir)/%.sta.rpt: $(outdir)/%.fit.rpt | $(outdir)/%.sof
	$(QSTA) $(PROJECT) -c $*

$(outdir)/%.pow.rpt: $(outdir)/%.sta.rpt
	$(QPOW) $(PROJECT) -c $*

# XXX: do all .sof -> conversions using quartus_cpf
$(outdir)/%.jic:  $(PROJECT)-%.cof $(outdir)/%.sof ../rv32/dram.hex
	$(QCPF) --convert $<

# Prerequisite directories
prereq:
	for d in $(SUBDIRS); do $(MAKE) -C $$d; done

# Clean out SignalTap
signalclean:
	for f in *.qsf; do \
		$(PERL) -ne 'print unless (/(SIGNALTAP_FILE\b|\bENABLE_SIGNALTAP\b|\bSLD_FILE\b|SLD_NODE_)/);' < $$f > $$f.tmp &&
		mv -f $$f.qsf.tmp $$f.qsf ;
	done

# Programming targets. Environment JTAG_CABLE can override the default,
# which is otherwise the first cable found.
rpar := )
JTAG_CABLE ?= $(shell jtagconfig --enum | sed -ne 's/^1$(rpar) //p')

# Transient programming
program-%: $(outdir)/%.sof
	$(QPGM) -c '$(JTAG_CABLE)' -m JTAG -o 'p;$(outdir)/$*.sof'

# Permanent programming in flash
flash-%: $(outdir)/%.jic
	$(QPGM) -c '$(JTAG_CABLE)' -m JTAG -i -o 'pvbi;$(outdir)/$*.jic'

%.deps: %.qsf scripts/qsfdeps.pl
	$(PERL) scripts/qsfdeps.pl $* $@ $<

clean:
	for d in $(SUBDIRS); do $(MAKE) -C $$d clean; done
	rm -rf db incremental_db simulation/modelsim \
	greybox_tmp */greybox_tmp iodevs.vh output_files
	for d in $(REVISIONS); do \
		$$d/*.rpt $$d/*.rpt $$d/*.summary $$d/*.smsg  \
		$$d/*.htm $$d/*.htm_files $$d/*.map $$d/*.eqn $$d/*.sld \
		$$d/*.done ; \
	done

spotless:
	for d in $(SUBDIRS); do $(MAKE) -C $$d spotless; done
	rm -rf $(outdir)

iodevs.vh: ../iodevs.conf ../tools/iodevs.pl
	$(PERL) ../tools/iodevs.pl v $< $@

# Verilog header dependencies
max80.sv: iodevs.vh

-include $(foreach rev,$(REVISIONS),$(rev).deps)