hello.c 6.8 KB

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  1. #include "fw.h"
  2. #include "io.h"
  3. #include "sys.h"
  4. #include "console.h"
  5. static unsigned int errors = 0;
  6. static unsigned int rate_limit;
  7. static char err_char;
  8. static void data_check(volatile uint32_t *p, uint32_t expect)
  9. {
  10. uint32_t readback = *p;
  11. if (readback != expect) {
  12. if (rate_limit) {
  13. con_printf("\n%p : read %08x expected %08x\n",
  14. p, readback, expect);
  15. rate_limit--;
  16. }
  17. err_char = 'X';
  18. errors++;
  19. }
  20. }
  21. static inline void write_check(volatile uint32_t *p, uint32_t v)
  22. {
  23. *p = v;
  24. data_check(p, v);
  25. }
  26. #define ERROR_RATELIMIT 8
  27. #define A 0x45c11ba1 /* Arbitrary odd constant */
  28. #define B 0x78dacecb /* Arbitrary constant */
  29. static void test_sdram(void)
  30. {
  31. #if 0
  32. const unsigned int sdram_words = SDRAM_SIZE >> 2;
  33. static unsigned int stride = 4;
  34. uint32_t start_time = rdtime();
  35. uint32_t w = 0;
  36. uint32_t n;
  37. con_printf("Testing SDRAM from 0x%08x to 0x%08x, stride 0x%08x...\n",
  38. SDRAM_ADDR, SDRAM_END, stride);
  39. err_char = '-';
  40. rate_limit = ERROR_RATELIMIT;
  41. for (n = 1, w = 0; n <= sdram_words; n++) {
  42. uint32_t a = w + SDRAM_ADDR;
  43. volatile uint32_t *p = (volatile uint32_t *)a;
  44. write_check(p, 0);
  45. write_check(p, ~0);
  46. write_check(p, ~w);
  47. write_check(p, w);
  48. write_check(p, A*w + B);
  49. if (!(n & 0x3ffff)) {
  50. CON_DATA = err_char;
  51. err_char = '-';
  52. }
  53. w = (w + stride) & SDRAM_MASK;
  54. }
  55. con_puts("\nReading back to check for aliases...\n");
  56. rate_limit = ERROR_RATELIMIT;
  57. for (n = 1, w = 0; n <= sdram_words; n++) {
  58. uint32_t a = w + SDRAM_ADDR;
  59. volatile uint32_t *p = (volatile uint32_t *)a;
  60. data_check(p, A*w + B);
  61. if (!(n & 0x3ffff)) {
  62. CON_DATA = err_char;
  63. err_char = '-';
  64. }
  65. w = (w - stride) & SDRAM_MASK;
  66. }
  67. con_printf("\nSDRAM test complete, time = %u ms\n",
  68. (rdtime() - start_time)/(CPU_HZ/1000));
  69. stride *= 3;
  70. stride = (stride & SDRAM_MASK) ^ (stride >> (SDRAM_ADDR_BITS-2));
  71. stride = (stride & ~3) | 4;
  72. #endif
  73. }
  74. #define TESTDATA_WORDS (128*1024)
  75. extern uint32_t testdata[TESTDATA_WORDS];
  76. static void test_download(void)
  77. {
  78. const unsigned int words = TESTDATA_WORDS;
  79. volatile uint32_t *p = testdata;
  80. unsigned int ok = words;
  81. uint32_t val = 0x00001111;
  82. unsigned int ratelimit = ERROR_RATELIMIT;
  83. for (unsigned int w = 0; w < words; w++) {
  84. uint32_t ram = *p;
  85. if (ram != val) {
  86. ok--;
  87. if (ratelimit) {
  88. ratelimit--;
  89. con_printf("%p : 0x%08x expected 0x%08x\n", p, ram, val);
  90. }
  91. }
  92. p++;
  93. val = (val * 0x89abcdef) +
  94. (uint32_t)((val * 0x89abcdefULL) >> 32) +
  95. (w * 0x76543210);
  96. }
  97. con_printf("SDRAM download: %u/%u words OK\n", ok, words);
  98. if (ok != words) {
  99. for (unsigned int o = 0; o < (512*1024); o += (64*1024)) {
  100. volatile uint16_t *hp = (uint16_t *)(SDRAM_ADDR + o);
  101. p = (uint32_t *)(SDRAM_ADDR + o);
  102. for (unsigned int w = 0; w < 8; w++) {
  103. uint16_t l = *hp++;
  104. uint16_t h = *hp++;
  105. con_printf(" %04x.%04x", l, h);
  106. }
  107. con_putc('\n');
  108. }
  109. }
  110. }
  111. /* Make sure we don't leave anything in SDRAM that could be a false negative */
  112. static void scrub_sdram(void)
  113. {
  114. volatile uint32_t *p;
  115. for (p = (uint32_t *)SDRAM_ADDR; p < (uint32_t *)SDRAM_END; p++)
  116. *p = 0xdeadbeef;
  117. }
  118. static volatile uint32_t timer_irq_count;
  119. IRQHANDLER(sysclock)
  120. {
  121. uint32_t count = timer_irq_count;
  122. count++;
  123. timer_irq_count = count;
  124. set_led(count >> 3); /* 4 Hz */
  125. }
  126. static void init_abc_memmap(void)
  127. {
  128. volatile uint32_t *pg = &ABCMEMMAP_PAGE(0);
  129. /* Memory */
  130. for (unsigned int addr = 0; addr < 0x10000; addr += 512) {
  131. if (addr >= 0x5800 && addr < 0x6000) {
  132. *pg++ = ABCMEMMAP_RD | addr;
  133. } else if (addr >= 0x8000 && addr < 0xc000) {
  134. *pg++ = ABCMEMMAP_RD | ABCMEMMAP_WR | addr;
  135. } else {
  136. *pg++ = addr; /* Disabled */
  137. }
  138. }
  139. /* I/O */
  140. for (unsigned int sel = 0; sel < 64; sel++) {
  141. ABCMEMMAP_WRPORT(sel) = 0; /* Write DMA address/OUT enable */
  142. ABCMEMMAP_WRCOUNT(sel) = 0; /* DMA write byte count */
  143. ABCMEMMAP_RDPORT(sel) = 0; /* Read DMA address/IN enable */
  144. ABCMEMMAP_RDCOUNT(sel) = 0; /* DMA read byte count */
  145. }
  146. }
  147. static uint32_t timer_irq_start;
  148. static void init(void)
  149. {
  150. static const char hello[] =
  151. "\n*** Hello, World! ***\n"
  152. "Firmware compiled on: " __DATE__ " " __TIME__ "\n\n";
  153. init_abc_memmap();
  154. set_led(0);
  155. con_puts(hello);
  156. timer_irq_count = 0;
  157. timer_irq_start = rdtime();
  158. unmask_irq(SYSCLOCK_IRQ);
  159. read_rtc();
  160. }
  161. extern uint32_t __dram_bss_start[], __dram_bss_end[], __dram_bss_len[];
  162. static uint32_t romcopy_time[2];
  163. static unsigned int romcopy_state;
  164. IRQHANDLER(romcopy)
  165. {
  166. switch (romcopy_state++) {
  167. case 0:
  168. /* Copy testdata */
  169. ROMCOPY_RAMADDR = 0;
  170. ROMCOPY_ROMADDR = 0x100000;
  171. ROMCOPY_DATALEN = TESTDATA_WORDS << 2;
  172. break;
  173. case 1:
  174. /* Zero .dram.bss */
  175. romcopy_time[0] = rdtime() - time_zero;
  176. ROMCOPY_RAMADDR = (size_t)__dram_bss_start;
  177. ROMCOPY_ROMADDR = 0; /* Zero */
  178. ROMCOPY_DATALEN = (size_t)__dram_bss_len;
  179. break;
  180. default:
  181. romcopy_time[1] = rdtime() - romcopy_time[0];
  182. mask_irq(ROMCOPY_IRQ);
  183. return;
  184. }
  185. }
  186. /*
  187. * Faster than memset() because it is less generic
  188. * newlib gets the bss clearing wrong for some reason...
  189. */
  190. static void clear_bss(void)
  191. {
  192. extern uint32_t __bss_start[], __BSS_END__[];
  193. for (uint32_t *p = __bss_start; p < __BSS_END__; p += 8) {
  194. p[0] = 0;
  195. p[1] = 0;
  196. p[2] = 0;
  197. p[3] = 0;
  198. p[4] = 0;
  199. p[5] = 0;
  200. p[6] = 0;
  201. p[7] = 0;
  202. }
  203. }
  204. void main(void)
  205. {
  206. /* The data section is not reinitialized on reset */
  207. static unsigned int loops = 1;
  208. uint32_t irq_count;
  209. uint32_t abc_status;
  210. uint32_t done;
  211. uint32_t bss_clear_time;
  212. clear_bss();
  213. bss_clear_time = rdtime() - time_zero;
  214. romcopy_state = 0;
  215. unmask_irq(ROMCOPY_IRQ);
  216. con_set_baudrate(115200);
  217. init();
  218. con_printf("This is loop: %u\n", loops++);
  219. abc_status = ABC_STATUS;
  220. if (abc_status & ABC_STATUS_LIVE) {
  221. con_printf("I seem to be connected to ABC%d\n",
  222. (ABC_STATUS & ABC_STATUS_800) ? 800 : 80);
  223. } else {
  224. con_puts("No ABC-bus host detected\n");
  225. }
  226. con_printf("Clearing .bss took %u us\n",
  227. bss_clear_time/(CPU_HZ/1000000));
  228. while (!(irqmask() & (1 << ROMCOPY_IRQ)))
  229. pause();
  230. con_printf("SDRAM download took %u us\n",
  231. romcopy_time[0]/(CPU_HZ/1000000));
  232. con_printf("SDRAM bss clear took %u us\n",
  233. romcopy_time[1]/(CPU_HZ/1000000));
  234. test_download();
  235. for (const uint32_t *p = __dram_bss_start; p < __dram_bss_end; p++) {
  236. if (*p) {
  237. con_printf(".dram.bss not properly cleared\n");
  238. break;
  239. }
  240. }
  241. disk_init();
  242. test_sdram();
  243. scrub_sdram();
  244. irq_count = timer_irq_count;
  245. done = rdtime() - time_zero; /* timer_irq_start */
  246. con_printf("%u timer interrupts received in %u ms, ~%u expected\n",
  247. irq_count, done/(CPU_HZ/1000),
  248. (done+(CPU_HZ/64))/(CPU_HZ/32));
  249. udelay(1000000);
  250. con_puts("*** Doing reset ***\n");
  251. con_flush();
  252. while ( 1 )
  253. reset();
  254. }