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max80.sta.summary

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  1. ------------------------------------------------------------
    2. 

  2. Timing Analyzer Summary
    3. 

  3. ------------------------------------------------------------
    4. 

  4. 

  5. Type  : Slow 1200mV 85C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    6. 

  6. Slack : 1.906
    7. 

  7. TNS   : 0.000
    8. 

  8. 

  9. Type  : Slow 1200mV 85C Model Setup 'pll|altpll_component|auto_generated|pll1|clk[1]'
    10. 

  10. Slack : 5.089
    11. 

  11. TNS   : 0.000
    12. 

  12. 

  13. Type  : Slow 1200mV 85C Model Setup 'pll|altpll_component|auto_generated|pll1|clk[2]'
    14. 

  14. Slack : 17.383
    15. 

  15. TNS   : 0.000
    16. 

  16. 

  17. Type  : Slow 1200mV 85C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    18. 

  18. Slack : 22.698
    19. 

  19. TNS   : 0.000
    20. 

  20. 

  21. Type  : Slow 1200mV 85C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[1]'
    22. 

  22. Slack : 0.466
    23. 

  23. TNS   : 0.000
    24. 

  24. 

  25. Type  : Slow 1200mV 85C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    26. 

  26. Slack : 0.504
    27. 

  27. TNS   : 0.000
    28. 

  28. 

  29. Type  : Slow 1200mV 85C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[2]'
    30. 

  30. Slack : 0.576
    31. 

  31. TNS   : 0.000
    32. 

  32. 

  33. Type  : Slow 1200mV 85C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    34. 

  34. Slack : 2.295
    35. 

  35. TNS   : 0.000
    36. 

  36. 

  37. Type  : Slow 1200mV 85C Model Minimum Pulse Width 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    38. 

  38. Slack : 2.477
    39. 

  39. TNS   : 0.000
    40. 

  40. 

  41. Type  : Slow 1200mV 85C Model Minimum Pulse Width 'pll|altpll_component|auto_generated|pll1|clk[1]'
    42. 

  42. Slack : 4.909
    43. 

  43. TNS   : 0.000
    44. 

  44. 

  45. Type  : Slow 1200mV 85C Model Minimum Pulse Width 'clock_48'
    46. 

  46. Slack : 10.341
    47. 

  47. TNS   : 0.000
    48. 

  48. 

  49. Type  : Slow 1200mV 85C Model Minimum Pulse Width 'pll|altpll_component|auto_generated|pll1|clk[2]'
    50. 

  50. Slack : 13.586
    51. 

  51. TNS   : 0.000
    52. 

  52. 

  53. Type  : Slow 1200mV 85C Model Minimum Pulse Width 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    54. 

  54. Slack : 13.589
    55. 

  55. TNS   : 0.000
    56. 

  56. 

  57. Type  : Slow 1200mV 85C Model Minimum Pulse Width 'rtc_32khz'
    58. 

  58. Slack : 30513.579
    59. 

  59. TNS   : 0.000
    60. 

  60. 

  61. Type  : Slow 1200mV 0C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    62. 

  62. Slack : 2.078
    63. 

  63. TNS   : 0.000
    64. 

  64. 

  65. Type  : Slow 1200mV 0C Model Setup 'pll|altpll_component|auto_generated|pll1|clk[1]'
    66. 

  66. Slack : 5.556
    67. 

  67. TNS   : 0.000
    68. 

  68. 

  69. Type  : Slow 1200mV 0C Model Setup 'pll|altpll_component|auto_generated|pll1|clk[2]'
    70. 

  70. Slack : 17.936
    71. 

  71. TNS   : 0.000
    72. 

  72. 

  73. Type  : Slow 1200mV 0C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    74. 

  74. Slack : 22.985
    75. 

  75. TNS   : 0.000
    76. 

  76. 

  77. Type  : Slow 1200mV 0C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[1]'
    78. 

  78. Slack : 0.418
    79. 

  79. TNS   : 0.000
    80. 

  80. 

  81. Type  : Slow 1200mV 0C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    82. 

  82. Slack : 0.473
    83. 

  83. TNS   : 0.000
    84. 

  84. 

  85. Type  : Slow 1200mV 0C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[2]'
    86. 

  86. Slack : 0.537
    87. 

  87. TNS   : 0.000
    88. 

  88. 

  89. Type  : Slow 1200mV 0C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    90. 

  90. Slack : 2.143
    91. 

  91. TNS   : 0.000
    92. 

  92. 

  93. Type  : Slow 1200mV 0C Model Minimum Pulse Width 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    94. 

  94. Slack : 2.476
    95. 

  95. TNS   : 0.000
    96. 

  96. 

  97. Type  : Slow 1200mV 0C Model Minimum Pulse Width 'pll|altpll_component|auto_generated|pll1|clk[1]'
    98. 

  98. Slack : 4.909
    99. 

  99. TNS   : 0.000
    100. 

  100. 

  101. Type  : Slow 1200mV 0C Model Minimum Pulse Width 'clock_48'
    102. 

  102. Slack : 10.354
    103. 

  103. TNS   : 0.000
    104. 

  104. 

  105. Type  : Slow 1200mV 0C Model Minimum Pulse Width 'pll|altpll_component|auto_generated|pll1|clk[2]'
    106. 

  106. Slack : 13.586
    107. 

  107. TNS   : 0.000
    108. 

  108. 

  109. Type  : Slow 1200mV 0C Model Minimum Pulse Width 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    110. 

  110. Slack : 13.588
    111. 

  111. TNS   : 0.000
    112. 

  112. 

  113. Type  : Slow 1200mV 0C Model Minimum Pulse Width 'rtc_32khz'
    114. 

  114. Slack : 30513.579
    115. 

  115. TNS   : 0.000
    116. 

  116. 

  117. Type  : Fast 1200mV 0C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    118. 

  118. Slack : 3.884
    119. 

  119. TNS   : 0.000
    120. 

  120. 

  121. Type  : Fast 1200mV 0C Model Setup 'pll|altpll_component|auto_generated|pll1|clk[1]'
    122. 

  122. Slack : 8.115
    123. 

  123. TNS   : 0.000
    124. 

  124. 

  125. Type  : Fast 1200mV 0C Model Setup 'pll|altpll_component|auto_generated|pll1|clk[2]'
    126. 

  126. Slack : 23.218
    127. 

  127. TNS   : 0.000
    128. 

  128. 

  129. Type  : Fast 1200mV 0C Model Setup 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    130. 

  130. Slack : 24.670
    131. 

  131. TNS   : 0.000
    132. 

  132. 

  133. Type  : Fast 1200mV 0C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    134. 

  134. Slack : 0.194
    135. 

  135. TNS   : 0.000
    136. 

  136. 

  137. Type  : Fast 1200mV 0C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[1]'
    138. 

  138. Slack : 0.194
    139. 

  139. TNS   : 0.000
    140. 

  140. 

  141. Type  : Fast 1200mV 0C Model Hold 'pll|altpll_component|auto_generated|pll1|clk[2]'
    142. 

  142. Slack : 0.247
    143. 

  143. TNS   : 0.000
    144. 

  144. 

  145. Type  : Fast 1200mV 0C Model Hold 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    146. 

  146. Slack : 0.930
    147. 

  147. TNS   : 0.000
    148. 

  148. 

  149. Type  : Fast 1200mV 0C Model Minimum Pulse Width 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[0]'
    150. 

  150. Slack : 2.563
    151. 

  151. TNS   : 0.000
    152. 

  152. 

  153. Type  : Fast 1200mV 0C Model Minimum Pulse Width 'pll|altpll_component|auto_generated|pll1|clk[1]'
    154. 

  154. Slack : 4.993
    155. 

  155. TNS   : 0.000
    156. 

  156. 

  157. Type  : Fast 1200mV 0C Model Minimum Pulse Width 'clock_48'
    158. 

  158. Slack : 10.004
    159. 

  159. TNS   : 0.000
    160. 

  160. 

  161. Type  : Fast 1200mV 0C Model Minimum Pulse Width 'pll|altpll_component|auto_generated|pll1|clk[2]'
    162. 

  162. Slack : 13.673
    163. 

  163. TNS   : 0.000
    164. 

  164. 

  165. Type  : Fast 1200mV 0C Model Minimum Pulse Width 'hdmitx|ALTLVDS_TX_component|auto_generated|lvds_tx_pll|clk[1]'
    166. 

  166. Slack : 13.674
    167. 

  167. TNS   : 0.000
    168. 

  168. 

  169. Type  : Fast 1200mV 0C Model Minimum Pulse Width 'rtc_32khz'
    170. 

  170. Slack : 30513.579
    171. 

  171. TNS   : 0.000
    172. 

  172. 

  173. ------------------------------------------------------------
    174.