system.c 6.2 KB

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  1. #include "fw.h"
  2. #include "io.h"
  3. #include "sdcard.h"
  4. #include "abcio.h"
  5. #include "sys.h"
  6. #include "console.h"
  7. #define DEBUG 0
  8. #define MINITESTS 1
  9. #define DELAY 0
  10. #define DRAM_IO_MAGIC 0x3648dec4
  11. struct dram_io_head {
  12. uint32_t magic;
  13. size_t hlen;
  14. void *dptr;
  15. size_t dlen;
  16. uint32_t board;
  17. };
  18. struct dram_io_head __dram_io_head dram_io_head;
  19. uint32_t __dram_io dram_io[(65536 - sizeof(struct dram_io_head)) >> 2];
  20. void __hot con_print_hex(unsigned int n)
  21. {
  22. for (int i = 0; i < 8; i++) {
  23. unsigned int c = n >> 28;
  24. n <<= 4;
  25. con_putc(c + ((c >= 10) ? 'a'-10 : '0'));
  26. }
  27. }
  28. /* Don't mark no_return or gcc moves it to SDRAM */
  29. static void __hot __text_hot killed(const char *how, size_t pc)
  30. {
  31. /* Cannot use con_printf() here */
  32. const uint16_t *pcp;
  33. size_t mtval;
  34. asm volatile("csrr %0,mtval" : "=r" (mtval));
  35. /* Try to move back to the previous instruction (if not a jump...) */
  36. pc += -4 + (pc & 1);
  37. pcp = (const uint16_t *)pc;
  38. con_puts(hotstr("ERROR: "));
  39. con_puts(how);
  40. con_puts(hotstr(" at 0x"));
  41. con_print_hex(pc);
  42. con_puts(hotstr(" (0x"));
  43. con_print_hex((pcp[1] << 16) + pcp[0]);
  44. con_puts(hotstr(")\nBad address: 0x"));
  45. con_print_hex(mtval);
  46. con_putc('\n');
  47. for (int i = 0; i < 32; i += 8) {
  48. for (int j = 0; j < 8; j++) {
  49. uint32_t v = rdxreg(i+j);
  50. con_print_hex(v);
  51. con_putc((j == 7) ? '\n' : ' ');
  52. }
  53. }
  54. con_flush();
  55. udelay(5000000);
  56. reset(SYS_RESET_SOFT);
  57. }
  58. IRQHANDLER(buserr,0)
  59. {
  60. killed(hotstr("misaligned"), pc);
  61. }
  62. IRQHANDLER(ebreak,0)
  63. {
  64. killed(hotstr("invalid instruction"), pc);
  65. }
  66. volatile __sbss uint32_t timer_irq_count;
  67. IRQHANDLER(sysclock,0)
  68. {
  69. uint32_t count = timer_irq_count;
  70. count++;
  71. timer_irq_count = count;
  72. if ( MINITESTS ) {
  73. static const char spinner[4] = "/-\\|";
  74. if (!(count & (TIMER_HZ-1))) {
  75. uint32_t seconds = count >> TIMER_SHIFT;
  76. CON_DATA = spinner[seconds & 3];
  77. CON_DATA = '\b';
  78. }
  79. }
  80. }
  81. static void late_init(void);
  82. static void hello_sdram(void);
  83. #define TEST_DATA_0 0x01234567
  84. #define TEST_DATA_1 0x98badcfe
  85. static const volatile __dram_data
  86. uint32_t test_data[2] = { TEST_DATA_0, TEST_DATA_1 };
  87. uint32_t __sbss timer_irq_start;
  88. void __hot init(void)
  89. {
  90. static __string_hot const char hello[] =
  91. "\n\n*** Hello, World! ***\n"
  92. "MAX80 "
  93. #ifdef TEST
  94. "testing"
  95. #endif
  96. "firmware compiled on: ";
  97. timer_irq_start = rdtime();
  98. /* Start ROM copy engine, unmask timer and fatal exceptions */
  99. unmask_irqs((1U << ROMCOPY_IRQ)|(1U << EBREAK_IRQ)|
  100. (1U << BUSERR_IRQ)|(1U << SYSCLOCK_IRQ));
  101. con_puts(hello);
  102. con_puts(__datestamp);
  103. con_putc('\n');
  104. set_leds(7);
  105. wait_romcopy_done();
  106. if ( test_data[0] == TEST_DATA_0 && test_data[1] == TEST_DATA_1 ) {
  107. con_puts(hotstr("SDRAM seems ok - skipping test\n"));
  108. } else {
  109. volatile uint32_t *dp;
  110. uint32_t v;
  111. uint32_t wrerr;
  112. uint32_t not_zero, all_ones;
  113. uint32_t rx = 0x193ac604;
  114. v = wrerr = 0;
  115. all_ones = -1;
  116. not_zero = 0;
  117. for (dp = __dram_init_start; dp < __dram_init_end; dp++) {
  118. uint32_t v1, v2;
  119. v1 = *dp;
  120. v += v1;
  121. v2 = v1 ^ rx;
  122. *dp = v2;
  123. wrerr |= *dp ^ v2;
  124. *dp = v1;
  125. not_zero |= v1;
  126. all_ones &= v1;
  127. rx *= 0xf4d5725f;
  128. }
  129. con_puts(hotstr("SDRAM data checksum: "));
  130. con_print_hex(v);
  131. con_puts(hotstr(" expected "));
  132. con_print_hex(__dram_checksum);
  133. con_putc('\n');
  134. con_puts(hotstr("Bits always set, clear: "));
  135. con_print_hex(all_ones);
  136. con_putc(' ');
  137. con_print_hex(~not_zero);
  138. con_putc('\n');
  139. con_puts(hotstr("Test data: "));
  140. con_print_hex(test_data[0]);
  141. con_putc(' ');
  142. con_print_hex(test_data[1]);
  143. con_putc('\n');
  144. if (wrerr)
  145. con_puts(hotstr("SDRAM read/write error\n"));
  146. v = 0;
  147. for (dp = __dram_bss_start; dp < __dram_bss_end; dp++) {
  148. uint32_t x = *dp;
  149. v |= x;
  150. }
  151. if (v)
  152. con_puts(hotstr("SDRAM .bss is not zero!\n"));
  153. }
  154. set_leds(6);
  155. con_flush();
  156. set_leds(5);
  157. #if DELAY
  158. con_puts(hotstr("Waiting 5 s for testing..."));
  159. udelay(5000000);
  160. con_putc('\n');
  161. con_flush();
  162. #endif
  163. if ( MINITESTS ) {
  164. const volatile uint32_t *p = (const volatile uint32_t *)hello_sdram;
  165. con_puts(hotstr("SDRAM jump test:"));
  166. for (int i = 0; i < 4; i++) {
  167. con_putc(' ');
  168. con_print_hex(p[i]);
  169. }
  170. con_puts(hotstr("\nJumping to SDRAM... "));
  171. hello_sdram();
  172. con_puts(hotstr("back in SRAM.\n"));
  173. }
  174. late_init();
  175. }
  176. static void __noinline hello_sdram(void)
  177. {
  178. con_puts("in SDRAM... ");
  179. }
  180. volatile uint32_t __dram_bss test_dram[8];
  181. static void __noinline late_init(void)
  182. {
  183. /* This needs to be done as early as possible!!! */
  184. con_puts("Running abc_init_memmap: ");
  185. con_flush();
  186. abc_init_memmap();
  187. con_puts("ok\n");
  188. if (SYS_MAGIC != SYS_MAGIC_MAX80) {
  189. con_puts("Not a MAX80 board?!?!\n\n");
  190. _die();
  191. } else {
  192. con_printf("MAX80 ver %u.%u rework flags %02x fpga %u\n",
  193. SYS_BOARDMAJOR, SYS_BOARDMINOR,
  194. SYS_BOARDFIX, SYS_BOARDFPGA);
  195. if (SYS_BOARDMAJOR != SYS_BOARDFPGA) {
  196. con_puts("Invalid FPGA firmware for this board revision\n");
  197. _die();
  198. }
  199. }
  200. con_putc('\n');
  201. rom_print_serial();
  202. if ( MINITESTS ) {
  203. con_puts("Quick DRAM test:\n");
  204. for (int i = 0; i < 8; i++) {
  205. uint32_t v = (i*0x11111111) + 0x44332211;
  206. test_dram[i] = v;
  207. (void)test_dram[i]; /* Force immediate readback */
  208. con_printf("%08x ", v);
  209. }
  210. con_putc('\n');
  211. for (int i = 0; i < 8; i++) {
  212. con_printf("%08x ", test_dram[i]);
  213. }
  214. con_puts("\n\nRandom number generator test:\n");
  215. for (int i = 0; i < 8; i++)
  216. con_printf("%08x ", rdrand());
  217. con_puts("\n\n");
  218. }
  219. set_leds(4);
  220. read_rtc();
  221. rtc_abc_init();
  222. set_leds(3);
  223. sdcard_reset();
  224. disk_cache_init();
  225. abcdisk_init();
  226. set_leds(2);
  227. pun80_init();
  228. set_leds(1);
  229. abc_init();
  230. /* Ready for communications */
  231. dram_io_head.hlen = sizeof dram_io_head;
  232. dram_io_head.dptr = dram_io;
  233. dram_io_head.dlen = sizeof dram_io;
  234. dram_io_head.board = SYS_BOARDCFG;
  235. dram_io_head.magic = DRAM_IO_MAGIC;
  236. static const char dram_io_test[] = "Hej tomtebuggar slå i glasen!";
  237. memcpy(dram_io_head.dptr, dram_io_test, sizeof dram_io_test);
  238. /* Release WAIT# if asserted */
  239. ABC_BUSCTL = 0;
  240. /* Let ESP know we are ready... */
  241. ESP_SPI_IRQ_SET = (1 << 1);
  242. set_leds(0);
  243. }