max80_fw/max80.qsf

# -------------------------------------------------------------------------- #
#
# Copyright (C) 2019  Intel Corporation. All rights reserved.
# Your use of Intel Corporation's design tools, logic functions 
# and other software and tools, and any partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Intel Program License 
# Subscription Agreement, the Intel Quartus Prime License Agreement,
# the Intel FPGA IP License Agreement, or other applicable license
# agreement, including, without limitation, that your use is for
# the sole purpose of programming logic devices manufactured by
# Intel and sold by Intel or its authorized distributors.  Please
# refer to the applicable agreement for further details, at
# https://fpgasoftware.intel.com/eula.
#
# -------------------------------------------------------------------------- #
#
# Quartus Prime
# Version 18.1.1 Build 646 04/11/2019 SJ Lite Edition
# Date created = 13:01:33  February 22, 2021
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		max80_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus Prime software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE15F17C8
set_global_assignment -name TOP_LEVEL_ENTITY max80
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 18.1.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:01:33  FEBRUARY 22, 2021"
set_global_assignment -name LAST_QUARTUS_VERSION "18.1.1 Lite Edition"
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name DEVICE_FILTER_PACKAGE EQFP
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 256
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (Verilog)"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT "VERILOG HDL" -section_id eda_simulation
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_timing
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_symbol
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_signal_integrity
set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_board_design_boundary_scan
set_global_assignment -name DEVICE_MIGRATION_LIST "EP4CE15F17C8,EP4CE6F17C8,EP4CE10F17C8"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name VCCA_USER_VOLTAGE 2.5V
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "NO HEAT SINK WITH STILL AIR"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name FLOW_ENABLE_POWER_ANALYZER ON
set_global_assignment -name POWER_DEFAULT_INPUT_IO_TOGGLE_RATE "12.5 %"
set_global_assignment -name VHDL_INPUT_VERSION VHDL_2008
set_global_assignment -name VHDL_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2005
set_global_assignment -name VERILOG_SHOW_LMF_MAPPING_MESSAGES OFF
set_global_assignment -name SAFE_STATE_MACHINE ON
set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS ON
set_global_assignment -name HDL_MESSAGE_LEVEL LEVEL3
set_global_assignment -name SYNTH_PROTECT_SDC_CONSTRAINT ON
set_global_assignment -name SYNTH_MESSAGE_LEVEL HIGH
set_global_assignment -name OPTIMIZE_IOC_REGISTER_PLACEMENT_FOR_TIMING "PACK ALL IO REGISTERS"
set_global_assignment -name WEAK_PULL_UP_RESISTOR OFF
set_global_assignment -name ENABLE_OCT_DONE OFF
set_global_assignment -name ENABLE_CONFIGURATION_PINS OFF
set_global_assignment -name ENABLE_BOOT_SEL_PIN OFF
set_global_assignment -name EXTERNAL_FLASH_FALLBACK_ADDRESS 0
set_global_assignment -name USE_CONFIGURATION_DEVICE OFF
set_global_assignment -name INTERNAL_FLASH_UPDATE_MODE "SINGLE COMP IMAGE"
set_global_assignment -name CRC_ERROR_OPEN_DRAIN OFF
set_global_assignment -name GENERATE_JBC_FILE ON
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -rise
set_global_assignment -name OUTPUT_IO_TIMING_NEAR_END_VMEAS "HALF VCCIO" -fall
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -rise
set_global_assignment -name OUTPUT_IO_TIMING_FAR_END_VMEAS "HALF SIGNAL SWING" -fall
set_instance_assignment -name CURRENT_STRENGTH_NEW "MAXIMUM CURRENT" -to sr_clk


set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to clock_48
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 6
set_global_assignment -name IOBANK_VCCIO 2.5V -section_id 5
set_instance_assignment -name IO_STANDARD LVDS -to hdmi_d[2]
set_instance_assignment -name IO_STANDARD LVDS -to hdmi_d[1]
set_instance_assignment -name IO_STANDARD LVDS -to hdmi_d[0]
set_instance_assignment -name IO_STANDARD LVDS -to hdmi_d
set_instance_assignment -name IO_STANDARD LVDS -to hdmi_clk
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to hdmi_clk
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to "hdmi_clk(n)"
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to hdmi_d[2]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to "hdmi_d[2](n)"
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to hdmi_d[1]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to "hdmi_d[1](n)"
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to hdmi_d[0]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to "hdmi_d[0](n)"
set_instance_assignment -name WEAK_PULL_UP_RESISTOR OFF -to hdmi_d
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 2
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 1
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 8
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 7
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 4
set_global_assignment -name IOBANK_VCCIO 3.3V -section_id 3
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA0_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DATA1_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_FLASH_NCE_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_DCLK_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to flash_clk
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to flash_cs_n
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to flash_miso
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to flash_mosi
set_instance_assignment -name IO_STANDARD "2.5 V" -to clock_48
set_location_assignment PIN_A2 -to abc_int800_x
set_location_assignment PIN_A3 -to abc_nmi_x
set_location_assignment PIN_A4 -to sr_dq[11]
set_location_assignment PIN_A5 -to sr_dq[8]
set_location_assignment PIN_A6 -to sr_a[9]
set_location_assignment PIN_A7 -to sr_a[7]
set_location_assignment PIN_A8 -to abc_a[0]
set_location_assignment PIN_A9 -to abc_a[2]
set_location_assignment PIN_A10 -to sr_dq[7]
set_location_assignment PIN_A11 -to sr_dq[5]
set_location_assignment PIN_A12 -to sr_dq[0]
set_location_assignment PIN_A13 -to sr_ba[0]
set_location_assignment PIN_A14 -to sr_a[0]
set_location_assignment PIN_A15 -to sr_a[3]
set_location_assignment PIN_B1 -to abc_xm_x
set_location_assignment PIN_B3 -to abc_int80_x
set_location_assignment PIN_B4 -to abc_rdy_x
set_location_assignment PIN_B5 -to sr_dq[10]
set_location_assignment PIN_B6 -to sr_a[12]
set_location_assignment PIN_B7 -to sr_a[8]
set_location_assignment PIN_B8 -to abc_a[1]
set_location_assignment PIN_B10 -to sr_dq[6]
set_location_assignment PIN_B11 -to sr_dq[4]
set_location_assignment PIN_B12 -to sr_ras_n
set_location_assignment PIN_B13 -to sr_ba[1]
set_location_assignment PIN_B14 -to sr_a[1]
set_location_assignment PIN_B16 -to rtc_int_n
set_location_assignment PIN_C1 -to flash_mosi
set_location_assignment PIN_C2 -to abc_a_oe
set_location_assignment PIN_C6 -to sr_dq[14]
set_location_assignment PIN_C8 -to sr_a[11]
set_location_assignment PIN_C9 -to sr_a[4]
set_location_assignment PIN_C11 -to sr_dq[3]
set_location_assignment PIN_C14 -to sr_a[10]
set_location_assignment PIN_C15 -to i2c_sda
set_location_assignment PIN_C16 -to i2c_scl
set_location_assignment PIN_D1 -to abc_a[3]
set_location_assignment PIN_D2 -to flash_cs_n
set_location_assignment PIN_D3 -to sr_clk
set_location_assignment PIN_D5 -to sr_dq[15]
set_location_assignment PIN_D6 -to sr_dq[13]
set_location_assignment PIN_D8 -to sr_dqm[1]
set_location_assignment PIN_D9 -to sr_a[5]
set_location_assignment PIN_D11 -to sr_dq[2]
set_location_assignment PIN_D12 -to sr_cs_n
set_location_assignment PIN_D14 -to sr_a[2]
set_location_assignment PIN_D15 -to tty_cts
set_location_assignment PIN_D16 -to tty_rts
set_location_assignment PIN_E1 -to abc_a[6]
set_location_assignment PIN_E6 -to sr_dq[12]
set_location_assignment PIN_E7 -to sr_dq[9]
set_location_assignment PIN_E8 -to sr_a[6]
set_location_assignment PIN_E9 -to sr_cas_n
set_location_assignment PIN_E10 -to sr_dqm[0]
set_location_assignment PIN_E11 -to sr_dq[1]
set_location_assignment PIN_E15 -to rtc_32khz
set_location_assignment PIN_E16 -to tty_txd
set_location_assignment PIN_F1 -to abc_a[7]
set_location_assignment PIN_F2 -to abc_cs_n
set_location_assignment PIN_F3 -to abc_a[5]
set_location_assignment PIN_F8 -to sr_cke
set_location_assignment PIN_F9 -to sr_we_n
set_location_assignment PIN_F13 -to tty_rxd
set_location_assignment PIN_F14 -to sd_dat[2]
set_location_assignment PIN_F15 -to sd_dat[0]
set_location_assignment PIN_F16 -to sd_dat[3]
set_location_assignment PIN_G1 -to abc_a[8]
set_location_assignment PIN_G2 -to abc_out_n[0]
set_location_assignment PIN_G5 -to abc_a[4]
set_location_assignment PIN_G15 -to sd_clk
set_location_assignment PIN_G16 -to sd_cmd
set_location_assignment PIN_H1 -to flash_clk
set_location_assignment PIN_H2 -to flash_miso
set_location_assignment PIN_H3 -to tck
set_location_assignment PIN_H4 -to tdi
set_location_assignment PIN_J1 -to abc_a[9]
set_location_assignment PIN_J2 -to abc_out_n[1]
set_location_assignment PIN_J4 -to tdo
set_location_assignment PIN_J5 -to tms
set_location_assignment PIN_J15 -to hdmi_clk
set_location_assignment PIN_K1 -to abc_a[11]
set_location_assignment PIN_K2 -to abc_out_n[4]
set_location_assignment PIN_K5 -to abc_out_n[2]
set_location_assignment PIN_K15 -to hdmi_d[0]
set_location_assignment PIN_L1 -to abc_a[12]
set_location_assignment PIN_L2 -to abc_inp_n[0]
set_location_assignment PIN_L3 -to abc_out_n[3]
set_location_assignment PIN_L4 -to abc_a[10]
set_location_assignment PIN_L7 -to gpio[0]
set_location_assignment PIN_L8 -to esp_io0
set_location_assignment PIN_L10 -to abc_xoutpstb_n
set_location_assignment PIN_M1 -to abc_a[13]
set_location_assignment PIN_M2 -to abc_inp_n[1]
set_location_assignment PIN_M6 -to abc_d[1]
set_location_assignment PIN_M7 -to spi_miso
set_location_assignment PIN_M8 -to spi_mosi
set_location_assignment PIN_M10 -to sd_dat[1]
set_location_assignment PIN_M11 -to hdmi_scl
set_location_assignment PIN_M15 -to clock_48
set_location_assignment PIN_N1 -to abc_a[15]
set_location_assignment PIN_N2 -to abc_a[14]
set_location_assignment PIN_N3 -to abc_xmemfl_n
set_location_assignment PIN_N5 -to abc_d[2]
set_location_assignment PIN_N6 -to esp_io1
set_location_assignment PIN_N8 -to spi_cs_esp_n
set_location_assignment PIN_N9 -to xabc_op[2]
set_location_assignment PIN_N11 -to xabc_xm_n
set_location_assignment PIN_N12 -to xabc_xio_n
set_location_assignment PIN_N15 -to hdmi_d[1]
set_location_assignment PIN_P1 -to abc_xmemw800_n
set_location_assignment PIN_P2 -to abc_rst_n
set_location_assignment PIN_P3 -to abc_d[0]
set_location_assignment PIN_P6 -to spi_clk
set_location_assignment PIN_P8 -to esp_int
set_location_assignment PIN_P9 -to gpio[1]
set_location_assignment PIN_P14 -to tty_dtr
set_location_assignment PIN_P16 -to "hdmi_d[2](n)"
set_location_assignment PIN_R1 -to abc_xmemw80_n
set_location_assignment PIN_R3 -to abc_d[4]
set_location_assignment PIN_R4 -to abc_d[6]
set_location_assignment PIN_R5 -to abc_d_ce_n
set_location_assignment PIN_R6 -to abc_resin_x
set_location_assignment PIN_R7 -to gpio[5]
set_location_assignment PIN_R8 -to xabc_op[0]
set_location_assignment PIN_R10 -to gpio[3]
set_location_assignment PIN_R11 -to xabc_nmi_n
set_location_assignment PIN_R12 -to xabc_gpio[1]
set_location_assignment PIN_R13 -to hdmi_sda
set_location_assignment PIN_R14 -to led[2]
set_location_assignment PIN_R16 -to hdmi_d[2]
set_location_assignment PIN_T2 -to abc_d[3]
set_location_assignment PIN_T3 -to abc_d[5]
set_location_assignment PIN_T4 -to abc_d[7]
set_location_assignment PIN_T5 -to abc_d_oe
set_location_assignment PIN_T6 -to gpio[2]
set_location_assignment PIN_T7 -to gpio[4]
set_location_assignment PIN_T8 -to abc_clk
set_location_assignment PIN_T9 -to xabc_op[1]
set_location_assignment PIN_T10 -to abc_master
set_location_assignment PIN_T11 -to xabc_gpio[0]
set_location_assignment PIN_T12 -to abc_xinpstb_n
set_location_assignment PIN_T13 -to led[1]
set_location_assignment PIN_T14 -to led[3]
set_location_assignment PIN_T15 -to hdmi_hpd


set_global_assignment -name VERILOG_FILE syncho.v
set_global_assignment -name VERILOG_FILE ip/hdmitx.v
set_global_assignment -name VERILOG_FILE ip/pll.v
set_global_assignment -name SYSTEMVERILOG_FILE transpose.sv
set_global_assignment -name SDC_FILE max80.sdc
set_global_assignment -name SYSTEMVERILOG_FILE max80.sv
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top