max80_fw/output_files/max80.fit.eqn

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--EB1_dataout[0] is sdram:sdram|ddio_out:sr_clk_out|altddio_out:ALTDDIO_OUT_component|ddio_out_rnj:auto_generated|dataout[0] at DDIOOUTCELL_X1_Y29_N32
EB1_dataout[0] = DDIO_OUT(.DATAINHI(GND), .DATAINLO(VCC), , , , );


--G1_dram_a[1] is sdram:sdram|dram_a[1] at FF_X14_Y24_N13
--register power-up is low

G1_dram_a[1] = DFFEAS(G1L109, GLOBAL(U1L23),  ,  , G1L113, A1L56,  ,  , G1_state.st_idle);


--G1_dram_a[2] is sdram:sdram|dram_a[2] at FF_X14_Y24_N25
--register power-up is low

G1_dram_a[2] = DFFEAS(G1L114, GLOBAL(U1L23),  ,  , G1L113, A1L58,  ,  , G1_state.st_idle);


--G1_dram_a[3] is sdram:sdram|dram_a[3] at FF_X14_Y24_N29
--register power-up is low

G1_dram_a[3] = DFFEAS(G1L116, GLOBAL(U1L23),  ,  , G1L113, A1L60,  ,  , G1_state.st_idle);


--G1_dram_a[4] is sdram:sdram|dram_a[4] at FF_X14_Y24_N1
--register power-up is low

G1_dram_a[4] = DFFEAS(G1L118, GLOBAL(U1L23),  ,  , G1L113, abc_mempg[0],  ,  , G1_state.st_idle);


--G1_dram_a[5] is sdram:sdram|dram_a[5] at FF_X14_Y24_N21
--register power-up is low

G1_dram_a[5] = DFFEAS(G1L120, GLOBAL(U1L23),  ,  , G1L113, abc_mempg[1],  ,  , G1_state.st_idle);


--G1_dram_a[6] is sdram:sdram|dram_a[6] at FF_X14_Y24_N17
--register power-up is low

G1_dram_a[6] = DFFEAS(G1L122, GLOBAL(U1L23),  ,  , G1L113, abc_mempg[2],  ,  , G1_state.st_idle);


--G1_dram_a[7] is sdram:sdram|dram_a[7] at FF_X14_Y24_N7
--register power-up is low

G1_dram_a[7] = DFFEAS(G1L124, GLOBAL(U1L23),  ,  , G1L113, abc_mempg[3],  ,  , G1_state.st_idle);


--G1_dram_a[8] is sdram:sdram|dram_a[8] at FF_X14_Y24_N19
--register power-up is low

G1_dram_a[8] = DFFEAS(G1L126, GLOBAL(U1L23),  ,  , G1L113, abc_mempg[4],  ,  , G1_state.st_idle);


--G1_dram_a[9] is sdram:sdram|dram_a[9] at FF_X16_Y26_N5
--register power-up is low

G1_dram_a[9] = DFFEAS(G1L37, GLOBAL(U1L23),  ,  , G1L141, abc_mempg[5],  ,  , G1_state.st_idle);


--G1_dram_a[11] is sdram:sdram|dram_a[11] at FF_X16_Y26_N7
--register power-up is low

G1_dram_a[11] = DFFEAS(G1L28, GLOBAL(U1L23),  ,  , G1L141, abc_mempg[7],  ,  , G1_state.st_idle);


--G1_dram_a[12] is sdram:sdram|dram_a[12] at FF_X16_Y26_N21
--register power-up is low

G1_dram_a[12] = DFFEAS(G1L27, GLOBAL(U1L23),  ,  , G1L141, abc_mempg[8],  ,  , G1_state.st_idle);


--A1L431Q is led_ctr[26]~_Duplicate_1 at FF_X35_Y1_N23
--register power-up is low

A1L431Q = DFFEAS(A1L429, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--A1L435Q is led_ctr[27]~_Duplicate_1 at FF_X35_Y1_N25
--register power-up is low

A1L435Q = DFFEAS(A1L433, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--A1L439Q is led_ctr[28]~_Duplicate_1 at FF_X35_Y1_N27
--register power-up is low

A1L439Q = DFFEAS(A1L437, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--N1_wire_ddio_outa_dataout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[0] at DDIOOUTCELL_X41_Y13_N25
N1_wire_ddio_outa_dataout[0] = DDIO_OUT(.DATAINHI(R1_shift_reg[0]), .DATAINLO(R2_shift_reg[0]), , , .ARESET(!U1_wire_pll1_locked), );


--N1_wire_ddio_outa_dataout[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[1] at DDIOOUTCELL_X41_Y5_N4
N1_wire_ddio_outa_dataout[1] = DDIO_OUT(.DATAINHI(R3_shift_reg[0]), .DATAINLO(R4_shift_reg[0]), , , .ARESET(!U1_wire_pll1_locked), );


--N1_wire_ddio_outa_dataout[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[2] at DDIOOUTCELL_X41_Y3_N11
N1_wire_ddio_outa_dataout[2] = DDIO_OUT(.DATAINHI(R5_shift_reg[0]), .DATAINLO(R6_shift_reg[0]), , , .ARESET(!U1_wire_pll1_locked), );


--Q1_wire_ddio_outa_dataout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out1:outclock_ddio|wire_ddio_outa_dataout[0] at DDIOOUTCELL_X41_Y13_N11
Q1_wire_ddio_outa_dataout[0] = DDIO_OUT(.DATAINHI(P1_shift_reg[0]), .DATAINLO(P2_shift_reg[0]), , , .ARESET(!U1_wire_pll1_locked), );


--U1_wire_pll1_locked is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_locked at PLL_2
U1_wire_pll1_locked = EQUATION NOT SUPPORTED;

--U1_wire_pll1_fbout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_fbout at PLL_2
U1_wire_pll1_fbout = EQUATION NOT SUPPORTED;

--U1_wire_pll1_clk[0] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] at PLL_2
U1_wire_pll1_clk[0] = EQUATION NOT SUPPORTED;

--U1_wire_pll1_clk[1] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1] at PLL_2
U1_wire_pll1_clk[1] = EQUATION NOT SUPPORTED;

--U1_wire_pll1_clk[2] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2] at PLL_2
U1_wire_pll1_clk[2] = EQUATION NOT SUPPORTED;


--G1_next_bank[1] is sdram:sdram|next_bank[1] at FF_X16_Y24_N5
--register power-up is low

G1_next_bank[1] = DFFEAS(G1L236, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_next_bank[2] is sdram:sdram|next_bank[2] at FF_X16_Y24_N7
--register power-up is low

G1_next_bank[2] = DFFEAS(G1L239, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_state.st_wr is sdram:sdram|state.st_wr at FF_X15_Y25_N21
--register power-up is low

G1_state.st_wr = DFFEAS(G1L358, GLOBAL(U1L23), GLOBAL(A1L457),  , G1L360,  ,  , !G1_state.st_idle,  );


--G1_state.st_rd is sdram:sdram|state.st_rd at FF_X15_Y25_N3
--register power-up is low

G1_state.st_rd = DFFEAS(G1L361, GLOBAL(U1L23), GLOBAL(A1L457),  , G1L360,  ,  , !G1_state.st_idle,  );


--G1_state.st_rfsh is sdram:sdram|state.st_rfsh at FF_X15_Y25_N5
--register power-up is low

G1_state.st_rfsh = DFFEAS(G1L366, GLOBAL(U1L23), GLOBAL(A1L457),  , G1L360,  ,  , !G1_state.st_idle,  );


--G1_rfsh_ctr[1] is sdram:sdram|rfsh_ctr[1] at FF_X17_Y26_N1
--register power-up is low

G1_rfsh_ctr[1] = DFFEAS(G1L311, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rfsh_ctr[3] is sdram:sdram|rfsh_ctr[3] at FF_X17_Y26_N5
--register power-up is low

G1_rfsh_ctr[3] = DFFEAS(G1L317, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rfsh_ctr[4] is sdram:sdram|rfsh_ctr[4] at FF_X17_Y26_N7
--register power-up is low

G1_rfsh_ctr[4] = DFFEAS(G1L320, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rfsh_ctr[2] is sdram:sdram|rfsh_ctr[2] at FF_X17_Y26_N3
--register power-up is low

G1_rfsh_ctr[2] = DFFEAS(G1L314, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_next_bank[3] is sdram:sdram|next_bank[3] at FF_X16_Y24_N9
--register power-up is low

G1_next_bank[3] = DFFEAS(G1L242, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[2] is sdram:sdram|col_addr[2] at FF_X17_Y24_N9
--register power-up is low

G1_col_addr[2] = DFFEAS(G1L82, GLOBAL(U1L23),  ,  , G1L84, A1L34,  ,  , G1_state.st_idle);


--G1_next_bank[4] is sdram:sdram|next_bank[4] at FF_X16_Y24_N11
--register power-up is low

G1_next_bank[4] = DFFEAS(G1L245, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[3] is sdram:sdram|col_addr[3] at FF_X17_Y24_N11
--register power-up is low

G1_col_addr[3] = DFFEAS(G1L86, GLOBAL(U1L23),  ,  , G1L84, A1L36,  ,  , G1_state.st_idle);


--G1_next_bank[5] is sdram:sdram|next_bank[5] at FF_X16_Y24_N13
--register power-up is low

G1_next_bank[5] = DFFEAS(G1L248, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[4] is sdram:sdram|col_addr[4] at FF_X17_Y24_N13
--register power-up is low

G1_col_addr[4] = DFFEAS(G1L89, GLOBAL(U1L23),  ,  , G1L84, A1L38,  ,  , G1_state.st_idle);


--G1_next_bank[6] is sdram:sdram|next_bank[6] at FF_X16_Y24_N15
--register power-up is low

G1_next_bank[6] = DFFEAS(G1L251, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[5] is sdram:sdram|col_addr[5] at FF_X17_Y24_N15
--register power-up is low

G1_col_addr[5] = DFFEAS(G1L92, GLOBAL(U1L23),  ,  , G1L84, A1L40,  ,  , G1_state.st_idle);


--G1_next_bank[7] is sdram:sdram|next_bank[7] at FF_X16_Y24_N17
--register power-up is low

G1_next_bank[7] = DFFEAS(G1L254, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[6] is sdram:sdram|col_addr[6] at FF_X17_Y24_N17
--register power-up is low

G1_col_addr[6] = DFFEAS(G1L95, GLOBAL(U1L23),  ,  , G1L84, A1L42,  ,  , G1_state.st_idle);


--G1_next_bank[8] is sdram:sdram|next_bank[8] at FF_X16_Y24_N19
--register power-up is low

G1_next_bank[8] = DFFEAS(G1L257, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[7] is sdram:sdram|col_addr[7] at FF_X17_Y24_N19
--register power-up is low

G1_col_addr[7] = DFFEAS(G1L98, GLOBAL(U1L23),  ,  , G1L84, A1L44,  ,  , G1_state.st_idle);


--G1_next_bank[9] is sdram:sdram|next_bank[9] at FF_X16_Y24_N21
--register power-up is low

G1_next_bank[9] = DFFEAS(G1L260, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[8] is sdram:sdram|col_addr[8] at FF_X17_Y24_N21
--register power-up is low

G1_col_addr[8] = DFFEAS(G1L101, GLOBAL(U1L23),  ,  , G1L84, A1L46,  ,  , G1_state.st_idle);


--G1_next_bank[10] is sdram:sdram|next_bank[10] at FF_X16_Y24_N23
--register power-up is low

G1_next_bank[10] = DFFEAS(G1L263, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_col_addr[9] is sdram:sdram|col_addr[9] at FF_X17_Y24_N23
--register power-up is low

G1_col_addr[9] = DFFEAS(G1L104, GLOBAL(U1L23),  ,  , G1L84, A1L48,  ,  , G1_state.st_idle);


--G1_next_bank[11] is sdram:sdram|next_bank[11] at FF_X16_Y24_N25
--register power-up is low

G1_next_bank[11] = DFFEAS(G1L266, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_next_bank[12] is sdram:sdram|next_bank[12] at FF_X16_Y24_N27
--register power-up is low

G1_next_bank[12] = DFFEAS(G1L269, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_init_ctr[15] is sdram:sdram|init_ctr[15] at FF_X16_Y21_N19
--register power-up is low

G1_init_ctr[15] = DFFEAS(G1L229, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_next_bank[13] is sdram:sdram|next_bank[13] at FF_X16_Y24_N29
--register power-up is low

G1_next_bank[13] = DFFEAS(G1L272, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_next_bank[14] is sdram:sdram|next_bank[14] at FF_X16_Y24_N31
--register power-up is low

G1_next_bank[14] = DFFEAS(G1L275, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_be_q[0] is sdram:sdram|be_q[0] at FF_X11_Y25_N9
--register power-up is low

G1_be_q[0] = DFFEAS(G1L62, GLOBAL(U1L23),  ,  , G1L76, G1_be_q[2],  ,  , !G1_state.st_idle);


--G1_be_q[1] is sdram:sdram|be_q[1] at FF_X11_Y25_N23
--register power-up is low

G1_be_q[1] = DFFEAS(G1L61, GLOBAL(U1L23),  ,  , G1L76, G1_be_q[3],  ,  , !G1_state.st_idle);


--led_ctr[25] is led_ctr[25] at FF_X35_Y1_N21
--register power-up is low

led_ctr[25] = DFFEAS(A1L426, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[24] is led_ctr[24] at FF_X35_Y1_N19
--register power-up is low

led_ctr[24] = DFFEAS(A1L423, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[23] is led_ctr[23] at FF_X35_Y1_N17
--register power-up is low

led_ctr[23] = DFFEAS(A1L420, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[22] is led_ctr[22] at FF_X35_Y1_N15
--register power-up is low

led_ctr[22] = DFFEAS(A1L417, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[21] is led_ctr[21] at FF_X35_Y1_N13
--register power-up is low

led_ctr[21] = DFFEAS(A1L414, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[20] is led_ctr[20] at FF_X35_Y1_N11
--register power-up is low

led_ctr[20] = DFFEAS(A1L411, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[19] is led_ctr[19] at FF_X35_Y1_N9
--register power-up is low

led_ctr[19] = DFFEAS(A1L408, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[18] is led_ctr[18] at FF_X35_Y1_N7
--register power-up is low

led_ctr[18] = DFFEAS(A1L405, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[17] is led_ctr[17] at FF_X35_Y1_N5
--register power-up is low

led_ctr[17] = DFFEAS(A1L402, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[16] is led_ctr[16] at FF_X35_Y1_N3
--register power-up is low

led_ctr[16] = DFFEAS(A1L399, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[15] is led_ctr[15] at FF_X35_Y1_N1
--register power-up is low

led_ctr[15] = DFFEAS(A1L396, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[14] is led_ctr[14] at FF_X35_Y2_N31
--register power-up is low

led_ctr[14] = DFFEAS(A1L393, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[13] is led_ctr[13] at FF_X35_Y2_N29
--register power-up is low

led_ctr[13] = DFFEAS(A1L390, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[12] is led_ctr[12] at FF_X35_Y2_N27
--register power-up is low

led_ctr[12] = DFFEAS(A1L387, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[11] is led_ctr[11] at FF_X35_Y2_N25
--register power-up is low

led_ctr[11] = DFFEAS(A1L384, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[10] is led_ctr[10] at FF_X35_Y2_N23
--register power-up is low

led_ctr[10] = DFFEAS(A1L381, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[9] is led_ctr[9] at FF_X35_Y2_N21
--register power-up is low

led_ctr[9] = DFFEAS(A1L378, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[8] is led_ctr[8] at FF_X35_Y2_N19
--register power-up is low

led_ctr[8] = DFFEAS(A1L375, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[7] is led_ctr[7] at FF_X35_Y2_N17
--register power-up is low

led_ctr[7] = DFFEAS(A1L372, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[6] is led_ctr[6] at FF_X35_Y2_N15
--register power-up is low

led_ctr[6] = DFFEAS(A1L369, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[5] is led_ctr[5] at FF_X35_Y2_N13
--register power-up is low

led_ctr[5] = DFFEAS(A1L366, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[4] is led_ctr[4] at FF_X35_Y2_N11
--register power-up is low

led_ctr[4] = DFFEAS(A1L363, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[3] is led_ctr[3] at FF_X35_Y2_N9
--register power-up is low

led_ctr[3] = DFFEAS(A1L360, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[2] is led_ctr[2] at FF_X35_Y2_N7
--register power-up is low

led_ctr[2] = DFFEAS(A1L357, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[1] is led_ctr[1] at FF_X35_Y2_N5
--register power-up is low

led_ctr[1] = DFFEAS(A1L354, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--A1L354 is led_ctr[1]~28 at LCCOMB_X35_Y2_N4
A1L354 = (led_ctr[0] & (led_ctr[1] $ (VCC))) # (!led_ctr[0] & (led_ctr[1] & VCC));

--A1L355 is led_ctr[1]~29 at LCCOMB_X35_Y2_N4
A1L355 = CARRY((led_ctr[0] & led_ctr[1]));


--A1L357 is led_ctr[2]~30 at LCCOMB_X35_Y2_N6
A1L357 = (led_ctr[2] & (!A1L355)) # (!led_ctr[2] & ((A1L355) # (GND)));

--A1L358 is led_ctr[2]~31 at LCCOMB_X35_Y2_N6
A1L358 = CARRY((!A1L355) # (!led_ctr[2]));


--A1L360 is led_ctr[3]~32 at LCCOMB_X35_Y2_N8
A1L360 = (led_ctr[3] & (A1L358 $ (GND))) # (!led_ctr[3] & (!A1L358 & VCC));

--A1L361 is led_ctr[3]~33 at LCCOMB_X35_Y2_N8
A1L361 = CARRY((led_ctr[3] & !A1L358));


--A1L363 is led_ctr[4]~34 at LCCOMB_X35_Y2_N10
A1L363 = (led_ctr[4] & (!A1L361)) # (!led_ctr[4] & ((A1L361) # (GND)));

--A1L364 is led_ctr[4]~35 at LCCOMB_X35_Y2_N10
A1L364 = CARRY((!A1L361) # (!led_ctr[4]));


--A1L366 is led_ctr[5]~36 at LCCOMB_X35_Y2_N12
A1L366 = (led_ctr[5] & (A1L364 $ (GND))) # (!led_ctr[5] & (!A1L364 & VCC));

--A1L367 is led_ctr[5]~37 at LCCOMB_X35_Y2_N12
A1L367 = CARRY((led_ctr[5] & !A1L364));


--A1L369 is led_ctr[6]~38 at LCCOMB_X35_Y2_N14
A1L369 = (led_ctr[6] & (!A1L367)) # (!led_ctr[6] & ((A1L367) # (GND)));

--A1L370 is led_ctr[6]~39 at LCCOMB_X35_Y2_N14
A1L370 = CARRY((!A1L367) # (!led_ctr[6]));


--A1L372 is led_ctr[7]~40 at LCCOMB_X35_Y2_N16
A1L372 = (led_ctr[7] & (A1L370 $ (GND))) # (!led_ctr[7] & (!A1L370 & VCC));

--A1L373 is led_ctr[7]~41 at LCCOMB_X35_Y2_N16
A1L373 = CARRY((led_ctr[7] & !A1L370));


--A1L375 is led_ctr[8]~42 at LCCOMB_X35_Y2_N18
A1L375 = (led_ctr[8] & (!A1L373)) # (!led_ctr[8] & ((A1L373) # (GND)));

--A1L376 is led_ctr[8]~43 at LCCOMB_X35_Y2_N18
A1L376 = CARRY((!A1L373) # (!led_ctr[8]));


--A1L378 is led_ctr[9]~44 at LCCOMB_X35_Y2_N20
A1L378 = (led_ctr[9] & (A1L376 $ (GND))) # (!led_ctr[9] & (!A1L376 & VCC));

--A1L379 is led_ctr[9]~45 at LCCOMB_X35_Y2_N20
A1L379 = CARRY((led_ctr[9] & !A1L376));


--A1L381 is led_ctr[10]~46 at LCCOMB_X35_Y2_N22
A1L381 = (led_ctr[10] & (!A1L379)) # (!led_ctr[10] & ((A1L379) # (GND)));

--A1L382 is led_ctr[10]~47 at LCCOMB_X35_Y2_N22
A1L382 = CARRY((!A1L379) # (!led_ctr[10]));


--A1L384 is led_ctr[11]~48 at LCCOMB_X35_Y2_N24
A1L384 = (led_ctr[11] & (A1L382 $ (GND))) # (!led_ctr[11] & (!A1L382 & VCC));

--A1L385 is led_ctr[11]~49 at LCCOMB_X35_Y2_N24
A1L385 = CARRY((led_ctr[11] & !A1L382));


--A1L387 is led_ctr[12]~50 at LCCOMB_X35_Y2_N26
A1L387 = (led_ctr[12] & (!A1L385)) # (!led_ctr[12] & ((A1L385) # (GND)));

--A1L388 is led_ctr[12]~51 at LCCOMB_X35_Y2_N26
A1L388 = CARRY((!A1L385) # (!led_ctr[12]));


--A1L390 is led_ctr[13]~52 at LCCOMB_X35_Y2_N28
A1L390 = (led_ctr[13] & (A1L388 $ (GND))) # (!led_ctr[13] & (!A1L388 & VCC));

--A1L391 is led_ctr[13]~53 at LCCOMB_X35_Y2_N28
A1L391 = CARRY((led_ctr[13] & !A1L388));


--A1L393 is led_ctr[14]~54 at LCCOMB_X35_Y2_N30
A1L393 = (led_ctr[14] & (!A1L391)) # (!led_ctr[14] & ((A1L391) # (GND)));

--A1L394 is led_ctr[14]~55 at LCCOMB_X35_Y2_N30
A1L394 = CARRY((!A1L391) # (!led_ctr[14]));


--A1L396 is led_ctr[15]~56 at LCCOMB_X35_Y1_N0
A1L396 = (led_ctr[15] & (A1L394 $ (GND))) # (!led_ctr[15] & (!A1L394 & VCC));

--A1L397 is led_ctr[15]~57 at LCCOMB_X35_Y1_N0
A1L397 = CARRY((led_ctr[15] & !A1L394));


--A1L399 is led_ctr[16]~58 at LCCOMB_X35_Y1_N2
A1L399 = (led_ctr[16] & (!A1L397)) # (!led_ctr[16] & ((A1L397) # (GND)));

--A1L400 is led_ctr[16]~59 at LCCOMB_X35_Y1_N2
A1L400 = CARRY((!A1L397) # (!led_ctr[16]));


--A1L402 is led_ctr[17]~60 at LCCOMB_X35_Y1_N4
A1L402 = (led_ctr[17] & (A1L400 $ (GND))) # (!led_ctr[17] & (!A1L400 & VCC));

--A1L403 is led_ctr[17]~61 at LCCOMB_X35_Y1_N4
A1L403 = CARRY((led_ctr[17] & !A1L400));


--A1L405 is led_ctr[18]~62 at LCCOMB_X35_Y1_N6
A1L405 = (led_ctr[18] & (!A1L403)) # (!led_ctr[18] & ((A1L403) # (GND)));

--A1L406 is led_ctr[18]~63 at LCCOMB_X35_Y1_N6
A1L406 = CARRY((!A1L403) # (!led_ctr[18]));


--A1L408 is led_ctr[19]~64 at LCCOMB_X35_Y1_N8
A1L408 = (led_ctr[19] & (A1L406 $ (GND))) # (!led_ctr[19] & (!A1L406 & VCC));

--A1L409 is led_ctr[19]~65 at LCCOMB_X35_Y1_N8
A1L409 = CARRY((led_ctr[19] & !A1L406));


--A1L411 is led_ctr[20]~66 at LCCOMB_X35_Y1_N10
A1L411 = (led_ctr[20] & (!A1L409)) # (!led_ctr[20] & ((A1L409) # (GND)));

--A1L412 is led_ctr[20]~67 at LCCOMB_X35_Y1_N10
A1L412 = CARRY((!A1L409) # (!led_ctr[20]));


--A1L414 is led_ctr[21]~68 at LCCOMB_X35_Y1_N12
A1L414 = (led_ctr[21] & (A1L412 $ (GND))) # (!led_ctr[21] & (!A1L412 & VCC));

--A1L415 is led_ctr[21]~69 at LCCOMB_X35_Y1_N12
A1L415 = CARRY((led_ctr[21] & !A1L412));


--A1L417 is led_ctr[22]~70 at LCCOMB_X35_Y1_N14
A1L417 = (led_ctr[22] & (!A1L415)) # (!led_ctr[22] & ((A1L415) # (GND)));

--A1L418 is led_ctr[22]~71 at LCCOMB_X35_Y1_N14
A1L418 = CARRY((!A1L415) # (!led_ctr[22]));


--A1L420 is led_ctr[23]~72 at LCCOMB_X35_Y1_N16
A1L420 = (led_ctr[23] & (A1L418 $ (GND))) # (!led_ctr[23] & (!A1L418 & VCC));

--A1L421 is led_ctr[23]~73 at LCCOMB_X35_Y1_N16
A1L421 = CARRY((led_ctr[23] & !A1L418));


--A1L423 is led_ctr[24]~74 at LCCOMB_X35_Y1_N18
A1L423 = (led_ctr[24] & (!A1L421)) # (!led_ctr[24] & ((A1L421) # (GND)));

--A1L424 is led_ctr[24]~75 at LCCOMB_X35_Y1_N18
A1L424 = CARRY((!A1L421) # (!led_ctr[24]));


--A1L426 is led_ctr[25]~76 at LCCOMB_X35_Y1_N20
A1L426 = (led_ctr[25] & (A1L424 $ (GND))) # (!led_ctr[25] & (!A1L424 & VCC));

--A1L427 is led_ctr[25]~77 at LCCOMB_X35_Y1_N20
A1L427 = CARRY((led_ctr[25] & !A1L424));


--A1L429 is led_ctr[26]~78 at LCCOMB_X35_Y1_N22
A1L429 = (A1L431Q & (!A1L427)) # (!A1L431Q & ((A1L427) # (GND)));

--A1L430 is led_ctr[26]~79 at LCCOMB_X35_Y1_N22
A1L430 = CARRY((!A1L427) # (!A1L431Q));


--A1L433 is led_ctr[27]~80 at LCCOMB_X35_Y1_N24
A1L433 = (A1L435Q & (A1L430 $ (GND))) # (!A1L435Q & (!A1L430 & VCC));

--A1L434 is led_ctr[27]~81 at LCCOMB_X35_Y1_N24
A1L434 = CARRY((A1L435Q & !A1L430));


--A1L437 is led_ctr[28]~82 at LCCOMB_X35_Y1_N26
A1L437 = A1L439Q $ (A1L434);


--K1_wire_lvds_tx_pll_locked is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_locked at PLL_1
K1_wire_lvds_tx_pll_locked = EQUATION NOT SUPPORTED;

--K1_wire_lvds_tx_pll_fbout is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_fbout at PLL_1
K1_wire_lvds_tx_pll_fbout = EQUATION NOT SUPPORTED;

--K1_fast_clock is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock at PLL_1
K1_fast_clock = EQUATION NOT SUPPORTED;

--K1_tx_coreclock is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_coreclock at PLL_1
K1_tx_coreclock = EQUATION NOT SUPPORTED;


--V1_wire_le_comb8_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le:altpll_dyn_phase_le2|wire_le_comb8_combout at LCCOMB_X40_Y28_N12
V1_wire_le_comb8_combout = (U1_remap_decoy_le3a_2) # ((!U1_remap_decoy_le3a_1 & U1_remap_decoy_le3a_0));


--W1_wire_le_comb9_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le1:altpll_dyn_phase_le4|wire_le_comb9_combout at LCCOMB_X40_Y28_N18
W1_wire_le_comb9_combout = (U1_remap_decoy_le3a_2) # ((U1_remap_decoy_le3a_1 & !U1_remap_decoy_le3a_0));


--X1_wire_le_comb10_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le12:altpll_dyn_phase_le5|wire_le_comb10_combout at LCCOMB_X40_Y28_N20
X1_wire_le_comb10_combout = (U1_remap_decoy_le3a_2 & ((U1_remap_decoy_le3a_1) # (U1_remap_decoy_le3a_0))) # (!U1_remap_decoy_le3a_2 & (U1_remap_decoy_le3a_1 & U1_remap_decoy_le3a_0));


--A1L1 is Add0~0 at LCCOMB_X11_Y4_N2
A1L1 = (rst_ctr[0] & (rst_ctr[1] $ (VCC))) # (!rst_ctr[0] & (rst_ctr[1] & VCC));

--A1L2 is Add0~1 at LCCOMB_X11_Y4_N2
A1L2 = CARRY((rst_ctr[0] & rst_ctr[1]));


--A1L3 is Add0~2 at LCCOMB_X11_Y4_N4
A1L3 = (rst_ctr[2] & (!A1L2)) # (!rst_ctr[2] & ((A1L2) # (GND)));

--A1L4 is Add0~3 at LCCOMB_X11_Y4_N4
A1L4 = CARRY((!A1L2) # (!rst_ctr[2]));


--A1L5 is Add0~4 at LCCOMB_X11_Y4_N6
A1L5 = (rst_ctr[3] & (A1L4 $ (GND))) # (!rst_ctr[3] & (!A1L4 & VCC));

--A1L6 is Add0~5 at LCCOMB_X11_Y4_N6
A1L6 = CARRY((rst_ctr[3] & !A1L4));


--A1L7 is Add0~6 at LCCOMB_X11_Y4_N8
A1L7 = (rst_ctr[4] & (!A1L6)) # (!rst_ctr[4] & ((A1L6) # (GND)));

--A1L8 is Add0~7 at LCCOMB_X11_Y4_N8
A1L8 = CARRY((!A1L6) # (!rst_ctr[4]));


--A1L9 is Add0~8 at LCCOMB_X11_Y4_N10
A1L9 = (rst_ctr[5] & (A1L8 $ (GND))) # (!rst_ctr[5] & (!A1L8 & VCC));

--A1L10 is Add0~9 at LCCOMB_X11_Y4_N10
A1L10 = CARRY((rst_ctr[5] & !A1L8));


--A1L11 is Add0~10 at LCCOMB_X11_Y4_N12
A1L11 = (rst_ctr[6] & (!A1L10)) # (!rst_ctr[6] & ((A1L10) # (GND)));

--A1L12 is Add0~11 at LCCOMB_X11_Y4_N12
A1L12 = CARRY((!A1L10) # (!rst_ctr[6]));


--A1L13 is Add0~12 at LCCOMB_X11_Y4_N14
A1L13 = (rst_ctr[7] & (A1L12 $ (GND))) # (!rst_ctr[7] & (!A1L12 & VCC));

--A1L14 is Add0~13 at LCCOMB_X11_Y4_N14
A1L14 = CARRY((rst_ctr[7] & !A1L12));


--A1L15 is Add0~14 at LCCOMB_X11_Y4_N16
A1L15 = (rst_ctr[8] & (!A1L14)) # (!rst_ctr[8] & ((A1L14) # (GND)));

--A1L16 is Add0~15 at LCCOMB_X11_Y4_N16
A1L16 = CARRY((!A1L14) # (!rst_ctr[8]));


--A1L17 is Add0~16 at LCCOMB_X11_Y4_N18
A1L17 = (rst_ctr[9] & (A1L16 $ (GND))) # (!rst_ctr[9] & (!A1L16 & VCC));

--A1L18 is Add0~17 at LCCOMB_X11_Y4_N18
A1L18 = CARRY((rst_ctr[9] & !A1L16));


--A1L19 is Add0~18 at LCCOMB_X11_Y4_N20
A1L19 = (rst_ctr[10] & (!A1L18)) # (!rst_ctr[10] & ((A1L18) # (GND)));

--A1L20 is Add0~19 at LCCOMB_X11_Y4_N20
A1L20 = CARRY((!A1L18) # (!rst_ctr[10]));


--A1L21 is Add0~20 at LCCOMB_X11_Y4_N22
A1L21 = (rst_ctr[11] & (A1L20 $ (GND))) # (!rst_ctr[11] & (!A1L20 & VCC));

--A1L22 is Add0~21 at LCCOMB_X11_Y4_N22
A1L22 = CARRY((rst_ctr[11] & !A1L20));


--A1L23 is Add0~22 at LCCOMB_X11_Y4_N24
A1L23 = A1L22;


--G1L236 is sdram:sdram|next_bank[1]~14 at LCCOMB_X16_Y24_N4
G1L236 = (G1_dram_ba[1] & (G1_dram_ba[0] $ (VCC))) # (!G1_dram_ba[1] & (G1_dram_ba[0] & VCC));

--G1L237 is sdram:sdram|next_bank[1]~15 at LCCOMB_X16_Y24_N4
G1L237 = CARRY((G1_dram_ba[1] & G1_dram_ba[0]));


--G1L239 is sdram:sdram|next_bank[2]~16 at LCCOMB_X16_Y24_N6
G1L239 = (G1_dram_a[0] & (!G1L237)) # (!G1_dram_a[0] & ((G1L237) # (GND)));

--G1L240 is sdram:sdram|next_bank[2]~17 at LCCOMB_X16_Y24_N6
G1L240 = CARRY((!G1L237) # (!G1_dram_a[0]));


--G1L311 is sdram:sdram|rfsh_ctr[1]~8 at LCCOMB_X17_Y26_N0
G1L311 = (G1_rfsh_ctr[0] & (G1_rfsh_ctr[1] $ (VCC))) # (!G1_rfsh_ctr[0] & (G1_rfsh_ctr[1] & VCC));

--G1L312 is sdram:sdram|rfsh_ctr[1]~9 at LCCOMB_X17_Y26_N0
G1L312 = CARRY((G1_rfsh_ctr[0] & G1_rfsh_ctr[1]));


--G1L314 is sdram:sdram|rfsh_ctr[2]~10 at LCCOMB_X17_Y26_N2
G1L314 = (G1_rfsh_ctr[2] & (!G1L312)) # (!G1_rfsh_ctr[2] & ((G1L312) # (GND)));

--G1L315 is sdram:sdram|rfsh_ctr[2]~11 at LCCOMB_X17_Y26_N2
G1L315 = CARRY((!G1L312) # (!G1_rfsh_ctr[2]));


--G1L317 is sdram:sdram|rfsh_ctr[3]~12 at LCCOMB_X17_Y26_N4
G1L317 = (G1_rfsh_ctr[3] & (G1L315 $ (GND))) # (!G1_rfsh_ctr[3] & (!G1L315 & VCC));

--G1L318 is sdram:sdram|rfsh_ctr[3]~13 at LCCOMB_X17_Y26_N4
G1L318 = CARRY((G1_rfsh_ctr[3] & !G1L315));


--G1L320 is sdram:sdram|rfsh_ctr[4]~14 at LCCOMB_X17_Y26_N6
G1L320 = (G1_rfsh_ctr[4] & (!G1L318)) # (!G1_rfsh_ctr[4] & ((G1L318) # (GND)));

--G1L321 is sdram:sdram|rfsh_ctr[4]~15 at LCCOMB_X17_Y26_N6
G1L321 = CARRY((!G1L318) # (!G1_rfsh_ctr[4]));


--G1L242 is sdram:sdram|next_bank[3]~18 at LCCOMB_X16_Y24_N8
G1L242 = (G1_dram_a[1] & (G1L240 $ (GND))) # (!G1_dram_a[1] & (!G1L240 & VCC));

--G1L243 is sdram:sdram|next_bank[3]~19 at LCCOMB_X16_Y24_N8
G1L243 = CARRY((G1_dram_a[1] & !G1L240));


--G1L82 is sdram:sdram|col_addr[2]~8 at LCCOMB_X17_Y24_N8
G1L82 = G1_col_addr[2] $ (VCC);

--G1L83 is sdram:sdram|col_addr[2]~9 at LCCOMB_X17_Y24_N8
G1L83 = CARRY(G1_col_addr[2]);


--G1L245 is sdram:sdram|next_bank[4]~20 at LCCOMB_X16_Y24_N10
G1L245 = (G1_dram_a[2] & (!G1L243)) # (!G1_dram_a[2] & ((G1L243) # (GND)));

--G1L246 is sdram:sdram|next_bank[4]~21 at LCCOMB_X16_Y24_N10
G1L246 = CARRY((!G1L243) # (!G1_dram_a[2]));


--G1L86 is sdram:sdram|col_addr[3]~11 at LCCOMB_X17_Y24_N10
G1L86 = (G1_col_addr[3] & (!G1L83)) # (!G1_col_addr[3] & ((G1L83) # (GND)));

--G1L87 is sdram:sdram|col_addr[3]~12 at LCCOMB_X17_Y24_N10
G1L87 = CARRY((!G1L83) # (!G1_col_addr[3]));


--G1L248 is sdram:sdram|next_bank[5]~22 at LCCOMB_X16_Y24_N12
G1L248 = (G1_dram_a[3] & (G1L246 $ (GND))) # (!G1_dram_a[3] & (!G1L246 & VCC));

--G1L249 is sdram:sdram|next_bank[5]~23 at LCCOMB_X16_Y24_N12
G1L249 = CARRY((G1_dram_a[3] & !G1L246));


--G1L89 is sdram:sdram|col_addr[4]~13 at LCCOMB_X17_Y24_N12
G1L89 = (G1_col_addr[4] & (G1L87 $ (GND))) # (!G1_col_addr[4] & (!G1L87 & VCC));

--G1L90 is sdram:sdram|col_addr[4]~14 at LCCOMB_X17_Y24_N12
G1L90 = CARRY((G1_col_addr[4] & !G1L87));


--G1L251 is sdram:sdram|next_bank[6]~24 at LCCOMB_X16_Y24_N14
G1L251 = (G1_dram_a[4] & (!G1L249)) # (!G1_dram_a[4] & ((G1L249) # (GND)));

--G1L252 is sdram:sdram|next_bank[6]~25 at LCCOMB_X16_Y24_N14
G1L252 = CARRY((!G1L249) # (!G1_dram_a[4]));


--G1L92 is sdram:sdram|col_addr[5]~15 at LCCOMB_X17_Y24_N14
G1L92 = (G1_col_addr[5] & (!G1L90)) # (!G1_col_addr[5] & ((G1L90) # (GND)));

--G1L93 is sdram:sdram|col_addr[5]~16 at LCCOMB_X17_Y24_N14
G1L93 = CARRY((!G1L90) # (!G1_col_addr[5]));


--G1L254 is sdram:sdram|next_bank[7]~26 at LCCOMB_X16_Y24_N16
G1L254 = (G1_dram_a[5] & (G1L252 $ (GND))) # (!G1_dram_a[5] & (!G1L252 & VCC));

--G1L255 is sdram:sdram|next_bank[7]~27 at LCCOMB_X16_Y24_N16
G1L255 = CARRY((G1_dram_a[5] & !G1L252));


--G1L95 is sdram:sdram|col_addr[6]~17 at LCCOMB_X17_Y24_N16
G1L95 = (G1_col_addr[6] & (G1L93 $ (GND))) # (!G1_col_addr[6] & (!G1L93 & VCC));

--G1L96 is sdram:sdram|col_addr[6]~18 at LCCOMB_X17_Y24_N16
G1L96 = CARRY((G1_col_addr[6] & !G1L93));


--G1L257 is sdram:sdram|next_bank[8]~28 at LCCOMB_X16_Y24_N18
G1L257 = (G1_dram_a[6] & (!G1L255)) # (!G1_dram_a[6] & ((G1L255) # (GND)));

--G1L258 is sdram:sdram|next_bank[8]~29 at LCCOMB_X16_Y24_N18
G1L258 = CARRY((!G1L255) # (!G1_dram_a[6]));


--G1L98 is sdram:sdram|col_addr[7]~19 at LCCOMB_X17_Y24_N18
G1L98 = (G1_col_addr[7] & (!G1L96)) # (!G1_col_addr[7] & ((G1L96) # (GND)));

--G1L99 is sdram:sdram|col_addr[7]~20 at LCCOMB_X17_Y24_N18
G1L99 = CARRY((!G1L96) # (!G1_col_addr[7]));


--G1L260 is sdram:sdram|next_bank[9]~30 at LCCOMB_X16_Y24_N20
G1L260 = (G1_dram_a[7] & (G1L258 $ (GND))) # (!G1_dram_a[7] & (!G1L258 & VCC));

--G1L261 is sdram:sdram|next_bank[9]~31 at LCCOMB_X16_Y24_N20
G1L261 = CARRY((G1_dram_a[7] & !G1L258));


--G1L101 is sdram:sdram|col_addr[8]~21 at LCCOMB_X17_Y24_N20
G1L101 = (G1_col_addr[8] & (G1L99 $ (GND))) # (!G1_col_addr[8] & (!G1L99 & VCC));

--G1L102 is sdram:sdram|col_addr[8]~22 at LCCOMB_X17_Y24_N20
G1L102 = CARRY((G1_col_addr[8] & !G1L99));


--G1L263 is sdram:sdram|next_bank[10]~32 at LCCOMB_X16_Y24_N22
G1L263 = (G1_dram_a[8] & (!G1L261)) # (!G1_dram_a[8] & ((G1L261) # (GND)));

--G1L264 is sdram:sdram|next_bank[10]~33 at LCCOMB_X16_Y24_N22
G1L264 = CARRY((!G1L261) # (!G1_dram_a[8]));


--G1L104 is sdram:sdram|col_addr[9]~23 at LCCOMB_X17_Y24_N22
G1L104 = G1_col_addr[9] $ (G1L102);


--G1L266 is sdram:sdram|next_bank[11]~34 at LCCOMB_X16_Y24_N24
G1L266 = (G1_dram_a[9] & (G1L264 $ (GND))) # (!G1_dram_a[9] & (!G1L264 & VCC));

--G1L267 is sdram:sdram|next_bank[11]~35 at LCCOMB_X16_Y24_N24
G1L267 = CARRY((G1_dram_a[9] & !G1L264));


--G1L269 is sdram:sdram|next_bank[12]~36 at LCCOMB_X16_Y24_N26
G1L269 = (G1L129Q & (!G1L267)) # (!G1L129Q & ((G1L267) # (GND)));

--G1L270 is sdram:sdram|next_bank[12]~37 at LCCOMB_X16_Y24_N26
G1L270 = CARRY((!G1L267) # (!G1L129Q));


--G1_init_ctr[14] is sdram:sdram|init_ctr[14] at FF_X16_Y21_N17
--register power-up is low

G1_init_ctr[14] = DFFEAS(G1L226, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_init_ctr[13] is sdram:sdram|init_ctr[13] at FF_X16_Y21_N15
--register power-up is low

G1_init_ctr[13] = DFFEAS(G1L223, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_init_ctr[12] is sdram:sdram|init_ctr[12] at FF_X16_Y21_N13
--register power-up is low

G1_init_ctr[12] = DFFEAS(G1L220, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_init_ctr[11] is sdram:sdram|init_ctr[11] at FF_X16_Y21_N11
--register power-up is low

G1_init_ctr[11] = DFFEAS(G1L217, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_init_ctr[10] is sdram:sdram|init_ctr[10] at FF_X16_Y21_N9
--register power-up is low

G1_init_ctr[10] = DFFEAS(G1L214, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_init_ctr[9] is sdram:sdram|init_ctr[9] at FF_X16_Y21_N7
--register power-up is low

G1_init_ctr[9] = DFFEAS(G1L211, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rfsh_ctr[8] is sdram:sdram|rfsh_ctr[8] at FF_X17_Y26_N15
--register power-up is low

G1_rfsh_ctr[8] = DFFEAS(G1L332, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L211 is sdram:sdram|init_ctr[9]~7 at LCCOMB_X16_Y21_N6
G1L211 = (G1_init_ctr[9] & (G1_rfsh_tick $ (VCC))) # (!G1_init_ctr[9] & (G1_rfsh_tick & VCC));

--G1L212 is sdram:sdram|init_ctr[9]~8 at LCCOMB_X16_Y21_N6
G1L212 = CARRY((G1_init_ctr[9] & G1_rfsh_tick));


--G1L214 is sdram:sdram|init_ctr[10]~9 at LCCOMB_X16_Y21_N8
G1L214 = (G1_init_ctr[10] & (!G1L212)) # (!G1_init_ctr[10] & ((G1L212) # (GND)));

--G1L215 is sdram:sdram|init_ctr[10]~10 at LCCOMB_X16_Y21_N8
G1L215 = CARRY((!G1L212) # (!G1_init_ctr[10]));


--G1L217 is sdram:sdram|init_ctr[11]~11 at LCCOMB_X16_Y21_N10
G1L217 = (G1_init_ctr[11] & (G1L215 $ (GND))) # (!G1_init_ctr[11] & (!G1L215 & VCC));

--G1L218 is sdram:sdram|init_ctr[11]~12 at LCCOMB_X16_Y21_N10
G1L218 = CARRY((G1_init_ctr[11] & !G1L215));


--G1L220 is sdram:sdram|init_ctr[12]~13 at LCCOMB_X16_Y21_N12
G1L220 = (G1_init_ctr[12] & (!G1L218)) # (!G1_init_ctr[12] & ((G1L218) # (GND)));

--G1L221 is sdram:sdram|init_ctr[12]~14 at LCCOMB_X16_Y21_N12
G1L221 = CARRY((!G1L218) # (!G1_init_ctr[12]));


--G1L223 is sdram:sdram|init_ctr[13]~15 at LCCOMB_X16_Y21_N14
G1L223 = (G1_init_ctr[13] & (G1L221 $ (GND))) # (!G1_init_ctr[13] & (!G1L221 & VCC));

--G1L224 is sdram:sdram|init_ctr[13]~16 at LCCOMB_X16_Y21_N14
G1L224 = CARRY((G1_init_ctr[13] & !G1L221));


--G1L226 is sdram:sdram|init_ctr[14]~17 at LCCOMB_X16_Y21_N16
G1L226 = (G1_init_ctr[14] & (!G1L224)) # (!G1_init_ctr[14] & ((G1L224) # (GND)));

--G1L227 is sdram:sdram|init_ctr[14]~18 at LCCOMB_X16_Y21_N16
G1L227 = CARRY((!G1L224) # (!G1_init_ctr[14]));


--G1L229 is sdram:sdram|init_ctr[15]~19 at LCCOMB_X16_Y21_N18
G1L229 = G1_init_ctr[15] $ (!G1L227);


--G1L272 is sdram:sdram|next_bank[13]~38 at LCCOMB_X16_Y24_N28
G1L272 = (G1_dram_a[11] & (G1L270 $ (GND))) # (!G1_dram_a[11] & (!G1L270 & VCC));

--G1L273 is sdram:sdram|next_bank[13]~39 at LCCOMB_X16_Y24_N28
G1L273 = CARRY((G1_dram_a[11] & !G1L270));


--G1L275 is sdram:sdram|next_bank[14]~40 at LCCOMB_X16_Y24_N30
G1L275 = G1L273 $ (G1_dram_a[12]);


--G1_be_q[2] is sdram:sdram|be_q[2] at FF_X12_Y25_N1
--register power-up is low

G1_be_q[2] = DFFEAS(G1L60, GLOBAL(U1L23),  ,  , G1L76,  ,  , !G1_state.st_idle,  );


--G1_be_q[3] is sdram:sdram|be_q[3] at FF_X12_Y25_N11
--register power-up is low

G1_be_q[3] = DFFEAS(G1L59, GLOBAL(U1L23),  ,  , G1L76,  ,  , !G1_state.st_idle,  );


--G1_rfsh_ctr[7] is sdram:sdram|rfsh_ctr[7] at FF_X17_Y26_N13
--register power-up is low

G1_rfsh_ctr[7] = DFFEAS(G1L329, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rfsh_ctr[6] is sdram:sdram|rfsh_ctr[6] at FF_X17_Y26_N11
--register power-up is low

G1_rfsh_ctr[6] = DFFEAS(G1L326, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rfsh_ctr[5] is sdram:sdram|rfsh_ctr[5] at FF_X17_Y26_N9
--register power-up is low

G1_rfsh_ctr[5] = DFFEAS(G1L323, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L323 is sdram:sdram|rfsh_ctr[5]~16 at LCCOMB_X17_Y26_N8
G1L323 = (G1_rfsh_ctr[5] & (G1L321 $ (GND))) # (!G1_rfsh_ctr[5] & (!G1L321 & VCC));

--G1L324 is sdram:sdram|rfsh_ctr[5]~17 at LCCOMB_X17_Y26_N8
G1L324 = CARRY((G1_rfsh_ctr[5] & !G1L321));


--G1L326 is sdram:sdram|rfsh_ctr[6]~18 at LCCOMB_X17_Y26_N10
G1L326 = (G1_rfsh_ctr[6] & (!G1L324)) # (!G1_rfsh_ctr[6] & ((G1L324) # (GND)));

--G1L327 is sdram:sdram|rfsh_ctr[6]~19 at LCCOMB_X17_Y26_N10
G1L327 = CARRY((!G1L324) # (!G1_rfsh_ctr[6]));


--G1L329 is sdram:sdram|rfsh_ctr[7]~20 at LCCOMB_X17_Y26_N12
G1L329 = (G1_rfsh_ctr[7] & (G1L327 $ (GND))) # (!G1_rfsh_ctr[7] & (!G1L327 & VCC));

--G1L330 is sdram:sdram|rfsh_ctr[7]~21 at LCCOMB_X17_Y26_N12
G1L330 = CARRY((G1_rfsh_ctr[7] & !G1L327));


--G1L332 is sdram:sdram|rfsh_ctr[8]~22 at LCCOMB_X17_Y26_N14
G1L332 = G1_rfsh_ctr[8] $ (G1L330);


--C1_qreg[6] is tmdsenc:hdmitmds[0].enc|qreg[6] at FF_X33_Y12_N21
--register power-up is low

C1_qreg[6] = DFFEAS(C1L58, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C2_qreg[0] is tmdsenc:hdmitmds[1].enc|qreg[0] at FF_X31_Y12_N5
--register power-up is low

C2_qreg[0] = DFFEAS(C2L63, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3_qreg[0] is tmdsenc:hdmitmds[2].enc|qreg[0] at FF_X31_Y11_N11
--register power-up is low

C3_qreg[0] = DFFEAS(C3L62, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[3] is tmdsenc:hdmitmds[2].enc|disparity[3] at FF_X31_Y11_N9
--register power-up is low

C3_disparity[3] = DFFEAS(C3L42, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[0] is tmdsenc:hdmitmds[2].enc|disparity[0] at FF_X31_Y11_N3
--register power-up is low

C3_disparity[0] = DFFEAS(C3L33, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[1] is tmdsenc:hdmitmds[2].enc|disparity[1] at FF_X31_Y11_N5
--register power-up is low

C3_disparity[1] = DFFEAS(C3L36, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[2] is tmdsenc:hdmitmds[2].enc|disparity[2] at FF_X31_Y11_N7
--register power-up is low

C3_disparity[2] = DFFEAS(C3L39, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[3] is tmdsenc:hdmitmds[0].enc|disparity[3] at FF_X31_Y14_N9
--register power-up is low

C1_disparity[3] = DFFEAS(C1L44, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[0] is tmdsenc:hdmitmds[0].enc|disparity[0] at FF_X31_Y14_N3
--register power-up is low

C1_disparity[0] = DFFEAS(C1L35, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[1] is tmdsenc:hdmitmds[0].enc|disparity[1] at FF_X31_Y14_N5
--register power-up is low

C1_disparity[1] = DFFEAS(C1L38, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[2] is tmdsenc:hdmitmds[0].enc|disparity[2] at FF_X31_Y14_N7
--register power-up is low

C1_disparity[2] = DFFEAS(C1L41, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C2_qreg[4] is tmdsenc:hdmitmds[1].enc|qreg[4] at FF_X33_Y12_N7
--register power-up is low

C2_qreg[4] = DFFEAS(C2L55, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C2_disparity[3] is tmdsenc:hdmitmds[1].enc|disparity[3] at FF_X31_Y12_N15
--register power-up is low

C2_disparity[3] = DFFEAS(C2L44, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[0] is tmdsenc:hdmitmds[1].enc|disparity[0] at FF_X31_Y12_N9
--register power-up is low

C2_disparity[0] = DFFEAS(C2L35, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[1] is tmdsenc:hdmitmds[1].enc|disparity[1] at FF_X31_Y12_N11
--register power-up is low

C2_disparity[1] = DFFEAS(C2L38, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[2] is tmdsenc:hdmitmds[1].enc|disparity[2] at FF_X31_Y12_N13
--register power-up is low

C2_disparity[2] = DFFEAS(C2L41, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3_qreg[4] is tmdsenc:hdmitmds[2].enc|qreg[4] at FF_X33_Y12_N13
--register power-up is low

C3_qreg[4] = DFFEAS(C3L53, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[1] is tmdsenc:hdmitmds[2].enc|qreg[1] at FF_X32_Y11_N29
--register power-up is low

C3_qreg[1] = DFFEAS(C3L64, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C1_qreg[0] is tmdsenc:hdmitmds[0].enc|qreg[0] at FF_X32_Y14_N9
--register power-up is low

C1_qreg[0] = DFFEAS(C1L66, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C3L32 is tmdsenc:hdmitmds[2].enc|disparity[0]~5 at LCCOMB_X31_Y11_N0
C3L32 = CARRY(C3L25);


--C3L33 is tmdsenc:hdmitmds[2].enc|disparity[0]~6 at LCCOMB_X31_Y11_N2
C3L33 = (C3L23 & ((C3_disparity[0] & (C3L32 & VCC)) # (!C3_disparity[0] & (!C3L32)))) # (!C3L23 & ((C3_disparity[0] & (!C3L32)) # (!C3_disparity[0] & ((C3L32) # (GND)))));

--C3L34 is tmdsenc:hdmitmds[2].enc|disparity[0]~7 at LCCOMB_X31_Y11_N2
C3L34 = CARRY((C3L23 & (!C3_disparity[0] & !C3L32)) # (!C3L23 & ((!C3L32) # (!C3_disparity[0]))));


--C3L36 is tmdsenc:hdmitmds[2].enc|disparity[1]~8 at LCCOMB_X31_Y11_N4
C3L36 = ((C3L22 $ (C3_disparity[1] $ (!C3L34)))) # (GND);

--C3L37 is tmdsenc:hdmitmds[2].enc|disparity[1]~9 at LCCOMB_X31_Y11_N4
C3L37 = CARRY((C3L22 & ((C3_disparity[1]) # (!C3L34))) # (!C3L22 & (C3_disparity[1] & !C3L34)));


--C3L39 is tmdsenc:hdmitmds[2].enc|disparity[2]~10 at LCCOMB_X31_Y11_N6
C3L39 = (C3_disparity[2] & ((C3L20 & (C3L37 & VCC)) # (!C3L20 & (!C3L37)))) # (!C3_disparity[2] & ((C3L20 & (!C3L37)) # (!C3L20 & ((C3L37) # (GND)))));

--C3L40 is tmdsenc:hdmitmds[2].enc|disparity[2]~11 at LCCOMB_X31_Y11_N6
C3L40 = CARRY((C3_disparity[2] & (!C3L20 & !C3L37)) # (!C3_disparity[2] & ((!C3L37) # (!C3L20))));


--C3L42 is tmdsenc:hdmitmds[2].enc|disparity[3]~12 at LCCOMB_X31_Y11_N8
C3L42 = C3L17 $ (C3_disparity[3] $ (!C3L40));


--M2_wire_counter_comb_bita_0combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_0combout[0] at LCCOMB_X36_Y15_N2
M2_wire_counter_comb_bita_0combout[0] = M2_counter_reg_bit[0] $ (((VCC) # (!K1_sync_dffe12a)));

--M2_wire_counter_comb_bita_0cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_0cout[0] at LCCOMB_X36_Y15_N2
M2_wire_counter_comb_bita_0cout[0] = CARRY(M2_counter_reg_bit[0] $ (!K1_sync_dffe12a));


--M2_wire_counter_comb_bita_1combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_1combout[0] at LCCOMB_X36_Y15_N4
M2_wire_counter_comb_bita_1combout[0] = (M2_wire_counter_comb_bita_0cout[0] & (M2_counter_reg_bit[1] $ (((K1_sync_dffe12a) # (VCC))))) # (!M2_wire_counter_comb_bita_0cout[0] & ((M2_counter_reg_bit[1]) # ((GND))));

--M2_wire_counter_comb_bita_1cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_1cout[0] at LCCOMB_X36_Y15_N4
M2_wire_counter_comb_bita_1cout[0] = CARRY((M2_counter_reg_bit[1] $ (K1_sync_dffe12a)) # (!M2_wire_counter_comb_bita_0cout[0]));


--M2_wire_counter_comb_bita_2combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2combout[0] at LCCOMB_X36_Y15_N6
M2_wire_counter_comb_bita_2combout[0] = (M2_wire_counter_comb_bita_1cout[0] & (((M2_counter_reg_bit[2] & VCC)))) # (!M2_wire_counter_comb_bita_1cout[0] & (M2_counter_reg_bit[2] $ (((VCC) # (!K1_sync_dffe12a)))));

--M2_wire_counter_comb_bita_2cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2cout[0] at LCCOMB_X36_Y15_N6
M2_wire_counter_comb_bita_2cout[0] = CARRY((!M2_wire_counter_comb_bita_1cout[0] & (K1_sync_dffe12a $ (!M2_counter_reg_bit[2]))));


--M2L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2cout[0]~0 at LCCOMB_X36_Y15_N8
M2L25 = M2_wire_counter_comb_bita_2cout[0];


--C1L34 is tmdsenc:hdmitmds[0].enc|disparity[0]~5 at LCCOMB_X31_Y14_N0
C1L34 = CARRY(C1L26);


--C1L35 is tmdsenc:hdmitmds[0].enc|disparity[0]~6 at LCCOMB_X31_Y14_N2
C1L35 = (C1L23 & ((C1_disparity[0] & (C1L34 & VCC)) # (!C1_disparity[0] & (!C1L34)))) # (!C1L23 & ((C1_disparity[0] & (!C1L34)) # (!C1_disparity[0] & ((C1L34) # (GND)))));

--C1L36 is tmdsenc:hdmitmds[0].enc|disparity[0]~7 at LCCOMB_X31_Y14_N2
C1L36 = CARRY((C1L23 & (!C1_disparity[0] & !C1L34)) # (!C1L23 & ((!C1L34) # (!C1_disparity[0]))));


--C1L38 is tmdsenc:hdmitmds[0].enc|disparity[1]~8 at LCCOMB_X31_Y14_N4
C1L38 = ((C1L22 $ (C1_disparity[1] $ (!C1L36)))) # (GND);

--C1L39 is tmdsenc:hdmitmds[0].enc|disparity[1]~9 at LCCOMB_X31_Y14_N4
C1L39 = CARRY((C1L22 & ((C1_disparity[1]) # (!C1L36))) # (!C1L22 & (C1_disparity[1] & !C1L36)));


--C1L41 is tmdsenc:hdmitmds[0].enc|disparity[2]~10 at LCCOMB_X31_Y14_N6
C1L41 = (C1_disparity[2] & ((C1L20 & (C1L39 & VCC)) # (!C1L20 & (!C1L39)))) # (!C1_disparity[2] & ((C1L20 & (!C1L39)) # (!C1L20 & ((C1L39) # (GND)))));

--C1L42 is tmdsenc:hdmitmds[0].enc|disparity[2]~11 at LCCOMB_X31_Y14_N6
C1L42 = CARRY((C1_disparity[2] & (!C1L20 & !C1L39)) # (!C1_disparity[2] & ((!C1L39) # (!C1L20))));


--C1L44 is tmdsenc:hdmitmds[0].enc|disparity[3]~12 at LCCOMB_X31_Y14_N8
C1L44 = C1L18 $ (C1_disparity[3] $ (!C1L42));


--C2L34 is tmdsenc:hdmitmds[1].enc|disparity[0]~5 at LCCOMB_X31_Y12_N6
C2L34 = CARRY(C2L28);


--C2L35 is tmdsenc:hdmitmds[1].enc|disparity[0]~6 at LCCOMB_X31_Y12_N8
C2L35 = (C2L26 & ((C2_disparity[0] & (C2L34 & VCC)) # (!C2_disparity[0] & (!C2L34)))) # (!C2L26 & ((C2_disparity[0] & (!C2L34)) # (!C2_disparity[0] & ((C2L34) # (GND)))));

--C2L36 is tmdsenc:hdmitmds[1].enc|disparity[0]~7 at LCCOMB_X31_Y12_N8
C2L36 = CARRY((C2L26 & (!C2_disparity[0] & !C2L34)) # (!C2L26 & ((!C2L34) # (!C2_disparity[0]))));


--C2L38 is tmdsenc:hdmitmds[1].enc|disparity[1]~8 at LCCOMB_X31_Y12_N10
C2L38 = ((C2_disparity[1] $ (C2L25 $ (!C2L36)))) # (GND);

--C2L39 is tmdsenc:hdmitmds[1].enc|disparity[1]~9 at LCCOMB_X31_Y12_N10
C2L39 = CARRY((C2_disparity[1] & ((C2L25) # (!C2L36))) # (!C2_disparity[1] & (C2L25 & !C2L36)));


--C2L41 is tmdsenc:hdmitmds[1].enc|disparity[2]~10 at LCCOMB_X31_Y12_N12
C2L41 = (C2_disparity[2] & ((C2L23 & (C2L39 & VCC)) # (!C2L23 & (!C2L39)))) # (!C2_disparity[2] & ((C2L23 & (!C2L39)) # (!C2L23 & ((C2L39) # (GND)))));

--C2L42 is tmdsenc:hdmitmds[1].enc|disparity[2]~11 at LCCOMB_X31_Y12_N12
C2L42 = CARRY((C2_disparity[2] & (!C2L23 & !C2L39)) # (!C2_disparity[2] & ((!C2L39) # (!C2L23))));


--C2L44 is tmdsenc:hdmitmds[1].enc|disparity[3]~12 at LCCOMB_X31_Y12_N14
C2L44 = C2_disparity[3] $ (C2L42 $ (!C2L21));


--C1_qreg[4] is tmdsenc:hdmitmds[0].enc|qreg[4] at FF_X33_Y12_N27
--register power-up is low

C1_qreg[4] = DFFEAS(C1L55, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C1_qreg[1] is tmdsenc:hdmitmds[0].enc|qreg[1] at FF_X32_Y14_N23
--register power-up is low

C1_qreg[1] = DFFEAS(C1L68, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--C2_qreg[1] is tmdsenc:hdmitmds[1].enc|qreg[1] at FF_X31_Y12_N31
--register power-up is low

C2_qreg[1] = DFFEAS(C2L68, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  , !C1_denreg,  );


--M1_wire_counter_comb_bita_0combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_0combout[0] at LCCOMB_X36_Y15_N10
M1_wire_counter_comb_bita_0combout[0] = M1_counter_reg_bit[0] $ (((VCC) # (!K1_sync_dffe12a)));

--M1_wire_counter_comb_bita_0cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_0cout[0] at LCCOMB_X36_Y15_N10
M1_wire_counter_comb_bita_0cout[0] = CARRY(K1_sync_dffe12a $ (!M1_counter_reg_bit[0]));


--M1_wire_counter_comb_bita_1combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_1combout[0] at LCCOMB_X36_Y15_N12
M1_wire_counter_comb_bita_1combout[0] = (M1_wire_counter_comb_bita_0cout[0] & (M1_counter_reg_bit[1] $ (((K1_sync_dffe12a) # (VCC))))) # (!M1_wire_counter_comb_bita_0cout[0] & (((M1_counter_reg_bit[1]) # (GND))));

--M1_wire_counter_comb_bita_1cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_1cout[0] at LCCOMB_X36_Y15_N12
M1_wire_counter_comb_bita_1cout[0] = CARRY((K1_sync_dffe12a $ (M1_counter_reg_bit[1])) # (!M1_wire_counter_comb_bita_0cout[0]));


--M1_wire_counter_comb_bita_2combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2combout[0] at LCCOMB_X36_Y15_N14
M1_wire_counter_comb_bita_2combout[0] = (M1_wire_counter_comb_bita_1cout[0] & (((M1_counter_reg_bit[2] & VCC)))) # (!M1_wire_counter_comb_bita_1cout[0] & (M1_counter_reg_bit[2] $ (((VCC) # (!K1_sync_dffe12a)))));

--M1_wire_counter_comb_bita_2cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2cout[0] at LCCOMB_X36_Y15_N14
M1_wire_counter_comb_bita_2cout[0] = CARRY((!M1_wire_counter_comb_bita_1cout[0] & (K1_sync_dffe12a $ (!M1_counter_reg_bit[2]))));


--M1L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2cout[0]~0 at LCCOMB_X36_Y15_N16
M1L25 = M1_wire_counter_comb_bita_2cout[0];


--C2_qreg[2] is tmdsenc:hdmitmds[1].enc|qreg[2] at FF_X33_Y12_N17
--register power-up is low

C2_qreg[2] = DFFEAS(C2L52, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[2] is tmdsenc:hdmitmds[2].enc|qreg[2] at FF_X33_Y12_N31
--register power-up is low

C3_qreg[2] = DFFEAS(C3L50, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C2_qreg[6] is tmdsenc:hdmitmds[1].enc|qreg[6] at FF_X33_Y12_N25
--register power-up is low

C2_qreg[6] = DFFEAS(C2L58, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[6] is tmdsenc:hdmitmds[2].enc|qreg[6] at FF_X33_Y12_N23
--register power-up is low

C3_qreg[6] = DFFEAS(C3L56, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--C1_qreg[2] is tmdsenc:hdmitmds[0].enc|qreg[2] at FF_X33_Y12_N9
--register power-up is low

C1_qreg[2] = DFFEAS(C1L52, GLOBAL(U1L27), vid_rst_n,  ,  , VCC,  ,  , !C1_denreg);


--A1L159 is abc_rdy_x~output at IOOBUF_X3_Y29_N9
A1L159 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L161 is abc_resin_x~output at IOOBUF_X16_Y0_N30
A1L161 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L121 is abc_int80_x~output at IOOBUF_X1_Y29_N2
A1L121 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L123 is abc_int800_x~output at IOOBUF_X3_Y29_N16
A1L123 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L146 is abc_nmi_x~output at IOOBUF_X3_Y29_N30
A1L146 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L171 is abc_xm_x~output at IOOBUF_X0_Y26_N16
A1L171 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L331 is hdmi_sda~output at IOOBUF_X30_Y0_N9
A1L331 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L70 is abc_d[0]~output at IOOBUF_X3_Y0_N30
A1L70 = OUTPUT_BUFFER.O(.I(abc_do[0]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L73 is abc_d[1]~output at IOOBUF_X7_Y0_N9
A1L73 = OUTPUT_BUFFER.O(.I(abc_do[1]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L76 is abc_d[2]~output at IOOBUF_X7_Y0_N23
A1L76 = OUTPUT_BUFFER.O(.I(abc_do[2]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L79 is abc_d[3]~output at IOOBUF_X5_Y0_N9
A1L79 = OUTPUT_BUFFER.O(.I(abc_do[3]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L82 is abc_d[4]~output at IOOBUF_X3_Y0_N16
A1L82 = OUTPUT_BUFFER.O(.I(abc_do[4]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L85 is abc_d[5]~output at IOOBUF_X3_Y0_N9
A1L85 = OUTPUT_BUFFER.O(.I(abc_do[5]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L88 is abc_d[6]~output at IOOBUF_X5_Y0_N2
A1L88 = OUTPUT_BUFFER.O(.I(abc_do[6]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L91 is abc_d[7]~output at IOOBUF_X7_Y0_N30
A1L91 = OUTPUT_BUFFER.O(.I(abc_do[7]), .OE(!A1L176), , , , , , , , , , , , , , , , );


--A1L231 is exth_ha~output at IOOBUF_X30_Y0_N16
A1L231 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L234 is exth_hb~output at IOOBUF_X23_Y0_N9
A1L234 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L239 is exth_hd~output at IOOBUF_X26_Y0_N16
A1L239 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L242 is exth_he~output at IOOBUF_X26_Y0_N2
A1L242 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L245 is exth_hf~output at IOOBUF_X26_Y0_N9
A1L245 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L248 is exth_hg~output at IOOBUF_X35_Y0_N16
A1L248 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L538 is sr_dq[0]~output at IOOBUF_X32_Y29_N23
A1L538 = OUTPUT_BUFFER.O(.I(G1_dram_d[0]), .OE(!G1_dram_d_en), , , , , , , , , , , , , , , , );


--A1L541 is sr_dq[1]~output at IOOBUF_X32_Y29_N2
A1L541 = OUTPUT_BUFFER.O(.I(G1_dram_d[1]), .OE(!G1L171Q), , , , , , , , , , , , , , , , );


--A1L544 is sr_dq[2]~output at IOOBUF_X39_Y29_N30
A1L544 = OUTPUT_BUFFER.O(.I(G1_dram_d[2]), .OE(!G1L172Q), , , , , , , , , , , , , , , , );


--A1L547 is sr_dq[3]~output at IOOBUF_X37_Y29_N16
A1L547 = OUTPUT_BUFFER.O(.I(G1_dram_d[3]), .OE(!G1L173Q), , , , , , , , , , , , , , , , );


--A1L550 is sr_dq[4]~output at IOOBUF_X30_Y29_N23
A1L550 = OUTPUT_BUFFER.O(.I(G1_dram_d[4]), .OE(!G1L174Q), , , , , , , , , , , , , , , , );


--A1L553 is sr_dq[5]~output at IOOBUF_X30_Y29_N16
A1L553 = OUTPUT_BUFFER.O(.I(G1_dram_d[5]), .OE(!G1L175Q), , , , , , , , , , , , , , , , );


--A1L556 is sr_dq[6]~output at IOOBUF_X26_Y29_N30
A1L556 = OUTPUT_BUFFER.O(.I(G1_dram_d[6]), .OE(!G1L176Q), , , , , , , , , , , , , , , , );


--A1L559 is sr_dq[7]~output at IOOBUF_X26_Y29_N23
A1L559 = OUTPUT_BUFFER.O(.I(G1_dram_d[7]), .OE(!G1L177Q), , , , , , , , , , , , , , , , );


--A1L562 is sr_dq[8]~output at IOOBUF_X5_Y29_N2
A1L562 = OUTPUT_BUFFER.O(.I(G1_dram_d[8]), .OE(!G1L178Q), , , , , , , , , , , , , , , , );


--A1L565 is sr_dq[9]~output at IOOBUF_X7_Y29_N9
A1L565 = OUTPUT_BUFFER.O(.I(G1_dram_d[9]), .OE(!G1L179Q), , , , , , , , , , , , , , , , );


--A1L568 is sr_dq[10]~output at IOOBUF_X5_Y29_N16
A1L568 = OUTPUT_BUFFER.O(.I(G1_dram_d[10]), .OE(!G1L180Q), , , , , , , , , , , , , , , , );


--A1L571 is sr_dq[11]~output at IOOBUF_X3_Y29_N2
A1L571 = OUTPUT_BUFFER.O(.I(G1_dram_d[11]), .OE(!G1L181Q), , , , , , , , , , , , , , , , );


--A1L574 is sr_dq[12]~output at IOOBUF_X7_Y29_N30
A1L574 = OUTPUT_BUFFER.O(.I(G1_dram_d[12]), .OE(!G1L182Q), , , , , , , , , , , , , , , , );


--A1L577 is sr_dq[13]~output at IOOBUF_X5_Y29_N23
A1L577 = OUTPUT_BUFFER.O(.I(G1_dram_d[13]), .OE(!G1L183Q), , , , , , , , , , , , , , , , );


--A1L580 is sr_dq[14]~output at IOOBUF_X11_Y29_N30
A1L580 = OUTPUT_BUFFER.O(.I(G1_dram_d[14]), .OE(!G1L184Q), , , , , , , , , , , , , , , , );


--A1L583 is sr_dq[15]~output at IOOBUF_X3_Y29_N23
A1L583 = OUTPUT_BUFFER.O(.I(G1_dram_d[15]), .OE(!G1L185Q), , , , , , , , , , , , , , , , );


--A1L469 is sd_dat[0]~output at IOOBUF_X41_Y19_N9
A1L469 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L472 is sd_dat[1]~output at IOOBUF_X35_Y0_N23
A1L472 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L475 is sd_dat[2]~output at IOOBUF_X41_Y23_N2
A1L475 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L478 is sd_dat[3]~output at IOOBUF_X41_Y19_N16
A1L478 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L482 is spi_clk~output at IOOBUF_X14_Y0_N23
A1L482 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L491 is spi_miso~output at IOOBUF_X14_Y0_N16
A1L491 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L494 is spi_mosi~output at IOOBUF_X19_Y0_N9
A1L494 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L485 is spi_cs_esp_n~output at IOOBUF_X19_Y0_N2
A1L485 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L488 is spi_cs_flash_n~output at IOOBUF_X7_Y0_N16
A1L488 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L228 is esp_io0~output at IOOBUF_X19_Y0_N30
A1L228 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L225 is esp_int~output at IOOBUF_X21_Y0_N30
A1L225 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L339 is i2c_scl~output at IOOBUF_X41_Y27_N23
A1L339 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L342 is i2c_sda~output at IOOBUF_X41_Y27_N16
A1L342 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L262 is gpio[0]~output at IOOBUF_X16_Y0_N16
A1L262 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L265 is gpio[1]~output at IOOBUF_X30_Y0_N23
A1L265 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L268 is gpio[2]~output at IOOBUF_X16_Y0_N23
A1L268 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L271 is gpio[3]~output at IOOBUF_X26_Y0_N30
A1L271 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L274 is gpio[4]~output at IOOBUF_X16_Y0_N2
A1L274 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L277 is gpio[5]~output at IOOBUF_X16_Y0_N9
A1L277 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L328 is hdmi_scl~output at IOOBUF_X39_Y0_N23
A1L328 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L325 is hdmi_hpd~output at IOOBUF_X35_Y0_N2
A1L325 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--G1_dram_cke is sdram:sdram|dram_cke at DDIOOUTCELL_X14_Y29_N32
--register power-up is low

G1_dram_cke = DFFEAS(VCC, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_dram_ba[0] is sdram:sdram|dram_ba[0] at FF_X16_Y24_N1
--register power-up is low

G1_dram_ba[0] = DFFEAS(G1L58, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_ba[1] is sdram:sdram|dram_ba[1] at FF_X12_Y25_N17
--register power-up is low

G1_dram_ba[1] = DFFEAS(G1L57, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_a[0] is sdram:sdram|dram_a[0] at FF_X19_Y25_N9
--register power-up is low

G1_dram_a[0] = DFFEAS(G1L51, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L129Q is sdram:sdram|dram_a[10]~_Duplicate_1 at FF_X16_Y25_N29
--register power-up is low

G1L129Q = DFFEAS( , GLOBAL(U1L23),  ,  ,  , G1L36,  ,  , VCC);


--G1_dram_dqm[0] is sdram:sdram|dram_dqm[0] at DDIOOUTCELL_X32_Y29_N11
--register power-up is low

G1_dram_dqm[0] = DFFEAS(G1L190, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_dram_dqm[1] is sdram:sdram|dram_dqm[1] at DDIOOUTCELL_X14_Y29_N11
--register power-up is low

G1_dram_dqm[1] = DFFEAS(G1L191, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_dram_cmd[3] is sdram:sdram|dram_cmd[3] at DDIOOUTCELL_X37_Y29_N4
--register power-up is high

G1_dram_cmd[3] = DFFEAS(!G1L14, GLOBAL(U1L23),  ,  ,  , VCC, !GLOBAL(A1L457),  ,  );


--G1_dram_cmd[0] is sdram:sdram|dram_cmd[0] at DDIOOUTCELL_X26_Y29_N18
--register power-up is high

G1_dram_cmd[0] = DFFEAS(!G1L26, GLOBAL(U1L23),  ,  ,  , VCC, !GLOBAL(A1L457),  ,  );


--G1_dram_cmd[1] is sdram:sdram|dram_cmd[1] at DDIOOUTCELL_X21_Y29_N11
--register power-up is high

G1_dram_cmd[1] = DFFEAS(!G1L22, GLOBAL(U1L23),  ,  ,  , VCC, !GLOBAL(A1L457),  ,  );


--G1_dram_cmd[2] is sdram:sdram|dram_cmd[2] at DDIOOUTCELL_X32_Y29_N32
--register power-up is high

G1_dram_cmd[2] = DFFEAS(!G1L19, GLOBAL(U1L23),  ,  ,  , VCC, !GLOBAL(A1L457),  ,  );


--rst_n is rst_n at FF_X11_Y4_N29
--register power-up is low

rst_n = DFFEAS(A1L456, GLOBAL(U1L25), !GLOBAL(A1L26),  ,  ,  ,  ,  ,  );


--G1_next_bank[0] is sdram:sdram|next_bank[0] at FF_X16_Y24_N3
--register power-up is low

G1_next_bank[0] = DFFEAS(G1L234, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1_state.st_idle is sdram:sdram|state.st_idle at FF_X14_Y25_N21
--register power-up is low

G1_state.st_idle = DFFEAS(G1L357, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L58 is sdram:sdram|Selector92~0 at LCCOMB_X16_Y24_N0
G1L58 = (G1_state.st_idle & (A1L50)) # (!G1_state.st_idle & ((G1_next_bank[0])));


--G1L57 is sdram:sdram|Selector91~0 at LCCOMB_X12_Y25_N16
G1L57 = (G1_state.st_idle & (A1L52)) # (!G1_state.st_idle & ((G1_next_bank[1])));


--G1_op_cycle[0] is sdram:sdram|op_cycle[0] at FF_X16_Y25_N31
--register power-up is low

G1_op_cycle[0] = DFFEAS(G1L283, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_op_cycle[2] is sdram:sdram|op_cycle[2] at FF_X15_Y25_N27
--register power-up is low

G1_op_cycle[2] = DFFEAS(G1L286, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_op_cycle[1] is sdram:sdram|op_cycle[1] at FF_X16_Y25_N1
--register power-up is low

G1_op_cycle[1] = DFFEAS(G1L284, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L132 is sdram:sdram|dram_a[12]~0 at LCCOMB_X19_Y25_N2
G1L132 = (!G1_op_cycle[1] & !G1_op_cycle[2]);


--G1_op_cycle[3] is sdram:sdram|op_cycle[3] at FF_X16_Y25_N23
--register power-up is low

G1_op_cycle[3] = DFFEAS( , GLOBAL(U1L23), GLOBAL(A1L457),  ,  , G1L285,  ,  , VCC);


--G1L46 is sdram:sdram|Selector84~0 at LCCOMB_X19_Y25_N12
G1L46 = (G1_next_bank[2] & (!G1_op_cycle[3] & (G1_op_cycle[0] & G1L132)));


--G1L10 is sdram:sdram|Mux14~0 at LCCOMB_X19_Y25_N18
G1L10 = (!G1_op_cycle[3] & ((G1_op_cycle[1] & (!G1_op_cycle[0] & !G1_op_cycle[2])) # (!G1_op_cycle[1] & (G1_op_cycle[0] $ (G1_op_cycle[2])))));


--G1L351 is sdram:sdram|state.st_reset~0 at LCCOMB_X20_Y25_N0
G1L351 = (!G1_state.st_rd & !G1_state.st_wr);


--G1L47 is sdram:sdram|Selector84~1 at LCCOMB_X19_Y25_N28
G1L47 = (!G1L351 & ((G1L46) # ((G1_dram_a[0] & !G1L10))));


--G1_state.st_init is sdram:sdram|state.st_init at FF_X14_Y25_N3
--register power-up is low

G1_state.st_init = DFFEAS(G1L364, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_state.st_reset is sdram:sdram|state.st_reset at FF_X15_Y25_N13
--register power-up is low

G1_state.st_reset = DFFEAS(G1L365, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--abc_rrq is abc_rrq at FF_X15_Y25_N7
--register power-up is low

abc_rrq = DFFEAS(A1L163, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--abc_wrq is abc_wrq at FF_X15_Y25_N9
--register power-up is low

abc_wrq = DFFEAS(A1L167, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L71 is sdram:sdram|always3~2 at LCCOMB_X15_Y25_N18
G1L71 = (abc_wrq) # (abc_rrq);


--G1L29 is sdram:sdram|Selector74~0 at LCCOMB_X15_Y25_N24
G1L29 = (G1_state.st_reset & (!G1_state.st_rfsh & ((G1L71) # (!G1_state.st_idle))));


--G1L48 is sdram:sdram|Selector84~2 at LCCOMB_X19_Y25_N26
G1L48 = (G1_dram_a[0] & ((G1_state.st_init) # (!G1L29)));


--G1L49 is sdram:sdram|Selector84~3 at LCCOMB_X15_Y25_N30
G1L49 = (G1_state.st_idle & ((abc_rrq) # (abc_wrq)));


--G1_rfsh_ctr[0] is sdram:sdram|rfsh_ctr[0] at FF_X17_Y26_N21
--register power-up is low

G1_rfsh_ctr[0] = DFFEAS( , GLOBAL(U1L23), GLOBAL(A1L457),  ,  , G1L309,  ,  , VCC);


--G1L3 is sdram:sdram|Equal3~0 at LCCOMB_X17_Y26_N28
G1L3 = (G1_rfsh_ctr[0]) # (G1_rfsh_ctr[2]);


--G1L4 is sdram:sdram|Equal3~1 at LCCOMB_X17_Y26_N18
G1L4 = (G1_rfsh_ctr[4] & (G1_rfsh_ctr[1] & (G1_rfsh_ctr[3] & !G1L3)));


--G1L50 is sdram:sdram|Selector84~4 at LCCOMB_X19_Y25_N24
G1L50 = (G1L4 & ((G1_state.st_init) # ((A1L54 & G1L49)))) # (!G1L4 & (((A1L54 & G1L49))));


--G1L51 is sdram:sdram|Selector84~5 at LCCOMB_X19_Y25_N8
G1L51 = (G1L50) # ((G1L48) # (G1L47));


--G1L45 is sdram:sdram|Selector83~0 at LCCOMB_X17_Y24_N28
G1L45 = (!G1_state.st_init & ((G1_op_cycle[0] & (G1_next_bank[3])) # (!G1_op_cycle[0] & ((G1_col_addr[2])))));


--G1L111 is sdram:sdram|dram_a[2]~1 at LCCOMB_X17_Y25_N24
G1L111 = (G1_op_cycle[3]) # ((!G1_state.st_rd & !G1_state.st_wr));


--G1L133 is sdram:sdram|dram_a[12]~2 at LCCOMB_X16_Y25_N24
G1L133 = (G1_op_cycle[0]) # (G1_op_cycle[1]);


--G1L11 is sdram:sdram|Mux15~0 at LCCOMB_X16_Y25_N2
G1L11 = (!G1_op_cycle[1]) # (!G1_op_cycle[0]);


--G1L112 is sdram:sdram|dram_a[2]~3 at LCCOMB_X17_Y25_N30
G1L112 = ((G1L111) # (G1L133 $ (!G1_op_cycle[2]))) # (!G1L11);


--G1L113 is sdram:sdram|dram_a[2]~4 at LCCOMB_X14_Y24_N10
G1L113 = (G1L49) # (((G1_state.st_init & G1L4)) # (!G1L112));


--G1L44 is sdram:sdram|Selector82~0 at LCCOMB_X17_Y24_N6
G1L44 = (!G1_state.st_init & ((G1_op_cycle[0] & (G1_next_bank[4])) # (!G1_op_cycle[0] & ((G1_col_addr[3])))));


--G1L43 is sdram:sdram|Selector81~0 at LCCOMB_X15_Y24_N24
G1L43 = (!G1_state.st_init & ((G1_op_cycle[0] & (G1_next_bank[5])) # (!G1_op_cycle[0] & ((G1_col_addr[4])))));


--G1L42 is sdram:sdram|Selector80~0 at LCCOMB_X17_Y24_N24
G1L42 = (G1_state.st_init) # ((G1_op_cycle[0] & (G1_next_bank[6])) # (!G1_op_cycle[0] & ((G1_col_addr[5]))));


--abc_mempg[0] is abc_mempg[0] at FF_X14_Y24_N23
--register power-up is low

abc_mempg[0] = DFFEAS(A1L129, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L41 is sdram:sdram|Selector79~0 at LCCOMB_X19_Y24_N4
G1L41 = (G1_state.st_init) # ((G1_op_cycle[0] & (G1_next_bank[7])) # (!G1_op_cycle[0] & ((G1_col_addr[6]))));


--abc_mempg[1] is abc_mempg[1] at FF_X14_Y24_N31
--register power-up is low

abc_mempg[1] = DFFEAS(A1L131, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L40 is sdram:sdram|Selector78~0 at LCCOMB_X17_Y24_N30
G1L40 = (!G1_state.st_init & ((G1_op_cycle[0] & (G1_next_bank[8])) # (!G1_op_cycle[0] & ((G1_col_addr[7])))));


--abc_mempg[2] is abc_mempg[2] at FF_X14_Y24_N15
--register power-up is low

abc_mempg[2] = DFFEAS(A1L133, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L39 is sdram:sdram|Selector77~0 at LCCOMB_X19_Y25_N30
G1L39 = (!G1_state.st_init & ((G1_op_cycle[0] & (G1_next_bank[9])) # (!G1_op_cycle[0] & ((G1_col_addr[8])))));


--abc_mempg[3] is abc_mempg[3] at FF_X14_Y24_N9
--register power-up is low

abc_mempg[3] = DFFEAS(A1L135, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L38 is sdram:sdram|Selector76~0 at LCCOMB_X17_Y24_N4
G1L38 = (!G1_state.st_init & ((G1_op_cycle[0] & ((G1_next_bank[10]))) # (!G1_op_cycle[0] & (G1_col_addr[9]))));


--abc_mempg[4] is abc_mempg[4] at FF_X14_Y24_N5
--register power-up is low

abc_mempg[4] = DFFEAS(A1L137, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L134 is sdram:sdram|dram_a[12]~5 at LCCOMB_X19_Y25_N0
G1L134 = (G1L132 & ((G1_state.st_wr) # ((!G1_op_cycle[3] & G1_state.st_rd))));


--G1L37 is sdram:sdram|Selector75~0 at LCCOMB_X16_Y26_N4
G1L37 = (G1_next_bank[11] & G1L134);


--abc_mempg[5] is abc_mempg[5] at FF_X14_Y24_N27
--register power-up is low

abc_mempg[5] = DFFEAS(A1L139, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L135 is sdram:sdram|dram_a[12]~6 at LCCOMB_X16_Y26_N22
G1L135 = (G1_state.st_wr & (G1_op_cycle[0] & (G1_op_cycle[2]))) # (!G1_state.st_wr & (((G1L4))));


--G1L136 is sdram:sdram|dram_a[12]~7 at LCCOMB_X16_Y25_N22
G1L136 = G1_op_cycle[1] $ (((G1_op_cycle[0] & !G1_op_cycle[2])));


--G1L137 is sdram:sdram|dram_a[12]~8 at LCCOMB_X16_Y26_N28
G1L137 = (G1_op_cycle[2] & (((G1L135 & G1L136)) # (!G1L133))) # (!G1_op_cycle[2] & (((G1L136))));


--G1L138 is sdram:sdram|dram_a[12]~9 at LCCOMB_X15_Y25_N0
G1L138 = (G1_op_cycle[2] & (!G1_op_cycle[1] & (!G1_op_cycle[3] & !G1_op_cycle[0]))) # (!G1_op_cycle[2] & ((G1_op_cycle[1] & (!G1_op_cycle[3] & !G1_op_cycle[0])) # (!G1_op_cycle[1] & (G1_op_cycle[3] $ (G1_op_cycle[0])))));


--G1L139 is sdram:sdram|dram_a[12]~10 at LCCOMB_X15_Y25_N10
G1L139 = (!G1L49 & ((!G1L138) # (!G1_state.st_rd)));


--G1L140 is sdram:sdram|dram_a[12]~11 at LCCOMB_X16_Y26_N10
G1L140 = (G1L139 & ((!G1L135) # (!G1_state.st_init)));


--G1L141 is sdram:sdram|dram_a[12]~12 at LCCOMB_X16_Y26_N12
G1L141 = ((G1_state.st_wr & (!G1_op_cycle[3] & G1L137))) # (!G1L140);


--G1L30 is sdram:sdram|Selector74~1 at LCCOMB_X16_Y25_N8
G1L30 = (G1_op_cycle[3]) # ((G1_op_cycle[2] & (G1_op_cycle[1] $ (G1_op_cycle[0]))));


--G1L31 is sdram:sdram|Selector74~2 at LCCOMB_X16_Y25_N26
G1L31 = ((G1_state.st_wr & G1L30)) # (!G1L29);


--G1L32 is sdram:sdram|Selector74~3 at LCCOMB_X16_Y25_N20
G1L32 = (G1L129Q & ((G1L31) # ((G1_state.st_init & !G1L4))));


--G1L6 is sdram:sdram|Mux4~0 at LCCOMB_X16_Y25_N28
G1L6 = (G1L129Q & ((G1_op_cycle[0]) # (G1_op_cycle[1])));


--G1L7 is sdram:sdram|Mux4~1 at LCCOMB_X16_Y25_N6
G1L7 = (G1_op_cycle[1] & (G1L129Q & (G1_op_cycle[0]))) # (!G1_op_cycle[1] & ((G1_op_cycle[0] & ((G1_next_bank[12]))) # (!G1_op_cycle[0] & (G1L129Q))));


--G1L8 is sdram:sdram|Mux4~2 at LCCOMB_X16_Y25_N16
G1L8 = (G1_op_cycle[2] & ((G1L6) # ((G1_op_cycle[3])))) # (!G1_op_cycle[2] & (((!G1_op_cycle[3] & G1L7))));


--G1L9 is sdram:sdram|Mux4~3 at LCCOMB_X16_Y25_N10
G1L9 = (G1_op_cycle[3] & ((G1L129Q) # ((!G1L133 & !G1L8)))) # (!G1_op_cycle[3] & (((G1L8))));


--abc_mempg[6] is abc_mempg[6] at FF_X16_Y25_N5
--register power-up is low

abc_mempg[6] = DFFEAS( , GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr, abc_di[6],  ,  , VCC);


--G1L33 is sdram:sdram|Selector74~4 at LCCOMB_X16_Y25_N4
G1L33 = (G1_state.st_reset & (((!G1L49) # (!abc_mempg[6])))) # (!G1_state.st_reset & (!G1_init_ctr[15] & ((!G1L49) # (!abc_mempg[6]))));


--G1L34 is sdram:sdram|Selector74~5 at LCCOMB_X17_Y25_N16
G1L34 = (G1_state.st_wr & (!G1_op_cycle[3] & ((!G1L11) # (!G1_op_cycle[2]))));


--G1L35 is sdram:sdram|Selector74~6 at LCCOMB_X16_Y25_N14
G1L35 = (G1L33 & (((!G1L7 & !G1_op_cycle[2])) # (!G1L34)));


--G1L36 is sdram:sdram|Selector74~7 at LCCOMB_X16_Y25_N12
G1L36 = ((G1L32) # ((G1L9 & G1_state.st_rd))) # (!G1L35);


--G1L28 is sdram:sdram|Selector73~0 at LCCOMB_X16_Y26_N6
G1L28 = (G1_next_bank[13] & G1L134);


--abc_mempg[7] is abc_mempg[7] at FF_X16_Y21_N1
--register power-up is low

abc_mempg[7] = DFFEAS(A1L142, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L27 is sdram:sdram|Selector72~0 at LCCOMB_X16_Y26_N20
G1L27 = (G1_next_bank[14] & G1L134);


--abc_mempg[8] is abc_mempg[8] at FF_X16_Y21_N27
--register power-up is low

abc_mempg[8] = DFFEAS(A1L144, GLOBAL(U1L23), GLOBAL(A1L457),  , abc_iowr,  ,  ,  ,  );


--G1L190 is sdram:sdram|dram_dqm~0 at LCCOMB_X19_Y25_N6
G1L190 = (G1_state.st_wr & (((!G1_op_cycle[3] & G1L132)) # (!G1_be_q[0])));


--G1L191 is sdram:sdram|dram_dqm~1 at LCCOMB_X19_Y25_N16
G1L191 = (G1_state.st_wr & (((G1L132 & !G1_op_cycle[3])) # (!G1_be_q[1])));


--G1_rfsh_prio[1] is sdram:sdram|rfsh_prio[1] at FF_X14_Y25_N9
--register power-up is low

G1_rfsh_prio[1] = DFFEAS(G1L339, GLOBAL(U1L23), GLOBAL(A1L457),  , G1L340,  ,  ,  ,  );


--G1_rfsh_prio[0] is sdram:sdram|rfsh_prio[0] at FF_X14_Y25_N27
--register power-up is low

G1_rfsh_prio[0] = DFFEAS(G1L337, GLOBAL(U1L23), GLOBAL(A1L457),  , G1L340,  ,  ,  ,  );


--G1L13 is sdram:sdram|Selector68~0 at LCCOMB_X14_Y25_N24
G1L13 = (!G1_rfsh_prio[0] & (G1_state.st_idle & (!G1_rfsh_prio[1] & !G1L71)));


--G1L14 is sdram:sdram|Selector68~1 at LCCOMB_X14_Y25_N10
G1L14 = (!G1L13 & ((G1_state.st_reset) # (G1_init_ctr[15])));


--G1L23 is sdram:sdram|Selector71~2 at LCCOMB_X17_Y25_N14
G1L23 = (G1_state.st_reset) # (!G1_init_ctr[15]);


--G1L24 is sdram:sdram|Selector71~3 at LCCOMB_X17_Y25_N0
G1L24 = (G1_op_cycle[2]) # (((G1L133) # (!G1_state.st_rd)) # (!G1_op_cycle[3]));


--G1L70 is sdram:sdram|WideOr9~0 at LCCOMB_X17_Y25_N2
G1L70 = (!G1_op_cycle[3] & ((G1_op_cycle[2] & (G1_op_cycle[0] $ (!G1_op_cycle[1]))) # (!G1_op_cycle[2] & (!G1_op_cycle[0] & G1_op_cycle[1]))));


--G1L25 is sdram:sdram|Selector71~4 at LCCOMB_X17_Y25_N4
G1L25 = (G1_state.st_init & (!G1L4 & ((!G1_state.st_wr) # (!G1L70)))) # (!G1_state.st_init & (((!G1_state.st_wr)) # (!G1L70)));


--G1L72 is sdram:sdram|always3~3 at LCCOMB_X17_Y26_N24
G1L72 = (G1_rfsh_ctr[1] & (G1_rfsh_ctr[2] & !G1_rfsh_ctr[4])) # (!G1_rfsh_ctr[1] & (!G1_rfsh_ctr[2] & G1_rfsh_ctr[4]));


--G1L73 is sdram:sdram|always3~4 at LCCOMB_X17_Y26_N26
G1L73 = (!G1_rfsh_ctr[0] & (!G1_rfsh_ctr[3] & G1L72));


--G1L20 is sdram:sdram|Selector70~0 at LCCOMB_X17_Y26_N30
G1L20 = ((!G1L4 & !G1L73)) # (!G1_state.st_init);


--G1L21 is sdram:sdram|Selector70~1 at LCCOMB_X14_Y25_N0
G1L21 = ((G1L71) # ((!G1_rfsh_prio[0] & !G1_rfsh_prio[1]))) # (!G1_state.st_idle);


--G1L152 is sdram:sdram|dram_cmd~0 at LCCOMB_X16_Y25_N18
G1L152 = (!G1_op_cycle[3] & (!G1_op_cycle[0] & (G1_op_cycle[1] $ (G1_op_cycle[2]))));


--G1L22 is sdram:sdram|Selector70~2 at LCCOMB_X21_Y26_N4
G1L22 = (((G1L152 & !G1L351)) # (!G1L21)) # (!G1L20);


--G1_last_dword is sdram:sdram|last_dword at FF_X17_Y25_N7
--register power-up is low

G1_last_dword = DFFEAS(G1_WideAnd0, GLOBAL(U1L23),  ,  , G1L2,  ,  ,  ,  );


--G1L15 is sdram:sdram|Selector69~0 at LCCOMB_X17_Y25_N12
G1L15 = (G1_op_cycle[0] & (!G1_op_cycle[1] & G1_last_dword));


--G1L16 is sdram:sdram|Selector69~1 at LCCOMB_X17_Y25_N18
G1L16 = (G1_op_cycle[3] & (((G1L34) # (!G1L133)))) # (!G1_op_cycle[3] & (G1L15));


--G1L17 is sdram:sdram|Selector69~2 at LCCOMB_X17_Y25_N28
G1L17 = (G1_op_cycle[2] & (((!G1L34)))) # (!G1_op_cycle[2] & (((!G1_state.st_rd & !G1L34)) # (!G1L16)));


--G1L18 is sdram:sdram|Selector69~3 at LCCOMB_X14_Y25_N6
G1L18 = ((!G1_rfsh_prio[0] & (!G1_rfsh_prio[1] & !G1L71))) # (!G1_state.st_idle);


--G1L19 is sdram:sdram|Selector69~4 at LCCOMB_X17_Y25_N26
G1L19 = (((!G1L17) # (!G1L20)) # (!G1L18)) # (!G1L23);


--led_ctr[0] is led_ctr[0] at FF_X35_Y2_N1
--register power-up is low

led_ctr[0] = DFFEAS(A1L352, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--R2_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[0] at FF_X36_Y11_N1
--register power-up is low

R2_shift_reg[0] = DFFEAS(R2L7, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[0] at FF_X36_Y11_N19
--register power-up is low

R1_shift_reg[0] = DFFEAS(R1L7, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[0] at FF_X36_Y12_N29
--register power-up is low

R4_shift_reg[0] = DFFEAS(R4L7, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[0] at FF_X35_Y11_N5
--register power-up is low

R3_shift_reg[0] = DFFEAS(R3L7, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[0] at FF_X36_Y12_N31
--register power-up is low

R6_shift_reg[0] = DFFEAS(R6L7, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[0] at FF_X35_Y11_N19
--register power-up is low

R5_shift_reg[0] = DFFEAS(R5L7, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[0] at FF_X39_Y14_N25
--register power-up is low

P2_shift_reg[0] = DFFEAS(P2L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[0] at FF_X39_Y14_N31
--register power-up is low

P1_shift_reg[0] = DFFEAS(P1L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--rst_ctr[11] is rst_ctr[11] at FF_X11_Y4_N23
--register power-up is low

rst_ctr[11] = DFFEAS(A1L21, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[10] is rst_ctr[10] at FF_X11_Y4_N21
--register power-up is low

rst_ctr[10] = DFFEAS(A1L19, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[9] is rst_ctr[9] at FF_X11_Y4_N19
--register power-up is low

rst_ctr[9] = DFFEAS(A1L17, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[8] is rst_ctr[8] at FF_X11_Y4_N17
--register power-up is low

rst_ctr[8] = DFFEAS(A1L15, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[7] is rst_ctr[7] at FF_X11_Y4_N15
--register power-up is low

rst_ctr[7] = DFFEAS(A1L13, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[6] is rst_ctr[6] at FF_X11_Y4_N13
--register power-up is low

rst_ctr[6] = DFFEAS(A1L11, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[5] is rst_ctr[5] at FF_X11_Y4_N11
--register power-up is low

rst_ctr[5] = DFFEAS(A1L9, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[4] is rst_ctr[4] at FF_X11_Y4_N9
--register power-up is low

rst_ctr[4] = DFFEAS(A1L7, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[3] is rst_ctr[3] at FF_X11_Y4_N7
--register power-up is low

rst_ctr[3] = DFFEAS(A1L5, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[2] is rst_ctr[2] at FF_X11_Y4_N5
--register power-up is low

rst_ctr[2] = DFFEAS(A1L3, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[0] is rst_ctr[0] at FF_X11_Y4_N31
--register power-up is low

rst_ctr[0] = DFFEAS(A1L443, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--rst_ctr[1] is rst_ctr[1] at FF_X11_Y4_N3
--register power-up is low

rst_ctr[1] = DFFEAS(A1L1, GLOBAL(U1L25), !GLOBAL(A1L26),  , !rst_n,  ,  ,  ,  );


--A1L456 is rst_n~0 at LCCOMB_X11_Y4_N28
A1L456 = (rst_n) # (A1L23);


--K1_pll_lock_sync is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|pll_lock_sync at FF_X20_Y5_N29
--register power-up is low

K1_pll_lock_sync = DFFEAS(K1L91, K1_wire_lvds_tx_pll_locked, U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--A1L25 is WideAnd0~0 at LCCOMB_X20_Y5_N30
A1L25 = ((!K1_pll_lock_sync) # (!U1_wire_pll1_locked)) # (!K1_wire_lvds_tx_pll_locked);


--G1L2 is sdram:sdram|Equal0~0 at LCCOMB_X17_Y25_N20
G1L2 = (!G1_op_cycle[2] & (!G1_op_cycle[0] & (!G1_op_cycle[1] & !G1_op_cycle[3])));


--G1L352 is sdram:sdram|state.st_reset~1 at LCCOMB_X14_Y25_N4
G1L352 = (!G1_state.st_rfsh & (G1_state.st_reset & (!G1_state.st_wr & !G1_state.st_rd)));


--G1L353 is sdram:sdram|state.st_reset~2 at LCCOMB_X14_Y25_N22
G1L353 = (G1_state.st_rfsh & (G1_state.st_reset & (!G1_state.st_wr & !G1_state.st_rd))) # (!G1_state.st_rfsh & ((G1_state.st_reset & (G1_state.st_wr $ (G1_state.st_rd))) # (!G1_state.st_reset & (!G1_state.st_wr & !G1_state.st_rd))));


--G1L354 is sdram:sdram|state.st_reset~3 at LCCOMB_X14_Y25_N16
G1L354 = (G1_state.st_idle & (((G1L352 & !G1_state.st_init)))) # (!G1_state.st_idle & ((G1_state.st_init & ((G1L352))) # (!G1_state.st_init & (G1L353))));


--G1L52 is sdram:sdram|Selector86~0 at LCCOMB_X15_Y25_N28
G1L52 = (G1_op_cycle[3] & (!G1_op_cycle[2] & (G1_state.st_rfsh & !G1L133)));


--G1L1 is sdram:sdram|Decoder1~0 at LCCOMB_X15_Y25_N14
G1L1 = (!G1_op_cycle[2] & (G1_op_cycle[1] & (G1_op_cycle[3] & !G1_op_cycle[0])));


--G1L53 is sdram:sdram|Selector86~1 at LCCOMB_X14_Y25_N18
G1L53 = (!G1_state.st_init & ((G1L52) # ((!G1_state.st_rfsh & G1L1))));


--G1L54 is sdram:sdram|Selector86~2 at LCCOMB_X17_Y26_N22
G1L54 = (G1_rfsh_ctr[2]) # ((G1_rfsh_ctr[0] & G1_rfsh_ctr[1]));


--G1L55 is sdram:sdram|Selector86~3 at LCCOMB_X14_Y25_N28
G1L55 = (G1_state.st_init & (G1_rfsh_ctr[4] & G1_rfsh_ctr[3]));


--G1L56 is sdram:sdram|Selector86~4 at LCCOMB_X14_Y25_N14
G1L56 = (G1L53) # ((G1L55 & G1L54));


--G1L282 is sdram:sdram|op_cycle~4 at LCCOMB_X14_Y25_N12
G1L282 = (!G1_state.st_idle & G1_state.st_reset);


--G1L357 is sdram:sdram|state~17 at LCCOMB_X14_Y25_N20
G1L357 = (G1L354 & ((G1L13) # ((G1L282 & G1L56))));


--G1L283 is sdram:sdram|op_cycle~5 at LCCOMB_X16_Y25_N30
G1L283 = (!G1_state.st_idle & (!G1_op_cycle[0] & G1_state.st_reset));


--G1L284 is sdram:sdram|op_cycle~6 at LCCOMB_X16_Y25_N0
G1L284 = (G1_state.st_reset & (!G1_state.st_idle & (G1_op_cycle[0] $ (G1_op_cycle[1]))));


--G1L285 is sdram:sdram|op_cycle~7 at LCCOMB_X12_Y25_N30
G1L285 = (G1L282 & (G1_op_cycle[3] $ (((G1_op_cycle[2] & !G1L11)))));


--G1L358 is sdram:sdram|state~18 at LCCOMB_X15_Y25_N20
G1L358 = (G1L354 & abc_wrq);


--G1L359 is sdram:sdram|state~19 at LCCOMB_X15_Y25_N16
G1L359 = (!G1_state.st_idle & ((G1_state.st_reset) # (!G1_init_ctr[15])));


--G1L360 is sdram:sdram|state~20 at LCCOMB_X15_Y25_N22
G1L360 = (((G1L282 & G1L56)) # (!G1L354)) # (!G1L359);


--G1L361 is sdram:sdram|state~21 at LCCOMB_X15_Y25_N2
G1L361 = (G1L354 & (!abc_wrq & abc_rrq));


--G1L362 is sdram:sdram|state~22 at LCCOMB_X14_Y25_N30
G1L362 = (G1_state.st_reset & (G1_rfsh_ctr[4] & G1_rfsh_ctr[3]));


--G1L363 is sdram:sdram|state~23 at LCCOMB_X15_Y26_N28
G1L363 = (G1_state.st_idle) # ((!G1_state.st_init & ((G1_state.st_reset) # (!G1_init_ctr[15]))));


--G1L364 is sdram:sdram|state~24 at LCCOMB_X14_Y25_N2
G1L364 = (!G1L363 & (G1L354 & ((!G1L54) # (!G1L362))));


--G1L365 is sdram:sdram|state~25 at LCCOMB_X15_Y25_N12
G1L365 = (G1L354 & ((G1_state.st_idle) # ((G1_state.st_reset) # (G1_init_ctr[15]))));


--abc_xmemrd_q is abc_xmemrd_q at FF_X1_Y0_N3
--register power-up is high

abc_xmemrd_q = DFFEAS(A1L176, GLOBAL(U1L23),  ,  ,  , VCC, !GLOBAL(A1L457),  ,  );


--abc_xmem_done is abc_xmem_done at FF_X15_Y24_N7
--register power-up is low

abc_xmem_done = DFFEAS(A1L174, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_rack0 is sdram:sdram|rack0 at FF_X12_Y25_N13
--register power-up is low

G1_rack0 = DFFEAS(G1L66, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--A1L163 is abc_rrq~0 at LCCOMB_X15_Y25_N6
A1L163 = (!G1_rack0 & (!abc_xmemrd_q & !abc_xmem_done));


--abc_xmemwr_q is abc_xmemwr_q at FF_X16_Y21_N21
--register power-up is low

abc_xmemwr_q = DFFEAS(A1L183, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_wack0 is sdram:sdram|wack0 at FF_X12_Y25_N27
--register power-up is low

G1_wack0 = DFFEAS(G1L64, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--A1L167 is abc_wrq~0 at LCCOMB_X15_Y25_N8
A1L167 = (!abc_xmem_done & (!G1_wack0 & abc_xmemwr_q));


--G1L366 is sdram:sdram|state~26 at LCCOMB_X15_Y25_N4
G1L366 = (!G1L71 & (G1L354 & ((G1_rfsh_prio[0]) # (G1_rfsh_prio[1]))));


--G1L84 is sdram:sdram|col_addr[2]~10 at LCCOMB_X17_Y24_N26
G1L84 = (rst_n & ((G1L49) # ((G1L152 & !G1L351))));


--abc_di[0] is abc_di[0] at FF_X3_Y0_N31
--register power-up is low

abc_di[0] = DFFEAS(A1L69, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--A1L27 is WideOr0~0 at LCCOMB_X1_Y11_N12
A1L27 = (!A1L155 & (!A1L153 & (!A1L149 & !A1L151)));


--abc_iowr is abc_iowr at LCCOMB_X16_Y21_N24
abc_iowr = (A1L169 & (((!A1L157 & A1L27)) # (!A1L185))) # (!A1L169 & (!A1L157 & ((A1L27))));


--abc_di[1] is abc_di[1] at FF_X7_Y0_N10
--register power-up is low

abc_di[1] = DFFEAS(A1L72, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--abc_di[2] is abc_di[2] at FF_X7_Y0_N24
--register power-up is low

abc_di[2] = DFFEAS(A1L75, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--abc_di[3] is abc_di[3] at FF_X5_Y0_N10
--register power-up is low

abc_di[3] = DFFEAS(A1L78, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--abc_di[4] is abc_di[4] at FF_X3_Y0_N17
--register power-up is low

abc_di[4] = DFFEAS(A1L81, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--abc_di[5] is abc_di[5] at FF_X3_Y0_N10
--register power-up is low

abc_di[5] = DFFEAS(A1L84, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--G1_rfsh_ctr_last_msb is sdram:sdram|rfsh_ctr_last_msb at FF_X17_Y26_N29
--register power-up is low

G1_rfsh_ctr_last_msb = DFFEAS( , GLOBAL(U1L23),  ,  , rst_n, G1_rfsh_ctr[8],  ,  , VCC);


--G1_rfsh_tick is sdram:sdram|rfsh_tick at LCCOMB_X17_Y26_N20
G1_rfsh_tick = (!G1_rfsh_ctr[8] & G1_rfsh_ctr_last_msb);


--abc_di[6] is abc_di[6] at FF_X5_Y0_N3
--register power-up is low

abc_di[6] = DFFEAS(A1L87, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--abc_di[7] is abc_di[7] at FF_X7_Y0_N31
--register power-up is low

abc_di[7] = DFFEAS(A1L90, GLOBAL(U1L23),  ,  , rst_n,  ,  ,  ,  );


--G1L62 is sdram:sdram|Selector110~0 at LCCOMB_X11_Y25_N8
G1L62 = (!A1L30 & !A1L32);


--G1L5 is sdram:sdram|LessThan1~0 at LCCOMB_X19_Y25_N14
G1L5 = (!G1_op_cycle[3] & (((!G1_op_cycle[2]) # (!G1_op_cycle[0])) # (!G1_op_cycle[1])));


--G1L188 is sdram:sdram|dram_dqm[0]~2 at LCCOMB_X17_Y25_N10
G1L188 = (G1_state.st_wr & ((G1_op_cycle[2]) # ((G1_op_cycle[3]) # (G1_op_cycle[1]))));


--G1L76 is sdram:sdram|be_q[0]~0 at LCCOMB_X12_Y25_N28
G1L76 = (G1L49) # ((G1L188) # ((G1_state.st_rd & !G1L5)));


--G1L61 is sdram:sdram|Selector109~0 at LCCOMB_X11_Y25_N22
G1L61 = (A1L30 & !A1L32);


--G1_dram_cmd[4] is sdram:sdram|dram_cmd[4] at FF_X17_Y26_N17
--register power-up is low

G1_dram_cmd[4] = DFFEAS(G1L12, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L339 is sdram:sdram|rfsh_prio~0 at LCCOMB_X14_Y25_N8
G1L339 = (!G1_dram_cmd[4] & G1_rfsh_prio[0]);


--G1L340 is sdram:sdram|rfsh_prio~1 at LCCOMB_X16_Y26_N30
G1L340 = (G1_dram_cmd[4]) # ((G1_rfsh_ctr_last_msb & !G1_rfsh_ctr[8]));


--G1L68 is sdram:sdram|WideAnd0~0 at LCCOMB_X17_Y24_N0
G1L68 = (G1_col_addr[3] & (G1_col_addr[5] & (G1_col_addr[2] & G1_col_addr[4])));


--G1L69 is sdram:sdram|WideAnd0~1 at LCCOMB_X17_Y24_N2
G1L69 = (G1_col_addr[6] & (G1_col_addr[8] & (G1_col_addr[9] & G1_col_addr[7])));


--G1_WideAnd0 is sdram:sdram|WideAnd0 at LCCOMB_X17_Y25_N6
G1_WideAnd0 = (G1L69 & G1L68);


--K1_tx_reg[8] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8] at FF_X36_Y11_N17
--register power-up is low

K1_tx_reg[8] = DFFEAS(K1L118, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[1] at FF_X36_Y11_N3
--register power-up is low

R2_shift_reg[1] = DFFEAS(R2L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--K1_dffe11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11 at FF_X37_Y14_N29
--register power-up is low

K1_dffe11 = DFFEAS(K1L48, GLOBAL(K1L73),  ,  ,  ,  ,  ,  ,  );


--R2L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~0 at LCCOMB_X36_Y11_N0
R2L7 = (K1_dffe11 & (K1_tx_reg[8])) # (!K1_dffe11 & ((R2_shift_reg[1])));


--K1_tx_reg[9] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9] at FF_X36_Y11_N21
--register power-up is low

K1_tx_reg[9] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C1_qreg[6],  ,  , VCC);


--R1_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[1] at FF_X36_Y11_N31
--register power-up is low

R1_shift_reg[1] = DFFEAS(R1L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~0 at LCCOMB_X36_Y11_N18
R1L7 = (K1_dffe11 & (K1_tx_reg[9])) # (!K1_dffe11 & ((R1_shift_reg[1])));


--K1_tx_reg[18] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18] at FF_X36_Y12_N13
--register power-up is low

K1_tx_reg[18] = DFFEAS(K1L137, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[1] at FF_X36_Y12_N27
--register power-up is low

R4_shift_reg[1] = DFFEAS(R4L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~0 at LCCOMB_X36_Y12_N28
R4L7 = (K1_dffe11 & (K1_tx_reg[18])) # (!K1_dffe11 & ((R4_shift_reg[1])));


--K1_tx_reg[19] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19] at FF_X35_Y11_N29
--register power-up is low

K1_tx_reg[19] = DFFEAS(K1L139, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[1] at FF_X35_Y12_N21
--register power-up is low

R3_shift_reg[1] = DFFEAS(R3L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~0 at LCCOMB_X35_Y11_N4
R3L7 = (K1_dffe11 & (K1_tx_reg[19])) # (!K1_dffe11 & ((R3_shift_reg[1])));


--K1_tx_reg[28] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28] at FF_X35_Y12_N23
--register power-up is low

K1_tx_reg[28] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C2_qreg[0],  ,  , VCC);


--R6_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[1] at FF_X35_Y12_N1
--register power-up is low

R6_shift_reg[1] = DFFEAS(R6L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~0 at LCCOMB_X36_Y12_N30
R6L7 = (K1_dffe11 & (K1_tx_reg[28])) # (!K1_dffe11 & ((R6_shift_reg[1])));


--K1_tx_reg[29] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29] at FF_X35_Y11_N15
--register power-up is low

K1_tx_reg[29] = DFFEAS(K1L154, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[1] at FF_X35_Y11_N25
--register power-up is low

R5_shift_reg[1] = DFFEAS(R5L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~0 at LCCOMB_X35_Y11_N18
R5L7 = (K1_dffe11 & (K1_tx_reg[29])) # (!K1_dffe11 & ((R5_shift_reg[1])));


--K1_dffe22 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22 at FF_X37_Y14_N15
--register power-up is low

K1_dffe22 = DFFEAS(K1L71, GLOBAL(K1L73),  ,  ,  ,  ,  ,  ,  );


--P2_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[1] at FF_X39_Y14_N21
--register power-up is low

P2_shift_reg[1] = DFFEAS(P2L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~0 at LCCOMB_X39_Y14_N24
P2L9 = (P2_shift_reg[1]) # (K1_dffe22);


--P1_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[1] at FF_X39_Y14_N27
--register power-up is low

P1_shift_reg[1] = DFFEAS(P1L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~0 at LCCOMB_X39_Y14_N30
P1L9 = (P1_shift_reg[1]) # (K1_dffe22);


--abc_do[0] is abc_do[0] at DDIOOUTCELL_X3_Y0_N32
--register power-up is low

abc_do[0] = DFFEAS(G1_rd0[0], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[1] is abc_do[1] at DDIOOUTCELL_X7_Y0_N11
--register power-up is low

abc_do[1] = DFFEAS(G1_rd0[1], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[2] is abc_do[2] at DDIOOUTCELL_X7_Y0_N25
--register power-up is low

abc_do[2] = DFFEAS(G1_rd0[2], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[3] is abc_do[3] at DDIOOUTCELL_X5_Y0_N11
--register power-up is low

abc_do[3] = DFFEAS(G1_rd0[3], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[4] is abc_do[4] at DDIOOUTCELL_X3_Y0_N18
--register power-up is low

abc_do[4] = DFFEAS(G1_rd0[4], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[5] is abc_do[5] at DDIOOUTCELL_X3_Y0_N11
--register power-up is low

abc_do[5] = DFFEAS(G1_rd0[5], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[6] is abc_do[6] at DDIOOUTCELL_X5_Y0_N4
--register power-up is low

abc_do[6] = DFFEAS(G1_rd0[6], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--abc_do[7] is abc_do[7] at DDIOOUTCELL_X7_Y0_N32
--register power-up is low

abc_do[7] = DFFEAS(G1_rd0[7], GLOBAL(U1L23),  ,  , A1L107,  ,  ,  ,  );


--G1_dram_d[0] is sdram:sdram|dram_d[0] at DDIOOUTCELL_X32_Y29_N25
--register power-up is low

G1_dram_d[0] = DFFEAS(G1_wdata_q[0], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L185Q is sdram:sdram|dram_d_en~_Duplicate_15 at DDIOOECELL_X3_Y29_N26
--register power-up is low

G1L185Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_dram_d[1] is sdram:sdram|dram_d[1] at DDIOOUTCELL_X32_Y29_N4
--register power-up is low

G1_dram_d[1] = DFFEAS(G1_wdata_q[17], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[2] is sdram:sdram|dram_d[2] at DDIOOUTCELL_X39_Y29_N32
--register power-up is low

G1_dram_d[2] = DFFEAS(G1_wdata_q[10], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[3] is sdram:sdram|dram_d[3] at DDIOOUTCELL_X37_Y29_N18
--register power-up is low

G1_dram_d[3] = DFFEAS(G1_wdata_q[11], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[4] is sdram:sdram|dram_d[4] at DDIOOUTCELL_X30_Y29_N25
--register power-up is low

G1_dram_d[4] = DFFEAS(G1_wdata_q[12], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[5] is sdram:sdram|dram_d[5] at DDIOOUTCELL_X30_Y29_N18
--register power-up is low

G1_dram_d[5] = DFFEAS(G1_wdata_q[13], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[6] is sdram:sdram|dram_d[6] at DDIOOUTCELL_X26_Y29_N32
--register power-up is low

G1_dram_d[6] = DFFEAS(G1_wdata_q[14], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[7] is sdram:sdram|dram_d[7] at DDIOOUTCELL_X26_Y29_N25
--register power-up is low

G1_dram_d[7] = DFFEAS(G1_wdata_q[15], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[8] is sdram:sdram|dram_d[8] at DDIOOUTCELL_X5_Y29_N4
--register power-up is low

G1_dram_d[8] = DFFEAS(G1_wdata_q[24], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[9] is sdram:sdram|dram_d[9] at DDIOOUTCELL_X7_Y29_N11
--register power-up is low

G1_dram_d[9] = DFFEAS(G1_wdata_q[17], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[10] is sdram:sdram|dram_d[10] at DDIOOUTCELL_X5_Y29_N18
--register power-up is low

G1_dram_d[10] = DFFEAS(G1_wdata_q[10], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[11] is sdram:sdram|dram_d[11] at DDIOOUTCELL_X3_Y29_N4
--register power-up is low

G1_dram_d[11] = DFFEAS(G1_wdata_q[11], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[12] is sdram:sdram|dram_d[12] at DDIOOUTCELL_X7_Y29_N32
--register power-up is low

G1_dram_d[12] = DFFEAS(G1_wdata_q[12], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[13] is sdram:sdram|dram_d[13] at DDIOOUTCELL_X5_Y29_N25
--register power-up is low

G1_dram_d[13] = DFFEAS(G1_wdata_q[13], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[14] is sdram:sdram|dram_d[14] at DDIOOUTCELL_X11_Y29_N32
--register power-up is low

G1_dram_d[14] = DFFEAS(G1_wdata_q[14], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_d[15] is sdram:sdram|dram_d[15] at DDIOOUTCELL_X3_Y29_N25
--register power-up is low

G1_dram_d[15] = DFFEAS(G1_wdata_q[15], GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--A1L173 is abc_xmem_done~0 at LCCOMB_X15_Y24_N28
A1L173 = (!abc_xmemrd_q & ((abc_xmem_done) # (G1_rack0)));


--A1L174 is abc_xmem_done~1 at LCCOMB_X15_Y24_N6
A1L174 = (A1L173) # ((abc_xmemwr_q & ((G1_wack0) # (abc_xmem_done))));


--G1L65 is sdram:sdram|Selector144~0 at LCCOMB_X12_Y25_N2
G1L65 = (!abc_wrq & (abc_rrq & G1_state.st_idle));


--G1L66 is sdram:sdram|Selector144~1 at LCCOMB_X12_Y25_N12
G1L66 = (G1L65) # ((!G1L1 & (G1_state.st_rd & G1_rack0)));


--A1L183 is abc_xmemwr~0 at LCCOMB_X16_Y21_N20
A1L183 = (A1L169 & (!A1L181)) # (!A1L169 & ((A1L185 & (!A1L181)) # (!A1L185 & ((!A1L179)))));


--G1L63 is sdram:sdram|Selector111~0 at LCCOMB_X12_Y25_N4
G1L63 = (abc_wrq & G1_state.st_idle);


--G1L64 is sdram:sdram|Selector111~1 at LCCOMB_X12_Y25_N26
G1L64 = (G1L63) # ((G1_state.st_wr & (G1_wack0 & !G1L1)));


--G1L60 is sdram:sdram|Selector108~0 at LCCOMB_X12_Y25_N0
G1L60 = (!A1L30 & A1L32);


--G1L59 is sdram:sdram|Selector107~0 at LCCOMB_X12_Y25_N10
G1L59 = (A1L30 & A1L32);


--G1L12 is sdram:sdram|Selector67~0 at LCCOMB_X17_Y26_N16
G1L12 = ((G1_state.st_init & G1L73)) # (!G1L21);


--C3_qreg[7] is tmdsenc:hdmitmds[2].enc|qreg[7] at FF_X32_Y11_N7
--register power-up is low

C3_qreg[7] = DFFEAS(C3L61, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6] at FF_X36_Y11_N25
--register power-up is low

K1_tx_reg[6] = DFFEAS(K1L114, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[2] at FF_X36_Y11_N11
--register power-up is low

R2_shift_reg[2] = DFFEAS(R2L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~1 at LCCOMB_X36_Y11_N2
R2L8 = (K1_dffe11 & ((K1_tx_reg[6]))) # (!K1_dffe11 & (R2_shift_reg[2]));


--K1_dffe7a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[2] at FF_X37_Y12_N13
--register power-up is low

K1_dffe7a[2] = DFFEAS( , GLOBAL(K1L73),  ,  , !K1_sync_dffe12a, K1_dffe5a[2],  ,  , VCC);


--K1_dffe3a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[0] at FF_X37_Y12_N19
--register power-up is low

K1_dffe3a[0] = DFFEAS(K1L9, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe7a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[0] at FF_X37_Y12_N29
--register power-up is low

K1_dffe7a[0] = DFFEAS( , GLOBAL(K1L73),  ,  , !K1_sync_dffe12a, K1_dffe5a[0],  ,  , VCC);


--K1_dffe3a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[2] at FF_X37_Y12_N3
--register power-up is low

K1_dffe3a[2] = DFFEAS(K1L13, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1L44 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~0 at LCCOMB_X37_Y12_N28
K1L44 = (K1_dffe7a[2] & (K1_dffe3a[2] & (K1_dffe7a[0] $ (!K1_dffe3a[0])))) # (!K1_dffe7a[2] & (!K1_dffe3a[2] & (K1_dffe7a[0] $ (!K1_dffe3a[0]))));


--K1_dffe8a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[2] at FF_X37_Y12_N17
--register power-up is low

K1_dffe8a[2] = DFFEAS( , GLOBAL(K1L73),  ,  , K1_sync_dffe12a, K1_dffe6a[2],  ,  , VCC);


--K1_dffe8a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[0] at FF_X37_Y12_N7
--register power-up is low

K1_dffe8a[0] = DFFEAS(K1L40, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe4a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[0] at FF_X37_Y12_N25
--register power-up is low

K1_dffe4a[0] = DFFEAS(K1L16, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe4a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[2] at FF_X37_Y12_N27
--register power-up is low

K1_dffe4a[2] = DFFEAS(K1L20, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1L45 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~1 at LCCOMB_X37_Y12_N16
K1L45 = (K1_dffe4a[2] & (K1_dffe8a[2] & (K1_dffe4a[0] $ (!K1_dffe8a[0])))) # (!K1_dffe4a[2] & (!K1_dffe8a[2] & (K1_dffe4a[0] $ (!K1_dffe8a[0]))));


--K1_dffe8a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[1] at FF_X36_Y14_N15
--register power-up is low

K1_dffe8a[1] = DFFEAS( , GLOBAL(K1L73),  ,  , K1_sync_dffe12a, K1_dffe6a[1],  ,  , VCC);


--K1_dffe4a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[1] at FF_X36_Y14_N13
--register power-up is low

K1_dffe4a[1] = DFFEAS(K1L18, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1_sync_dffe12a is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a at FF_X36_Y15_N29
--register power-up is low

K1_sync_dffe12a = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , K1L99,  ,  , VCC);


--K1L46 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~2 at LCCOMB_X37_Y14_N16
K1L46 = (!K1_sync_dffe12a & (K1_dffe4a[1] $ (!K1_dffe8a[1])));


--K1_dffe7a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[1] at FF_X36_Y14_N19
--register power-up is low

K1_dffe7a[1] = DFFEAS(K1L36, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe3a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[1] at FF_X36_Y14_N5
--register power-up is low

K1_dffe3a[1] = DFFEAS(K1L11, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1L47 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~3 at LCCOMB_X37_Y14_N18
K1L47 = (K1_sync_dffe12a & (K1_dffe3a[1] $ (!K1_dffe7a[1])));


--K1L48 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~4 at LCCOMB_X37_Y14_N28
K1L48 = (K1L45 & ((K1L46) # ((K1L47 & K1L44)))) # (!K1L45 & (K1L47 & (K1L44)));


--K1_tx_reg[7] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7] at FF_X36_Y11_N29
--register power-up is low

K1_tx_reg[7] = DFFEAS(K1L116, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[2] at FF_X36_Y11_N27
--register power-up is low

R1_shift_reg[2] = DFFEAS(R1L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~1 at LCCOMB_X36_Y11_N30
R1L8 = (K1_dffe11 & (K1_tx_reg[7])) # (!K1_dffe11 & ((R1_shift_reg[2])));


--C1_qreg[3] is tmdsenc:hdmitmds[0].enc|qreg[3] at FF_X32_Y14_N17
--register power-up is low

C1_qreg[3] = DFFEAS(C1L63, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[16] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16] at FF_X36_Y12_N21
--register power-up is low

K1_tx_reg[16] = DFFEAS(K1L133, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[2] at FF_X36_Y12_N15
--register power-up is low

R4_shift_reg[2] = DFFEAS(R4L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~1 at LCCOMB_X36_Y12_N26
R4L8 = (K1_dffe11 & (K1_tx_reg[16])) # (!K1_dffe11 & ((R4_shift_reg[2])));


--C2_qreg[3] is tmdsenc:hdmitmds[1].enc|qreg[3] at FF_X32_Y12_N1
--register power-up is low

C2_qreg[3] = DFFEAS(C2L62, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[17] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17] at FF_X35_Y12_N7
--register power-up is low

K1_tx_reg[17] = DFFEAS(K1L135, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[2] at FF_X35_Y12_N29
--register power-up is low

R3_shift_reg[2] = DFFEAS(R3L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~1 at LCCOMB_X35_Y12_N20
R3L8 = (K1_dffe11 & (K1_tx_reg[17])) # (!K1_dffe11 & ((R3_shift_reg[2])));


--K1_tx_reg[26] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26] at FF_X35_Y12_N15
--register power-up is low

K1_tx_reg[26] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C3_qreg[1],  ,  , VCC);


--R6_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[2] at FF_X35_Y12_N13
--register power-up is low

R6_shift_reg[2] = DFFEAS(R6L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~1 at LCCOMB_X35_Y12_N0
R6L8 = (K1_dffe11 & ((K1_tx_reg[26]))) # (!K1_dffe11 & (R6_shift_reg[2]));


--K1_tx_reg[27] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27] at FF_X35_Y11_N27
--register power-up is low

K1_tx_reg[27] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C1_qreg[0],  ,  , VCC);


--R5_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[2] at FF_X35_Y11_N13
--register power-up is low

R5_shift_reg[2] = DFFEAS(R5L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~1 at LCCOMB_X35_Y11_N24
R5L8 = (K1_dffe11 & ((K1_tx_reg[27]))) # (!K1_dffe11 & (R5_shift_reg[2]));


--K1_dffe18a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[2] at FF_X36_Y14_N3
--register power-up is low

K1_dffe18a[2] = DFFEAS( , GLOBAL(K1L73),  ,  , !K1_sync_dffe12a, K1_dffe16a[2],  ,  , VCC);


--K1_dffe14a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[0] at FF_X36_Y14_N21
--register power-up is low

K1_dffe14a[0] = DFFEAS(K1L51, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe18a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[0] at FF_X36_Y14_N7
--register power-up is low

K1_dffe18a[0] = DFFEAS(K1L65, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe14a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[2] at FF_X36_Y14_N1
--register power-up is low

K1_dffe14a[2] = DFFEAS(K1L55, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1L70 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22~0 at LCCOMB_X36_Y14_N2
K1L70 = (K1_dffe18a[0] & (K1_dffe14a[0] & (K1_dffe14a[2] $ (!K1_dffe18a[2])))) # (!K1_dffe18a[0] & (!K1_dffe14a[0] & (K1_dffe14a[2] $ (!K1_dffe18a[2]))));


--K1_dffe18a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[1] at FF_X36_Y14_N23
--register power-up is low

K1_dffe18a[1] = DFFEAS(K1L67, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe14a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[1] at FF_X36_Y14_N17
--register power-up is low

K1_dffe14a[1] = DFFEAS(K1L53, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--K1L71 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22~1 at LCCOMB_X37_Y14_N14
K1L71 = (K1_sync_dffe12a & (K1L70 & (K1_dffe14a[1] $ (!K1_dffe18a[1]))));


--P2_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[2] at FF_X39_Y14_N9
--register power-up is low

P2_shift_reg[2] = DFFEAS(P2L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~1 at LCCOMB_X39_Y14_N20
P2L10 = (K1_dffe22) # (P2_shift_reg[2]);


--P1_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[2] at FF_X39_Y14_N11
--register power-up is low

P1_shift_reg[2] = DFFEAS(P1L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~1 at LCCOMB_X39_Y14_N26
P1L10 = (P1_shift_reg[2]) # (K1_dffe22);


--G1_rd0[0] is sdram:sdram|rd0[0] at FF_X11_Y25_N29
--register power-up is low

G1_rd0[0] = DFFEAS(G1L299, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rvalid0 is sdram:sdram|rvalid0 at FF_X12_Y25_N19
--register power-up is low

G1_rvalid0 = DFFEAS(G1L345, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--A1L107 is abc_do[0]~0 at LCCOMB_X12_Y25_N8
A1L107 = (G1_rvalid0 & (rst_n & G1_rack0));


--G1_rd0[1] is sdram:sdram|rd0[1] at FF_X11_Y25_N7
--register power-up is low

G1_rd0[1] = DFFEAS(G1L300, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rd0[2] is sdram:sdram|rd0[2] at FF_X11_Y25_N1
--register power-up is low

G1_rd0[2] = DFFEAS(G1L301, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rd0[3] is sdram:sdram|rd0[3] at FF_X11_Y25_N3
--register power-up is low

G1_rd0[3] = DFFEAS(G1L302, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rd0[4] is sdram:sdram|rd0[4] at FF_X11_Y25_N13
--register power-up is low

G1_rd0[4] = DFFEAS(G1L303, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rd0[5] is sdram:sdram|rd0[5] at FF_X11_Y25_N11
--register power-up is low

G1_rd0[5] = DFFEAS(G1L304, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rd0[6] is sdram:sdram|rd0[6] at FF_X11_Y25_N17
--register power-up is low

G1_rd0[6] = DFFEAS(G1L305, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_rd0[7] is sdram:sdram|rd0[7] at FF_X11_Y25_N31
--register power-up is low

G1_rd0[7] = DFFEAS(G1L306, GLOBAL(U1L23),  ,  , G1L291,  ,  ,  ,  );


--G1_wdata_q[0] is sdram:sdram|wdata_q[0] at FF_X12_Y25_N23
--register power-up is low

G1_wdata_q[0] = DFFEAS(G1L370, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_wdata_q[17] is sdram:sdram|wdata_q[17] at FF_X8_Y3_N13
--register power-up is low

G1_wdata_q[17] = DFFEAS(G1L383, GLOBAL(U1L23),  ,  , G1L63,  ,  ,  ,  );


--G1_wdata_q[10] is sdram:sdram|wdata_q[10] at FF_X7_Y12_N5
--register power-up is low

G1_wdata_q[10] = DFFEAS(G1L372, GLOBAL(U1L23),  ,  , G1L63,  ,  ,  ,  );


--G1_wdata_q[11] is sdram:sdram|wdata_q[11] at FF_X7_Y12_N7
--register power-up is low

G1_wdata_q[11] = DFFEAS(G1L374, GLOBAL(U1L23),  ,  , G1L63,  ,  ,  ,  );


--G1_wdata_q[12] is sdram:sdram|wdata_q[12] at FF_X7_Y12_N21
--register power-up is low

G1_wdata_q[12] = DFFEAS(G1L376, GLOBAL(U1L23),  ,  , G1L63,  ,  ,  ,  );


--G1_wdata_q[13] is sdram:sdram|wdata_q[13] at FF_X7_Y12_N11
--register power-up is low

G1_wdata_q[13] = DFFEAS( , GLOBAL(U1L23),  ,  , G1L63, A1L84,  ,  , VCC);


--G1_wdata_q[14] is sdram:sdram|wdata_q[14] at FF_X7_Y12_N1
--register power-up is low

G1_wdata_q[14] = DFFEAS(G1L379, GLOBAL(U1L23),  ,  , G1L63,  ,  ,  ,  );


--G1_wdata_q[15] is sdram:sdram|wdata_q[15] at FF_X8_Y3_N11
--register power-up is low

G1_wdata_q[15] = DFFEAS(G1L381, GLOBAL(U1L23),  ,  , G1L63,  ,  ,  ,  );


--G1_wdata_q[24] is sdram:sdram|wdata_q[24] at FF_X7_Y12_N19
--register power-up is low

G1_wdata_q[24] = DFFEAS( , GLOBAL(U1L23),  ,  , G1L63, A1L69,  ,  , VCC);


--C1_denreg is tmdsenc:hdmitmds[0].enc|denreg at FF_X33_Y12_N15
--register power-up is low

C1_denreg = DFFEAS(C1L30, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--dummydata[0] is dummydata[0] at FF_X33_Y11_N27
--register power-up is low

dummydata[0] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[23],  ,  , VCC);


--dummydata[23] is dummydata[23] at FF_X33_Y11_N21
--register power-up is low

dummydata[23] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[22],  ,  , VCC);


--dummydata[21] is dummydata[21] at FF_X33_Y11_N9
--register power-up is low

dummydata[21] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[20],  ,  , VCC);


--dummydata[22] is dummydata[22] at FF_X33_Y11_N7
--register power-up is low

dummydata[22] = DFFEAS(A1L221, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[19] is dummydata[19] at FF_X33_Y14_N25
--register power-up is low

dummydata[19] = DFFEAS(A1L216, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[20] is dummydata[20] at FF_X33_Y11_N1
--register power-up is low

dummydata[20] = DFFEAS(A1L218, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[17] is dummydata[17] at FF_X33_Y12_N29
--register power-up is low

dummydata[17] = DFFEAS(A1L213, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[18] is dummydata[18] at FF_X33_Y11_N3
--register power-up is low

dummydata[18] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[17],  ,  , VCC);


--C3L4 is tmdsenc:hdmitmds[2].enc|Add4~2 at LCCOMB_X33_Y11_N18
C3L4 = dummydata[20] $ (dummydata[18] $ (dummydata[17] $ (!dummydata[19])));


--C3L5 is tmdsenc:hdmitmds[2].enc|Add4~3 at LCCOMB_X33_Y11_N30
C3L5 = dummydata[22] $ (dummydata[21] $ (dummydata[23] $ (C3L4)));


--C3L27 is tmdsenc:hdmitmds[2].enc|Equal0~0 at LCCOMB_X31_Y11_N28
C3L27 = (!C3_disparity[2] & (!C3_disparity[1] & (!C3_disparity[3] & !C3_disparity[0])));


--C3L10 is tmdsenc:hdmitmds[2].enc|Add5~0 at LCCOMB_X33_Y11_N24
C3L10 = (dummydata[20] & ((dummydata[18] & ((dummydata[19]) # (!dummydata[17]))) # (!dummydata[18] & ((dummydata[17]) # (!dummydata[19]))))) # (!dummydata[20] & ((dummydata[18] & ((dummydata[17]) # (!dummydata[19]))) # (!dummydata[18] & (dummydata[17] & !dummydata[19]))));


--C3L1 is tmdsenc:hdmitmds[2].enc|Add2~0 at LCCOMB_X33_Y11_N8
C3L1 = dummydata[22] $ (dummydata[23] $ (dummydata[21] $ (!dummydata[0])));


--C3L6 is tmdsenc:hdmitmds[2].enc|Add4~4 at LCCOMB_X33_Y11_N10
C3L6 = dummydata[17] $ (dummydata[18]);


--C3L12 is tmdsenc:hdmitmds[2].enc|Add6~0 at LCCOMB_X33_Y11_N4
C3L12 = (C3L1 & (C3L6 $ (dummydata[19] $ (!dummydata[20]))));


--C3L2 is tmdsenc:hdmitmds[2].enc|Add2~1 at LCCOMB_X33_Y11_N20
C3L2 = (dummydata[22] & ((dummydata[21] & ((!dummydata[0]) # (!dummydata[23]))) # (!dummydata[21] & (!dummydata[23] & !dummydata[0])))) # (!dummydata[22] & ((dummydata[21] & ((dummydata[23]) # (dummydata[0]))) # (!dummydata[21] & ((!dummydata[0]) # (!dummydata[23])))));


--C3L11 is tmdsenc:hdmitmds[2].enc|Add5~1 at LCCOMB_X33_Y11_N2
C3L11 = (dummydata[17] & (dummydata[20] & (dummydata[18] & !dummydata[19])));


--C3L3 is tmdsenc:hdmitmds[2].enc|Add2~2 at LCCOMB_X33_Y11_N26
C3L3 = (!dummydata[22] & (dummydata[21] & (!dummydata[0] & !dummydata[23])));


--C3L13 is tmdsenc:hdmitmds[2].enc|Add6~1 at LCCOMB_X33_Y11_N22
C3L13 = C3L11 $ (C3L3);


--C3L14 is tmdsenc:hdmitmds[2].enc|Add6~2 at LCCOMB_X33_Y11_N12
C3L14 = C3L13 $ (((C3L2 & ((C3L12) # (C3L10))) # (!C3L2 & (C3L12 & C3L10))));


--C3L15 is tmdsenc:hdmitmds[2].enc|Add6~3 at LCCOMB_X33_Y11_N16
C3L15 = C3L6 $ (dummydata[19] $ (C3L1 $ (!dummydata[20])));


--C3L16 is tmdsenc:hdmitmds[2].enc|Add6~4 at LCCOMB_X32_Y11_N20
C3L16 = C3L12 $ (C3L2 $ (C3L10));


--C3L28 is tmdsenc:hdmitmds[2].enc|always1~0 at LCCOMB_X31_Y11_N14
C3L28 = (C3L27) # ((!C3L15 & (!C3L16 & C3L14)));


--C3L44 is tmdsenc:hdmitmds[2].enc|dx[8]~0 at LCCOMB_X31_Y11_N24
C3L44 = (C3L15 & ((C3L14) # ((!dummydata[17] & !C3L16)))) # (!C3L15 & (((C3L16 & C3L14)) # (!dummydata[17])));


--C3L7 is tmdsenc:hdmitmds[2].enc|Add4~5 at LCCOMB_X32_Y11_N18
C3L7 = C3_disparity[3] $ (C3L14);


--C3L60 is tmdsenc:hdmitmds[2].enc|qreg~0 at LCCOMB_X32_Y11_N12
C3L60 = C3L5 $ (((!C3L28 & (C3L44 $ (!C3L7)))));


--C3L61 is tmdsenc:hdmitmds[2].enc|qreg~1 at LCCOMB_X32_Y11_N6
C3L61 = (C3L60 $ (dummydata[0])) # (!C1_denreg);


--vid_rst_n is vid_rst_n at FF_X26_Y12_N13
--register power-up is low

vid_rst_n = DFFEAS(A1L604, GLOBAL(U1L27), !GLOBAL(A1L26),  ,  ,  ,  ,  ,  );


--C1_qreg[7] is tmdsenc:hdmitmds[0].enc|qreg[7] at FF_X32_Y14_N15
--register power-up is low

C1_qreg[7] = DFFEAS(C1L65, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4] at FF_X36_Y11_N13
--register power-up is low

K1_tx_reg[4] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C2_qreg[8],  ,  , VCC);


--R2_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[3] at FF_X36_Y11_N23
--register power-up is low

R2_shift_reg[3] = DFFEAS(R2L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~2 at LCCOMB_X36_Y11_N10
R2L9 = (K1_dffe11 & (K1_tx_reg[4])) # (!K1_dffe11 & ((R2_shift_reg[3])));


--K1_dffe5a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[2] at FF_X37_Y12_N9
--register power-up is low

K1_dffe5a[2] = DFFEAS(K1L26, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--M2_counter_reg_bit[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[0] at FF_X36_Y15_N27
--register power-up is low

M2_counter_reg_bit[0] = DFFEAS(M2L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--K1_dffe5a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[0] at FF_X37_Y12_N23
--register power-up is low

K1_dffe5a[0] = DFFEAS(K1L23, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--M2_counter_reg_bit[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[2] at FF_X36_Y15_N21
--register power-up is low

M2_counter_reg_bit[2] = DFFEAS(M2L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--K1_dffe6a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[2] at FF_X37_Y12_N5
--register power-up is low

K1_dffe6a[2] = DFFEAS( , GLOBAL(K1L73),  ,  , !K1_sync_dffe12a, K1_dffe4a[2],  ,  , VCC);


--K1_dffe6a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[0] at FF_X37_Y12_N11
--register power-up is low

K1_dffe6a[0] = DFFEAS(K1L29, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--K1_dffe6a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[1] at FF_X36_Y14_N27
--register power-up is low

K1_dffe6a[1] = DFFEAS(K1L31, GLOBAL(K1L73),  ,  , !K1_sync_dffe12a,  ,  ,  ,  );


--M2_counter_reg_bit[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[1] at FF_X36_Y15_N31
--register power-up is low

M2_counter_reg_bit[1] = DFFEAS(M2L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--K1_dffe5a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[1] at FF_X36_Y14_N29
--register power-up is low

K1_dffe5a[1] = DFFEAS( , GLOBAL(K1L73),  ,  , K1_sync_dffe12a, K1_dffe3a[1],  ,  , VCC);


--dummydata[3] is dummydata[3] at FF_X31_Y13_N11
--register power-up is low

dummydata[3] = DFFEAS(A1L194, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[4] is dummydata[4] at FF_X31_Y13_N5
--register power-up is low

dummydata[4] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[3],  ,  , VCC);


--dummydata[1] is dummydata[1] at FF_X32_Y13_N21
--register power-up is low

dummydata[1] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[0],  ,  , VCC);


--dummydata[2] is dummydata[2] at FF_X31_Y13_N31
--register power-up is low

dummydata[2] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[1],  ,  , VCC);


--C1L10 is tmdsenc:hdmitmds[0].enc|Add5~0 at LCCOMB_X31_Y13_N28
C1L10 = (dummydata[1] & ((dummydata[4] & ((dummydata[3]) # (!dummydata[2]))) # (!dummydata[4] & (!dummydata[2] & dummydata[3])))) # (!dummydata[1] & ((dummydata[4] & ((dummydata[2]) # (!dummydata[3]))) # (!dummydata[4] & ((dummydata[3]) # (!dummydata[2])))));


--dummydata[7] is dummydata[7] at FF_X31_Y13_N21
--register power-up is low

dummydata[7] = DFFEAS(A1L199, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[8] is dummydata[8] at FF_X31_Y13_N27
--register power-up is low

dummydata[8] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[7],  ,  , VCC);


--dummydata[5] is dummydata[5] at FF_X31_Y13_N3
--register power-up is low

dummydata[5] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[4],  ,  , VCC);


--dummydata[6] is dummydata[6] at FF_X31_Y13_N17
--register power-up is low

dummydata[6] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[5],  ,  , VCC);


--C1L1 is tmdsenc:hdmitmds[0].enc|Add2~0 at LCCOMB_X31_Y13_N26
C1L1 = dummydata[6] $ (dummydata[7] $ (dummydata[8] $ (dummydata[5])));


--C1L4 is tmdsenc:hdmitmds[0].enc|Add4~2 at LCCOMB_X31_Y13_N30
C1L4 = dummydata[1] $ (dummydata[2]);


--C1L12 is tmdsenc:hdmitmds[0].enc|Add6~0 at LCCOMB_X31_Y13_N4
C1L12 = (C1L1 & (C1L4 $ (dummydata[4] $ (dummydata[3]))));


--C1L2 is tmdsenc:hdmitmds[0].enc|Add2~1 at LCCOMB_X31_Y13_N16
C1L2 = (dummydata[7] & ((dummydata[5] & ((dummydata[6]) # (!dummydata[8]))) # (!dummydata[5] & (dummydata[6] & !dummydata[8])))) # (!dummydata[7] & ((dummydata[5] & ((dummydata[8]) # (!dummydata[6]))) # (!dummydata[5] & ((dummydata[6]) # (!dummydata[8])))));


--C1L11 is tmdsenc:hdmitmds[0].enc|Add5~1 at LCCOMB_X31_Y13_N22
C1L11 = (!dummydata[1] & (dummydata[4] & (!dummydata[2] & dummydata[3])));


--C1L3 is tmdsenc:hdmitmds[0].enc|Add2~2 at LCCOMB_X31_Y13_N2
C1L3 = (!dummydata[8] & (!dummydata[7] & (dummydata[5] & dummydata[6])));


--C1L13 is tmdsenc:hdmitmds[0].enc|Add6~1 at LCCOMB_X31_Y13_N12
C1L13 = C1L3 $ (C1L11);


--C1L14 is tmdsenc:hdmitmds[0].enc|Add6~2 at LCCOMB_X31_Y13_N0
C1L14 = C1L13 $ (((C1L2 & ((C1L12) # (C1L10))) # (!C1L2 & (C1L12 & C1L10))));


--C1L15 is tmdsenc:hdmitmds[0].enc|Add6~3 at LCCOMB_X31_Y13_N18
C1L15 = C1L4 $ (dummydata[4] $ (C1L1 $ (dummydata[3])));


--C1L16 is tmdsenc:hdmitmds[0].enc|Add6~4 at LCCOMB_X31_Y13_N8
C1L16 = C1L2 $ (C1L12 $ (C1L10));


--C1L46 is tmdsenc:hdmitmds[0].enc|dx[8]~0 at LCCOMB_X31_Y14_N14
C1L46 = (C1L15 & ((C1L14) # ((!C1L16 & dummydata[1])))) # (!C1L15 & ((dummydata[1]) # ((C1L14 & C1L16))));


--C1L27 is tmdsenc:hdmitmds[0].enc|Equal0~0 at LCCOMB_X31_Y14_N28
C1L27 = (!C1_disparity[2] & (!C1_disparity[1] & (!C1_disparity[3] & !C1_disparity[0])));


--C1L28 is tmdsenc:hdmitmds[0].enc|always1~0 at LCCOMB_X31_Y14_N10
C1L28 = (C1L27) # ((!C1L15 & (!C1L16 & C1L14)));


--C1L5 is tmdsenc:hdmitmds[0].enc|Add4~3 at LCCOMB_X31_Y13_N14
C1L5 = dummydata[1] $ (dummydata[4] $ (dummydata[2] $ (dummydata[3])));


--C1L6 is tmdsenc:hdmitmds[0].enc|Add4~4 at LCCOMB_X31_Y13_N24
C1L6 = C1L5 $ (dummydata[5] $ (dummydata[6] $ (!dummydata[7])));


--C1L7 is tmdsenc:hdmitmds[0].enc|Add4~5 at LCCOMB_X32_Y14_N28
C1L7 = C1L14 $ (C1_disparity[3]);


--C1L62 is tmdsenc:hdmitmds[0].enc|qreg~0 at LCCOMB_X32_Y14_N30
C1L62 = C1L6 $ (((C1L28 & ((!C1L46))) # (!C1L28 & (C1L7))));


--C2_qreg[7] is tmdsenc:hdmitmds[1].enc|qreg[7] at FF_X33_Y12_N11
--register power-up is low

C2_qreg[7] = DFFEAS(C2L65, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[5] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5] at FF_X36_Y11_N9
--register power-up is low

K1_tx_reg[5] = DFFEAS(K1L112, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[3] at FF_X36_Y12_N17
--register power-up is low

R1_shift_reg[3] = DFFEAS(R1L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~2 at LCCOMB_X36_Y11_N26
R1L9 = (K1_dffe11 & (K1_tx_reg[5])) # (!K1_dffe11 & ((R1_shift_reg[3])));


--C1L63 is tmdsenc:hdmitmds[0].enc|qreg~1 at LCCOMB_X32_Y14_N16
C1L63 = (C1L5 $ (((C1L28) # (C1L9)))) # (!C1_denreg);


--K1_tx_reg[14] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14] at FF_X36_Y12_N19
--register power-up is low

K1_tx_reg[14] = DFFEAS(K1L129, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[3] at FF_X36_Y12_N9
--register power-up is low

R4_shift_reg[3] = DFFEAS(R4L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~2 at LCCOMB_X36_Y12_N14
R4L9 = (K1_dffe11 & (K1_tx_reg[14])) # (!K1_dffe11 & ((R4_shift_reg[3])));


--dummydata[11] is dummydata[11] at FF_X30_Y12_N23
--register power-up is low

dummydata[11] = DFFEAS(A1L205, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[12] is dummydata[12] at FF_X30_Y12_N15
--register power-up is low

dummydata[12] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[11],  ,  , VCC);


--dummydata[9] is dummydata[9] at FF_X30_Y12_N5
--register power-up is low

dummydata[9] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[8],  ,  , VCC);


--dummydata[10] is dummydata[10] at FF_X30_Y12_N27
--register power-up is low

dummydata[10] = DFFEAS(A1L203, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--C2L4 is tmdsenc:hdmitmds[1].enc|Add4~2 at LCCOMB_X30_Y12_N2
C2L4 = dummydata[12] $ (dummydata[10] $ (dummydata[9] $ (!dummydata[11])));


--C2L29 is tmdsenc:hdmitmds[1].enc|Equal0~0 at LCCOMB_X31_Y12_N28
C2L29 = (!C2_disparity[2] & (!C2_disparity[0] & (!C2_disparity[3] & !C2_disparity[1])));


--C2L10 is tmdsenc:hdmitmds[1].enc|Add5~0 at LCCOMB_X30_Y12_N12
C2L10 = (dummydata[12] & ((dummydata[10] & ((!dummydata[11]) # (!dummydata[9]))) # (!dummydata[10] & (!dummydata[9] & !dummydata[11])))) # (!dummydata[12] & ((dummydata[10] & ((dummydata[9]) # (dummydata[11]))) # (!dummydata[10] & ((!dummydata[11]) # (!dummydata[9])))));


--dummydata[15] is dummydata[15] at FF_X30_Y12_N1
--register power-up is low

dummydata[15] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[14],  ,  , VCC);


--dummydata[16] is dummydata[16] at FF_X33_Y12_N5
--register power-up is low

dummydata[16] = DFFEAS(A1L211, GLOBAL(U1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[13] is dummydata[13] at FF_X30_Y12_N9
--register power-up is low

dummydata[13] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[12],  ,  , VCC);


--dummydata[14] is dummydata[14] at FF_X30_Y12_N31
--register power-up is low

dummydata[14] = DFFEAS( , GLOBAL(U1L27),  ,  ,  , dummydata[13],  ,  , VCC);


--C2L1 is tmdsenc:hdmitmds[1].enc|Add2~0 at LCCOMB_X30_Y12_N8
C2L1 = dummydata[14] $ (dummydata[16] $ (dummydata[13] $ (!dummydata[15])));


--C2L5 is tmdsenc:hdmitmds[1].enc|Add4~3 at LCCOMB_X30_Y12_N4
C2L5 = dummydata[9] $ (!dummydata[10]);


--C2L12 is tmdsenc:hdmitmds[1].enc|Add6~0 at LCCOMB_X30_Y12_N28
C2L12 = (C2L1 & (dummydata[12] $ (dummydata[11] $ (C2L5))));


--C2L2 is tmdsenc:hdmitmds[1].enc|Add2~1 at LCCOMB_X30_Y12_N30
C2L2 = (dummydata[13] & ((dummydata[15] & (!dummydata[14] & dummydata[16])) # (!dummydata[15] & ((dummydata[16]) # (!dummydata[14]))))) # (!dummydata[13] & ((dummydata[15] & ((dummydata[16]) # (!dummydata[14]))) # (!dummydata[15] & ((dummydata[14]) # (!dummydata[16])))));


--C2L11 is tmdsenc:hdmitmds[1].enc|Add5~1 at LCCOMB_X30_Y12_N14
C2L11 = (!dummydata[11] & (!dummydata[9] & (!dummydata[12] & dummydata[10])));


--C2L3 is tmdsenc:hdmitmds[1].enc|Add2~2 at LCCOMB_X30_Y12_N0
C2L3 = (!dummydata[14] & (!dummydata[13] & (!dummydata[15] & dummydata[16])));


--C2L13 is tmdsenc:hdmitmds[1].enc|Add6~1 at LCCOMB_X30_Y12_N6
C2L13 = C2L11 $ (C2L3);


--C2L14 is tmdsenc:hdmitmds[1].enc|Add6~2 at LCCOMB_X30_Y12_N16
C2L14 = C2L13 $ (((C2L12 & ((C2L2) # (C2L10))) # (!C2L12 & (C2L2 & C2L10))));


--C2L15 is tmdsenc:hdmitmds[1].enc|Add6~3 at LCCOMB_X30_Y12_N10
C2L15 = dummydata[12] $ (dummydata[11] $ (C2L5 $ (C2L1)));


--C2L16 is tmdsenc:hdmitmds[1].enc|Add6~4 at LCCOMB_X30_Y12_N20
C2L16 = C2L2 $ (C2L10 $ (C2L12));


--C2L30 is tmdsenc:hdmitmds[1].enc|always1~0 at LCCOMB_X32_Y12_N18
C2L30 = (C2L29) # ((!C2L16 & (C2L14 & !C2L15)));


--C2L46 is tmdsenc:hdmitmds[1].enc|dx[8]~0 at LCCOMB_X31_Y12_N20
C2L46 = (C2L14 & ((C2L16) # ((dummydata[9]) # (C2L15)))) # (!C2L14 & (dummydata[9] & ((!C2L15) # (!C2L16))));


--C2L6 is tmdsenc:hdmitmds[1].enc|Add4~4 at LCCOMB_X32_Y12_N4
C2L6 = C2L14 $ (C2_disparity[3]);


--C2L62 is tmdsenc:hdmitmds[1].enc|qreg~0 at LCCOMB_X32_Y12_N0
C2L62 = (C2L4 $ (((C2L30) # (C2L9)))) # (!C1_denreg);


--K1_tx_reg[15] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15] at FF_X35_Y12_N27
--register power-up is low

K1_tx_reg[15] = DFFEAS(K1L131, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[3] at FF_X35_Y12_N17
--register power-up is low

R3_shift_reg[3] = DFFEAS(R3L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~2 at LCCOMB_X35_Y12_N28
R3L9 = (K1_dffe11 & (K1_tx_reg[15])) # (!K1_dffe11 & ((R3_shift_reg[3])));


--C2L63 is tmdsenc:hdmitmds[1].enc|qreg~1 at LCCOMB_X31_Y12_N4
C2L63 = dummydata[9] $ (((C2L30 & ((C2L46))) # (!C2L30 & (!C2L6))));


--K1_tx_reg[24] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24] at FF_X35_Y12_N3
--register power-up is low

K1_tx_reg[24] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C1_qreg[1],  ,  , VCC);


--R6_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[3] at FF_X35_Y12_N25
--register power-up is low

R6_shift_reg[3] = DFFEAS(R6L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~2 at LCCOMB_X35_Y12_N12
R6L9 = (K1_dffe11 & (K1_tx_reg[24])) # (!K1_dffe11 & ((R6_shift_reg[3])));


--C3L62 is tmdsenc:hdmitmds[2].enc|qreg~2 at LCCOMB_X31_Y11_N10
C3L62 = dummydata[17] $ (((C3L28 & ((!C3L44))) # (!C3L28 & (C3L7))));


--K1_tx_reg[25] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25] at FF_X35_Y11_N23
--register power-up is low

K1_tx_reg[25] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C2_qreg[1],  ,  , VCC);


--R5_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[3] at FF_X35_Y11_N9
--register power-up is low

R5_shift_reg[3] = DFFEAS(R5L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~2 at LCCOMB_X35_Y11_N12
R5L9 = (K1_dffe11 & (K1_tx_reg[25])) # (!K1_dffe11 & ((R5_shift_reg[3])));


--K1_dffe16a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[2] at FF_X36_Y14_N31
--register power-up is low

K1_dffe16a[2] = DFFEAS(K1L62, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--M1_counter_reg_bit[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[0] at FF_X36_Y15_N25
--register power-up is low

M1_counter_reg_bit[0] = DFFEAS(M1L9, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--K1_dffe16a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[0] at FF_X36_Y14_N25
--register power-up is low

K1_dffe16a[0] = DFFEAS(K1L58, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--M1_counter_reg_bit[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[2] at FF_X36_Y15_N23
--register power-up is low

M1_counter_reg_bit[2] = DFFEAS(M1L10, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--K1_dffe16a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[1] at FF_X36_Y14_N11
--register power-up is low

K1_dffe16a[1] = DFFEAS(K1L60, GLOBAL(K1L73),  ,  , K1_sync_dffe12a,  ,  ,  ,  );


--M1_counter_reg_bit[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[1] at FF_X36_Y15_N1
--register power-up is low

M1_counter_reg_bit[1] = DFFEAS(M1L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[3] at FF_X39_Y14_N29
--register power-up is low

P2_shift_reg[3] = DFFEAS(P2L12, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~2 at LCCOMB_X39_Y14_N8
P2L11 = (!K1_dffe22 & P2_shift_reg[3]);


--P1_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[3] at FF_X39_Y14_N7
--register power-up is low

P1_shift_reg[3] = DFFEAS(P1L12, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~2 at LCCOMB_X39_Y14_N10
P1L11 = (P1_shift_reg[3]) # (K1_dffe22);


--G1_dram_q[8] is sdram:sdram|dram_q[8] at FF_X5_Y29_N3
--register power-up is low

G1_dram_q[8] = DFFEAS(A1L561, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[0] is sdram:sdram|dram_q[0] at FF_X32_Y29_N24
--register power-up is low

G1_dram_q[0] = DFFEAS(A1L537, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L299 is sdram:sdram|rd0~0 at LCCOMB_X11_Y25_N28
G1L299 = (G1_be_q[1] & (G1_dram_q[8])) # (!G1_be_q[1] & ((G1_dram_q[0])));


--G1L290 is sdram:sdram|rd0[0]~1 at LCCOMB_X12_Y25_N24
G1L290 = (G1_state.st_rd & (rst_n & G1_rack0));


--G1L291 is sdram:sdram|rd0[0]~2 at LCCOMB_X11_Y25_N4
G1L291 = (G1L290 & (!G1L5 & ((G1_be_q[1]) # (G1_be_q[0]))));


--G1L343 is sdram:sdram|rvalid0~0 at LCCOMB_X12_Y25_N6
G1L343 = (G1_rvalid0 & ((G1_state.st_rd) # (!G1L65)));


--G1L344 is sdram:sdram|rvalid0~1 at LCCOMB_X12_Y25_N20
G1L344 = (G1_state.st_rd & (G1_rack0 & !G1L5));


--G1L345 is sdram:sdram|rvalid0~2 at LCCOMB_X12_Y25_N18
G1L345 = (G1L344 & (((!G1_be_q[2] & !G1_be_q[3])))) # (!G1L344 & (G1L343));


--G1_dram_q[9] is sdram:sdram|dram_q[9] at FF_X7_Y29_N10
--register power-up is low

G1_dram_q[9] = DFFEAS(A1L564, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[1] is sdram:sdram|dram_q[1] at FF_X32_Y29_N3
--register power-up is low

G1_dram_q[1] = DFFEAS(A1L540, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L300 is sdram:sdram|rd0~3 at LCCOMB_X11_Y25_N6
G1L300 = (G1_be_q[1] & ((G1_dram_q[9]))) # (!G1_be_q[1] & (G1_dram_q[1]));


--G1_dram_q[10] is sdram:sdram|dram_q[10] at FF_X5_Y29_N17
--register power-up is low

G1_dram_q[10] = DFFEAS(A1L567, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[2] is sdram:sdram|dram_q[2] at FF_X39_Y29_N31
--register power-up is low

G1_dram_q[2] = DFFEAS(A1L543, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L301 is sdram:sdram|rd0~4 at LCCOMB_X11_Y25_N0
G1L301 = (G1_be_q[1] & (G1_dram_q[10])) # (!G1_be_q[1] & ((G1_dram_q[2])));


--G1_dram_q[11] is sdram:sdram|dram_q[11] at FF_X3_Y29_N3
--register power-up is low

G1_dram_q[11] = DFFEAS(A1L570, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[3] is sdram:sdram|dram_q[3] at FF_X37_Y29_N17
--register power-up is low

G1_dram_q[3] = DFFEAS(A1L546, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L302 is sdram:sdram|rd0~5 at LCCOMB_X11_Y25_N2
G1L302 = (G1_be_q[1] & (G1_dram_q[11])) # (!G1_be_q[1] & ((G1_dram_q[3])));


--G1_dram_q[12] is sdram:sdram|dram_q[12] at FF_X7_Y29_N31
--register power-up is low

G1_dram_q[12] = DFFEAS(A1L573, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[4] is sdram:sdram|dram_q[4] at FF_X30_Y29_N24
--register power-up is low

G1_dram_q[4] = DFFEAS(A1L549, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L303 is sdram:sdram|rd0~6 at LCCOMB_X11_Y25_N12
G1L303 = (G1_be_q[1] & (G1_dram_q[12])) # (!G1_be_q[1] & ((G1_dram_q[4])));


--G1_dram_q[13] is sdram:sdram|dram_q[13] at FF_X5_Y29_N24
--register power-up is low

G1_dram_q[13] = DFFEAS(A1L576, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[5] is sdram:sdram|dram_q[5] at FF_X30_Y29_N17
--register power-up is low

G1_dram_q[5] = DFFEAS(A1L552, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L304 is sdram:sdram|rd0~7 at LCCOMB_X11_Y25_N10
G1L304 = (G1_be_q[1] & (G1_dram_q[13])) # (!G1_be_q[1] & ((G1_dram_q[5])));


--G1_dram_q[14] is sdram:sdram|dram_q[14] at FF_X11_Y29_N31
--register power-up is low

G1_dram_q[14] = DFFEAS(A1L579, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[6] is sdram:sdram|dram_q[6] at FF_X26_Y29_N31
--register power-up is low

G1_dram_q[6] = DFFEAS(A1L555, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L305 is sdram:sdram|rd0~8 at LCCOMB_X11_Y25_N16
G1L305 = (G1_be_q[1] & ((G1_dram_q[14]))) # (!G1_be_q[1] & (G1_dram_q[6]));


--G1_dram_q[15] is sdram:sdram|dram_q[15] at FF_X3_Y29_N24
--register power-up is low

G1_dram_q[15] = DFFEAS(A1L582, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1_dram_q[7] is sdram:sdram|dram_q[7] at FF_X26_Y29_N24
--register power-up is low

G1_dram_q[7] = DFFEAS(A1L558, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--G1L306 is sdram:sdram|rd0~9 at LCCOMB_X11_Y25_N30
G1L306 = (G1_be_q[1] & (G1_dram_q[15])) # (!G1_be_q[1] & ((G1_dram_q[7])));


--G1L370 is sdram:sdram|wdata_q[0]~0 at LCCOMB_X12_Y25_N22
G1L370 = (G1_state.st_wr & (((G1_wdata_q[0])))) # (!G1_state.st_wr & ((G1L63 & ((A1L69))) # (!G1L63 & (G1_wdata_q[0]))));


--C3L26 is tmdsenc:hdmitmds[2].enc|Add12~0 at LCCOMB_X32_Y11_N30
C3L26 = ((C3L15) # ((C3L14 & C3L16))) # (!dummydata[17]);


--C3L17 is tmdsenc:hdmitmds[2].enc|Add8~4 at LCCOMB_X31_Y11_N30
C3L17 = (C3L28 & (C3L14 $ ((C3L44)))) # (!C3L28 & (((C3L24))));


--C3L18 is tmdsenc:hdmitmds[2].enc|Add8~5 at LCCOMB_X31_Y11_N20
C3L18 = (C3L27) # ((!C3L15 & !C3L16));


--C3L19 is tmdsenc:hdmitmds[2].enc|Add8~6 at LCCOMB_X32_Y11_N8
C3L19 = (!C3L28 & (!C3L7 & ((!C3L16) # (!C3L26))));


--C3L20 is tmdsenc:hdmitmds[2].enc|Add8~7 at LCCOMB_X31_Y11_N18
C3L20 = C3L14 $ (((C3L19) # ((C3L44 & C3L18))));


--C3L21 is tmdsenc:hdmitmds[2].enc|Add8~8 at LCCOMB_X31_Y11_N16
C3L21 = (C3L28) # ((!C3L15 & (C3_disparity[3] $ (C3L14))));


--C3L22 is tmdsenc:hdmitmds[2].enc|Add8~9 at LCCOMB_X31_Y11_N22
C3L22 = C3L16 $ (((C3L44 & ((!C3L21))) # (!C3L44 & ((C3L15) # (C3L21)))));


--C3L23 is tmdsenc:hdmitmds[2].enc|Add8~10 at LCCOMB_X31_Y11_N12
C3L23 = (C3L15 & ((C3L14) # ((!dummydata[17] & !C3L16)))) # (!C3L15 & (dummydata[17] & ((!C3L14) # (!C3L16))));


--C1L64 is tmdsenc:hdmitmds[0].enc|qreg~2 at LCCOMB_X32_Y14_N12
C1L64 = C1L6 $ (((!C1L28 & (C1L7 $ (!C1L46)))));


--C1L65 is tmdsenc:hdmitmds[0].enc|qreg~3 at LCCOMB_X32_Y14_N14
C1L65 = (C1L64 $ (dummydata[8])) # (!C1_denreg);


--C2_qreg[8] is tmdsenc:hdmitmds[1].enc|qreg[8] at FF_X32_Y12_N31
--register power-up is low

C2_qreg[8] = DFFEAS(C2L67, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2] at FF_X36_Y11_N7
--register power-up is low

K1_tx_reg[2] = DFFEAS(K1L108, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[4] at FF_X36_Y11_N5
--register power-up is low

R2_shift_reg[4] = DFFEAS(R2L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~3 at LCCOMB_X36_Y11_N22
R2L10 = (K1_dffe11 & (K1_tx_reg[2])) # (!K1_dffe11 & ((R2_shift_reg[4])));


--M2L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|cout_actual~0 at LCCOMB_X36_Y15_N28
M2L12 = (!M2_counter_reg_bit[0] & (!M2_counter_reg_bit[1] & (K1_sync_dffe12a & M2_counter_reg_bit[2])));


--M2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~0 at LCCOMB_X36_Y15_N26
M2L9 = (M2_wire_counter_comb_bita_0combout[0] & (!M2L25 & !M2L12));


--M2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~1 at LCCOMB_X36_Y15_N20
M2L10 = (M2L25 & (!K1_sync_dffe12a)) # (!M2L25 & (((!M2L12 & M2_wire_counter_comb_bita_2combout[0]))));


--M2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~2 at LCCOMB_X36_Y15_N30
M2L11 = (!M2L12 & (!M2L25 & M2_wire_counter_comb_bita_1combout[0]));


--C1L17 is tmdsenc:hdmitmds[0].enc|Add8~6 at LCCOMB_X31_Y14_N24
C1L17 = (!C1L14 & (C1L16 & ((C1L15) # (dummydata[1]))));


--C1L18 is tmdsenc:hdmitmds[0].enc|Add8~7 at LCCOMB_X31_Y14_N26
C1L18 = ((C1L17 & !C1L27)) # (!C1L24);


--C1L19 is tmdsenc:hdmitmds[0].enc|Add8~8 at LCCOMB_X31_Y14_N16
C1L19 = (C1L15 & (C1L16)) # (!C1L15 & ((dummydata[1])));


--C1L20 is tmdsenc:hdmitmds[0].enc|Add8~9 at LCCOMB_X31_Y14_N18
C1L20 = C1L14 $ (((C1L28 & ((C1L46))) # (!C1L28 & (!C1L25))));


--C1L21 is tmdsenc:hdmitmds[0].enc|Add8~10 at LCCOMB_X31_Y14_N20
C1L21 = (C1L28) # ((!C1L15 & (C1_disparity[3] $ (C1L14))));


--C1L22 is tmdsenc:hdmitmds[0].enc|Add8~11 at LCCOMB_X31_Y14_N22
C1L22 = C1L16 $ (((C1L46 & ((!C1L21))) # (!C1L46 & ((C1L15) # (C1L21)))));


--C1L23 is tmdsenc:hdmitmds[0].enc|Add8~12 at LCCOMB_X31_Y14_N12
C1L23 = (C1L15 & ((C1L14) # ((!C1L16 & dummydata[1])))) # (!C1L15 & (!dummydata[1] & ((!C1L16) # (!C1L14))));


--C2L7 is tmdsenc:hdmitmds[1].enc|Add4~5 at LCCOMB_X30_Y12_N24
C2L7 = dummydata[14] $ (dummydata[13] $ (C2L4 $ (!dummydata[15])));


--C2L64 is tmdsenc:hdmitmds[1].enc|qreg~2 at LCCOMB_X32_Y12_N24
C2L64 = C2L7 $ (((!C2L30 & (C2L46 $ (!C2L6)))));


--C2L65 is tmdsenc:hdmitmds[1].enc|qreg~3 at LCCOMB_X33_Y12_N10
C2L65 = (C2L64 $ (!dummydata[16])) # (!C1_denreg);


--C3_qreg[8] is tmdsenc:hdmitmds[2].enc|qreg[8] at FF_X32_Y11_N23
--register power-up is low

C3_qreg[8] = DFFEAS(C3L65, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3] at FF_X36_Y12_N23
--register power-up is low

K1_tx_reg[3] = DFFEAS( , GLOBAL(K1L101), U1_wire_pll1_locked,  ,  , C1_qreg[8],  ,  , VCC);


--R1_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[4] at FF_X36_Y12_N5
--register power-up is low

R1_shift_reg[4] = DFFEAS(R1L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~3 at LCCOMB_X36_Y12_N16
R1L10 = (K1_dffe11 & (K1_tx_reg[3])) # (!K1_dffe11 & ((R1_shift_reg[4])));


--C2L47 is tmdsenc:hdmitmds[1].enc|dx~1 at LCCOMB_X32_Y10_N0
C2L47 = dummydata[13] $ (!C2L4);


--C2L66 is tmdsenc:hdmitmds[1].enc|qreg~4 at LCCOMB_X32_Y12_N14
C2L66 = C2L47 $ (((C2L30 & (!C2L46)) # (!C2L30 & ((C2L6)))));


--C3_qreg[5] is tmdsenc:hdmitmds[2].enc|qreg[5] at FF_X32_Y11_N17
--register power-up is low

C3_qreg[5] = DFFEAS(C3L67, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[12] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12] at FF_X36_Y12_N11
--register power-up is low

K1_tx_reg[12] = DFFEAS(K1L125, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[4] at FF_X36_Y12_N1
--register power-up is low

R4_shift_reg[4] = DFFEAS(R4L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~3 at LCCOMB_X36_Y12_N8
R4L10 = (K1_dffe11 & (K1_tx_reg[12])) # (!K1_dffe11 & ((R4_shift_reg[4])));


--C2L17 is tmdsenc:hdmitmds[1].enc|Add8~4 at LCCOMB_X32_Y12_N16
C2L17 = (C2L30 & (C2L46 $ (C2L14)));


--C2L18 is tmdsenc:hdmitmds[1].enc|Add8~5 at LCCOMB_X32_Y12_N22
C2L18 = (C2L16 & (!C2L14 & !C2L29));


--C2L19 is tmdsenc:hdmitmds[1].enc|Add8~6 at LCCOMB_X32_Y12_N20
C2L19 = (C2L17) # ((C2L18 & ((C2L15) # (C2L46))));


--C2L20 is tmdsenc:hdmitmds[1].enc|Add8~7 at LCCOMB_X31_Y12_N26
C2L20 = (C2L16) # (((C2L15) # (!dummydata[9])) # (!C2L14));


--C2L21 is tmdsenc:hdmitmds[1].enc|Add8~8 at LCCOMB_X31_Y12_N16
C2L21 = (C2L19) # ((!C2L30 & (C2L20 & C2L6)));


--C2L22 is tmdsenc:hdmitmds[1].enc|Add8~9 at LCCOMB_X31_Y12_N18
C2L22 = (C2L15 & (C2L16)) # (!C2L15 & ((dummydata[9])));


--C2L23 is tmdsenc:hdmitmds[1].enc|Add8~10 at LCCOMB_X31_Y12_N0
C2L23 = C2L14 $ (((C2L30 & ((C2L46))) # (!C2L30 & (!C2L27))));


--C2L24 is tmdsenc:hdmitmds[1].enc|Add8~11 at LCCOMB_X32_Y12_N10
C2L24 = (C2L30) # ((!C2L15 & (C2_disparity[3] $ (C2L14))));


--C2L25 is tmdsenc:hdmitmds[1].enc|Add8~12 at LCCOMB_X31_Y12_N2
C2L25 = C2L16 $ (((C2L46 & (!C2L24)) # (!C2L46 & ((C2L24) # (C2L15)))));


--C2L26 is tmdsenc:hdmitmds[1].enc|Add8~13 at LCCOMB_X31_Y12_N24
C2L26 = (C2L15 & ((C2L14) # ((!C2L16 & dummydata[9])))) # (!C2L15 & (!dummydata[9] & ((!C2L16) # (!C2L14))));


--C3L45 is tmdsenc:hdmitmds[2].enc|dx~1 at LCCOMB_X33_Y11_N14
C3L45 = dummydata[21] $ (C3L4);


--C3L63 is tmdsenc:hdmitmds[2].enc|qreg~3 at LCCOMB_X32_Y11_N14
C3L63 = C3L45 $ (((C3L28 & ((!C3L44))) # (!C3L28 & (C3L7))));


--K1_tx_reg[13] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13] at FF_X35_Y12_N19
--register power-up is low

K1_tx_reg[13] = DFFEAS(K1L127, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[4] at FF_X35_Y12_N9
--register power-up is low

R3_shift_reg[4] = DFFEAS(R3L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~3 at LCCOMB_X35_Y12_N16
R3L10 = (K1_dffe11 & (K1_tx_reg[13])) # (!K1_dffe11 & ((R3_shift_reg[4])));


--C3L64 is tmdsenc:hdmitmds[2].enc|qreg~4 at LCCOMB_X32_Y11_N28
C3L64 = C3L6 $ (((!C3L28 & (C3L44 $ (!C3L7)))));


--K1_tx_reg[22] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22] at FF_X35_Y12_N31
--register power-up is low

K1_tx_reg[22] = DFFEAS(K1L145, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[4] at FF_X35_Y12_N5
--register power-up is low

R6_shift_reg[4] = DFFEAS(R6L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~3 at LCCOMB_X35_Y12_N24
R6L10 = (K1_dffe11 & (K1_tx_reg[22])) # (!K1_dffe11 & ((R6_shift_reg[4])));


--C1L66 is tmdsenc:hdmitmds[0].enc|qreg~4 at LCCOMB_X32_Y14_N8
C1L66 = dummydata[1] $ (((C1L28 & (C1L46)) # (!C1L28 & ((!C1L7)))));


--K1_tx_reg[23] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23] at FF_X35_Y11_N3
--register power-up is low

K1_tx_reg[23] = DFFEAS(K1L147, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[4] at FF_X35_Y11_N21
--register power-up is low

R5_shift_reg[4] = DFFEAS(R5L11, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~3 at LCCOMB_X35_Y11_N8
R5L10 = (K1_dffe11 & (K1_tx_reg[23])) # (!K1_dffe11 & ((R5_shift_reg[4])));


--M1L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|cout_actual~0 at LCCOMB_X36_Y15_N18
M1L12 = (M1_counter_reg_bit[2] & (!M1_counter_reg_bit[1] & (!M1_counter_reg_bit[0] & K1_sync_dffe12a)));


--M1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~0 at LCCOMB_X36_Y15_N24
M1L9 = (M1_wire_counter_comb_bita_0combout[0] & (!M1L12 & !M1L25));


--M1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~1 at LCCOMB_X36_Y15_N22
M1L10 = (M1L25 & (!K1_sync_dffe12a)) # (!M1L25 & (((!M1L12 & M1_wire_counter_comb_bita_2combout[0]))));


--M1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~2 at LCCOMB_X36_Y15_N0
M1L11 = (M1_wire_counter_comb_bita_1combout[0] & (!M1L12 & !M1L25));


--P2_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[4] at FF_X39_Y14_N5
--register power-up is low

P2_shift_reg[4] = DFFEAS(P2L13, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~3 at LCCOMB_X39_Y14_N28
P2L12 = (P2_shift_reg[4] & !K1_dffe22);


--P1_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[4] at FF_X39_Y14_N15
--register power-up is low

P1_shift_reg[4] = DFFEAS(P1L13, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~3 at LCCOMB_X39_Y14_N6
P1L12 = (P1_shift_reg[4] & !K1_dffe22);


--C2L67 is tmdsenc:hdmitmds[1].enc|qreg~5 at LCCOMB_X32_Y12_N30
C2L67 = (C2L46) # (!C1_denreg);


--C3_qreg[9] is tmdsenc:hdmitmds[2].enc|qreg[9] at FF_X32_Y11_N5
--register power-up is low

C3_qreg[9] = DFFEAS(C3L68, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0] at FF_X36_Y11_N15
--register power-up is low

K1_tx_reg[0] = DFFEAS(K1L104, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~4 at LCCOMB_X36_Y11_N4
R2L11 = (K1_tx_reg[0] & K1_dffe11);


--C3L65 is tmdsenc:hdmitmds[2].enc|qreg~5 at LCCOMB_X32_Y11_N22
C3L65 = (C3L44) # (!C1_denreg);


--C1_qreg[8] is tmdsenc:hdmitmds[0].enc|qreg[8] at FF_X32_Y14_N19
--register power-up is low

C1_qreg[8] = DFFEAS(C1L69, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1] at FF_X36_Y12_N7
--register power-up is low

K1_tx_reg[1] = DFFEAS(K1L106, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~4 at LCCOMB_X36_Y12_N4
R1L11 = (K1_tx_reg[1] & K1_dffe11);


--C3L66 is tmdsenc:hdmitmds[2].enc|qreg~6 at LCCOMB_X33_Y11_N28
C3L66 = dummydata[22] $ (dummydata[21] $ (!C3L4));


--C3L67 is tmdsenc:hdmitmds[2].enc|qreg~7 at LCCOMB_X32_Y11_N16
C3L67 = (C3L66 $ (((C3L28) # (C3L9)))) # (!C1_denreg);


--C1_qreg[5] is tmdsenc:hdmitmds[0].enc|qreg[5] at FF_X32_Y14_N1
--register power-up is low

C1_qreg[5] = DFFEAS(C1L71, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[10] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10] at FF_X36_Y12_N25
--register power-up is low

K1_tx_reg[10] = DFFEAS(K1L121, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R4L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~4 at LCCOMB_X36_Y12_N0
R4L11 = (K1_tx_reg[10] & K1_dffe11);


--C1L47 is tmdsenc:hdmitmds[0].enc|dx~1 at LCCOMB_X32_Y14_N26
C1L47 = C1L5 $ (dummydata[5]);


--C1L67 is tmdsenc:hdmitmds[0].enc|qreg~5 at LCCOMB_X32_Y14_N4
C1L67 = C1L47 $ (((C1L28 & (!C1L46)) # (!C1L28 & ((C1L7)))));


--C2_qreg[5] is tmdsenc:hdmitmds[1].enc|qreg[5] at FF_X32_Y12_N9
--register power-up is low

C2_qreg[5] = DFFEAS(C2L70, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--K1_tx_reg[11] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11] at FF_X35_Y12_N11
--register power-up is low

K1_tx_reg[11] = DFFEAS(K1L123, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R3L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~4 at LCCOMB_X35_Y12_N8
R3L11 = (K1_tx_reg[11] & K1_dffe11);


--C1L68 is tmdsenc:hdmitmds[0].enc|qreg~6 at LCCOMB_X32_Y14_N22
C1L68 = C1L4 $ (((!C1L28 & (C1L7 $ (!C1L46)))));


--K1_tx_reg[20] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20] at FF_X35_Y11_N11
--register power-up is low

K1_tx_reg[20] = DFFEAS(K1L141, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R6L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~4 at LCCOMB_X35_Y12_N4
R6L11 = (K1_tx_reg[20] & K1_dffe11);


--C2L68 is tmdsenc:hdmitmds[1].enc|qreg~6 at LCCOMB_X31_Y12_N30
C2L68 = C2L5 $ (((!C2L30 & (C2L6 $ (!C2L46)))));


--K1_tx_reg[21] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21] at FF_X35_Y11_N17
--register power-up is low

K1_tx_reg[21] = DFFEAS(K1L143, GLOBAL(K1L101), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--R5L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~4 at LCCOMB_X35_Y11_N20
R5L11 = (K1_tx_reg[21] & K1_dffe11);


--P1_shift_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[6] at FF_X39_Y14_N13
--register power-up is low

P1_shift_reg[6] = DFFEAS(P1L14, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P2L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~4 at LCCOMB_X39_Y14_N4
P2L13 = (P1_shift_reg[6] & !K1_dffe22);


--P1_shift_reg[5] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[5] at FF_X39_Y14_N23
--register power-up is low

P1_shift_reg[5] = DFFEAS(P1L15, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~4 at LCCOMB_X39_Y14_N14
P1L13 = (P1_shift_reg[5] & !K1_dffe22);


--C3L68 is tmdsenc:hdmitmds[2].enc|qreg~8 at LCCOMB_X32_Y11_N4
C3L68 = (C1_denreg & ((C3L28 & (C3L44)) # (!C3L28 & ((!C3L7)))));


--C1_qreg[9] is tmdsenc:hdmitmds[0].enc|qreg[9] at FF_X32_Y14_N7
--register power-up is low

C1_qreg[9] = DFFEAS(C1L72, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--C1L69 is tmdsenc:hdmitmds[0].enc|qreg~7 at LCCOMB_X32_Y14_N18
C1L69 = (C1L46) # (!C1_denreg);


--C2_qreg[9] is tmdsenc:hdmitmds[1].enc|qreg[9] at FF_X32_Y12_N7
--register power-up is low

C2_qreg[9] = DFFEAS(C2L72, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--C1L70 is tmdsenc:hdmitmds[0].enc|qreg~8 at LCCOMB_X31_Y13_N6
C1L70 = dummydata[6] $ (dummydata[5] $ (C1L5));


--C1L71 is tmdsenc:hdmitmds[0].enc|qreg~9 at LCCOMB_X32_Y14_N0
C1L71 = (C1L70 $ (((C1L28) # (C1L9)))) # (!C1_denreg);


--C2L69 is tmdsenc:hdmitmds[1].enc|qreg~7 at LCCOMB_X32_Y10_N2
C2L69 = C2L4 $ (dummydata[13] $ (dummydata[14]));


--C2L70 is tmdsenc:hdmitmds[1].enc|qreg~8 at LCCOMB_X32_Y12_N8
C2L70 = (C2L69 $ (((C2L9) # (C2L30)))) # (!C1_denreg);


--C2L8 is tmdsenc:hdmitmds[1].enc|Add4~6 at LCCOMB_X30_Y12_N18
C2L8 = dummydata[9] $ (dummydata[11] $ (dummydata[10]));


--C2L71 is tmdsenc:hdmitmds[1].enc|qreg~9 at LCCOMB_X32_Y12_N28
C2L71 = C2L8 $ (((C2L30 & (!C2L46)) # (!C2L30 & ((C2L6)))));


--C3_qreg[3] is tmdsenc:hdmitmds[2].enc|qreg[3] at FF_X32_Y11_N11
--register power-up is low

C3_qreg[3] = DFFEAS(C3L71, GLOBAL(U1L27), vid_rst_n,  ,  ,  ,  ,  ,  );


--C3L8 is tmdsenc:hdmitmds[2].enc|Add4~6 at LCCOMB_X33_Y14_N22
C3L8 = dummydata[17] $ (dummydata[18] $ (!dummydata[19]));


--C3L69 is tmdsenc:hdmitmds[2].enc|qreg~9 at LCCOMB_X32_Y11_N0
C3L69 = C3L8 $ (((C3L28 & ((!C3L44))) # (!C3L28 & (C3L7))));


--P2_shift_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6] at FF_X39_Y14_N17
--register power-up is low

P2_shift_reg[6] = DFFEAS(P2L8, GLOBAL(K1L73), U1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--P1L14 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~5 at LCCOMB_X39_Y14_N12
P1L14 = (P2_shift_reg[6]) # (K1_dffe22);


--P1L15 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~6 at LCCOMB_X39_Y14_N22
P1L15 = (P1_shift_reg[6]) # (K1_dffe22);


--C1L72 is tmdsenc:hdmitmds[0].enc|qreg~10 at LCCOMB_X32_Y14_N6
C1L72 = (C1_denreg & ((C1L28 & (C1L46)) # (!C1L28 & ((!C1L7)))));


--C2L72 is tmdsenc:hdmitmds[1].enc|qreg~10 at LCCOMB_X32_Y12_N6
C2L72 = (C1_denreg & ((C2L30 & ((C2L46))) # (!C2L30 & (!C2L6))));


--C2L73 is tmdsenc:hdmitmds[1].enc|qreg~11 at LCCOMB_X32_Y12_N2
C2L73 = C2L7 $ (((C2L30 & (!C2L46)) # (!C2L30 & ((C2L6)))));


--C3L70 is tmdsenc:hdmitmds[2].enc|qreg~10 at LCCOMB_X32_Y11_N26
C3L70 = C3L5 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--C3L71 is tmdsenc:hdmitmds[2].enc|qreg~11 at LCCOMB_X32_Y11_N10
C3L71 = (C3L4 $ (((C3L28) # (C3L9)))) # (!C1_denreg);


--C1L8 is tmdsenc:hdmitmds[0].enc|Add4~6 at LCCOMB_X32_Y13_N14
C1L8 = dummydata[3] $ (dummydata[1] $ (dummydata[2]));


--C1L73 is tmdsenc:hdmitmds[0].enc|qreg~11 at LCCOMB_X32_Y14_N24
C1L73 = C1L8 $ (((C1L28 & (!C1L46)) # (!C1L28 & ((C1L7)))));


--G1L26 is sdram:sdram|Selector71~5 at LCCOMB_X17_Y25_N8
G1L26 = (((!G1_state.st_reset & G1_init_ctr[15])) # (!G1L24)) # (!G1L25);


--G1L286 is sdram:sdram|op_cycle~8 at LCCOMB_X15_Y25_N26
G1L286 = (G1_state.st_reset & (!G1_state.st_idle & (G1L11 $ (!G1_op_cycle[2]))));


--C1L9 is tmdsenc:hdmitmds[0].enc|Add4~7 at LCCOMB_X32_Y14_N10
C1L9 = C1L46 $ (C1L14 $ (C1_disparity[3]));


--C2L9 is tmdsenc:hdmitmds[1].enc|Add4~7 at LCCOMB_X32_Y12_N12
C2L9 = C2_disparity[3] $ (C2L14 $ (C2L46));


--C3L24 is tmdsenc:hdmitmds[2].enc|Add8~11 at LCCOMB_X32_Y11_N24
C3L24 = (C3L14 & (((!C3_disparity[3])))) # (!C3L14 & ((C3_disparity[3]) # ((C3L26 & C3L16))));


--C3L25 is tmdsenc:hdmitmds[2].enc|Add8~12 at LCCOMB_X31_Y11_N26
C3L25 = (C3L28 & (((!C3L44)))) # (!C3L28 & (C3L14 $ ((C3_disparity[3]))));


--C1L24 is tmdsenc:hdmitmds[0].enc|Add8~13 at LCCOMB_X32_Y14_N20
C1L24 = C1L14 $ (((C1L28 & (!C1L46)) # (!C1L28 & ((!C1_disparity[3])))));


--C1L25 is tmdsenc:hdmitmds[0].enc|Add8~14 at LCCOMB_X31_Y14_N30
C1L25 = (C1L19 & (C1L16)) # (!C1L19 & ((C1_disparity[3] & ((C1L16) # (!C1L14))) # (!C1_disparity[3] & ((C1L14)))));


--C1L26 is tmdsenc:hdmitmds[0].enc|Add8~15 at LCCOMB_X32_Y14_N2
C1L26 = (C1L28 & (!C1L46)) # (!C1L28 & ((C1L14 $ (C1_disparity[3]))));


--C2L27 is tmdsenc:hdmitmds[1].enc|Add8~14 at LCCOMB_X31_Y12_N22
C2L27 = (C2L22 & (((C2L16)))) # (!C2L22 & ((C2L14 & ((C2L16) # (!C2_disparity[3]))) # (!C2L14 & (C2_disparity[3]))));


--C2L28 is tmdsenc:hdmitmds[1].enc|Add8~15 at LCCOMB_X32_Y12_N26
C2L28 = (C2L30 & (((!C2L46)))) # (!C2L30 & (C2_disparity[3] $ (((C2L14)))));


--C3L9 is tmdsenc:hdmitmds[2].enc|Add4~7 at LCCOMB_X32_Y11_N2
C3L9 = C3_disparity[3] $ (C3L44 $ (C3L14));


--G1L234 is sdram:sdram|next_bank[0]~42 at LCCOMB_X16_Y24_N2
G1L234 = !G1_dram_ba[0];


--G1L309 is sdram:sdram|rfsh_ctr[0]~24 at LCCOMB_X16_Y26_N16
G1L309 = !G1_rfsh_ctr[0];


--G1L337 is sdram:sdram|rfsh_prio[0]~2 at LCCOMB_X14_Y25_N26
G1L337 = !G1_dram_cmd[4];


--A1L352 is led_ctr[0]~84 at LCCOMB_X35_Y2_N0
A1L352 = !led_ctr[0];


--A1L443 is rst_ctr[0]~0 at LCCOMB_X11_Y4_N30
A1L443 = !rst_ctr[0];


--K1L118 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]~0 at LCCOMB_X36_Y11_N16
K1L118 = !C3_qreg[7];


--K1L137 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]~1 at LCCOMB_X36_Y12_N12
K1L137 = !C1_qreg[3];


--K1L139 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]~2 at LCCOMB_X35_Y11_N28
K1L139 = !C2_qreg[3];


--K1L114 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]~3 at LCCOMB_X36_Y11_N24
K1L114 = !C1_qreg[7];


--K1L99 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a~0 at LCCOMB_X36_Y14_N8
K1L99 = !K1_sync_dffe12a;


--K1L116 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]~4 at LCCOMB_X36_Y11_N28
K1L116 = !C2_qreg[7];


--A1L221 is dummydata[22]~0 at LCCOMB_X33_Y11_N6
A1L221 = !dummydata[21];


--A1L216 is dummydata[19]~1 at LCCOMB_X33_Y14_N24
A1L216 = !dummydata[18];


--A1L218 is dummydata[20]~2 at LCCOMB_X33_Y11_N0
A1L218 = !dummydata[19];


--A1L194 is dummydata[3]~3 at LCCOMB_X31_Y13_N10
A1L194 = !dummydata[2];


--A1L199 is dummydata[7]~4 at LCCOMB_X31_Y13_N20
A1L199 = !dummydata[6];


--K1L129 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]~5 at LCCOMB_X36_Y12_N18
K1L129 = !C3_qreg[5];


--A1L205 is dummydata[11]~5 at LCCOMB_X30_Y12_N22
A1L205 = !dummydata[10];


--A1L203 is dummydata[10]~6 at LCCOMB_X30_Y12_N26
A1L203 = !dummydata[9];


--A1L211 is dummydata[16]~7 at LCCOMB_X33_Y12_N4
A1L211 = !dummydata[15];


--K1L108 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]~6 at LCCOMB_X36_Y11_N6
K1L108 = !C3_qreg[9];


--K1L125 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]~7 at LCCOMB_X36_Y12_N10
K1L125 = !C1_qreg[5];


--K1L127 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]~8 at LCCOMB_X35_Y12_N18
K1L127 = !C2_qreg[5];


--K1L104 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]~9 at LCCOMB_X36_Y11_N14
K1L104 = !C1_qreg[9];


--K1L106 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]~10 at LCCOMB_X36_Y12_N6
K1L106 = !C2_qreg[9];


--K1L141 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]~11 at LCCOMB_X35_Y11_N10
K1L141 = !C3_qreg[3];


--U1_remap_decoy_le3a_0 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_0 at LCCOMB_X40_Y28_N2
U1_remap_decoy_le3a_0 = LCELL(GND);


--U1_remap_decoy_le3a_1 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_1 at LCCOMB_X40_Y28_N28
U1_remap_decoy_le3a_1 = LCELL(GND);


--U1_remap_decoy_le3a_2 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_2 at LCCOMB_X40_Y28_N10
U1_remap_decoy_le3a_2 = LCELL(GND);


--A1L605 is ~GND at LCCOMB_X40_Y28_N4
A1L605 = GND;



--abc_clk is abc_clk at PIN_T8
abc_clk = INPUT();


--A1L95 is abc_d_oe~output at IOOBUF_X14_Y0_N2
A1L95 = OUTPUT_BUFFER.O(.I(!A1L176), , , , , , , , , , , , , , , , , );


--abc_d_oe is abc_d_oe at PIN_T5
abc_d_oe = OUTPUT();



--abc_rst_n is abc_rst_n at PIN_P2
abc_rst_n = INPUT();



--abc_cs_n is abc_cs_n at PIN_F2
abc_cs_n = INPUT();



--abc_inp_n[0] is abc_inp_n[0] at PIN_L2
abc_inp_n[0] = INPUT();



--abc_inp_n[1] is abc_inp_n[1] at PIN_M2
abc_inp_n[1] = INPUT();


--abc_rdy_x is abc_rdy_x at PIN_B4
abc_rdy_x = OUTPUT();


--abc_resin_x is abc_resin_x at PIN_R6
abc_resin_x = OUTPUT();


--abc_int80_x is abc_int80_x at PIN_B3
abc_int80_x = OUTPUT();


--abc_int800_x is abc_int800_x at PIN_A2
abc_int800_x = OUTPUT();


--abc_nmi_x is abc_nmi_x at PIN_A3
abc_nmi_x = OUTPUT();


--abc_xm_x is abc_xm_x at PIN_B1
abc_xm_x = OUTPUT();


--A1L126 is abc_master~output at IOOBUF_X26_Y0_N23
A1L126 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_master is abc_master at PIN_T10
abc_master = OUTPUT();


--A1L62 is abc_a_oe~output at IOOBUF_X0_Y25_N2
A1L62 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_a_oe is abc_a_oe at PIN_C2
abc_a_oe = OUTPUT();


--A1L93 is abc_d_ce_n~output at IOOBUF_X14_Y0_N9
A1L93 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_d_ce_n is abc_d_ce_n at PIN_R5
abc_d_ce_n = OUTPUT();



--exth_hc is exth_hc at PIN_T9
exth_hc = INPUT();



--exth_hh is exth_hh at PIN_R8
exth_hh = INPUT();


--A1L532 is sr_clk~output at IOOBUF_X1_Y29_N30
A1L532 = OUTPUT_BUFFER.O(.I(EB1_dataout[0]), , , , , , , , , , , , , , , , , );


--sr_clk is sr_clk at PIN_D3
sr_clk = OUTPUT();


--A1L530 is sr_cke~output at IOOBUF_X14_Y29_N30
A1L530 = OUTPUT_BUFFER.O(.I(G1_dram_cke), , , , , , , , , , , , , , , , , );


--sr_cke is sr_cke at PIN_F8
sr_cke = OUTPUT();


--A1L524 is sr_ba[0]~output at IOOBUF_X28_Y29_N9
A1L524 = OUTPUT_BUFFER.O(.I(G1_dram_ba[0]), , , , , , , , , , , , , , , , , );


--sr_ba[0] is sr_ba[0] at PIN_A13
sr_ba[0] = OUTPUT();


--A1L526 is sr_ba[1]~output at IOOBUF_X37_Y29_N23
A1L526 = OUTPUT_BUFFER.O(.I(G1_dram_ba[1]), , , , , , , , , , , , , , , , , );


--sr_ba[1] is sr_ba[1] at PIN_B13
sr_ba[1] = OUTPUT();


--A1L497 is sr_a[0]~output at IOOBUF_X35_Y29_N2
A1L497 = OUTPUT_BUFFER.O(.I(G1_dram_a[0]), , , , , , , , , , , , , , , , , );


--sr_a[0] is sr_a[0] at PIN_A14
sr_a[0] = OUTPUT();


--A1L499 is sr_a[1]~output at IOOBUF_X35_Y29_N9
A1L499 = OUTPUT_BUFFER.O(.I(G1_dram_a[1]), , , , , , , , , , , , , , , , , );


--sr_a[1] is sr_a[1] at PIN_B14
sr_a[1] = OUTPUT();


--A1L501 is sr_a[2]~output at IOOBUF_X39_Y29_N9
A1L501 = OUTPUT_BUFFER.O(.I(G1_dram_a[2]), , , , , , , , , , , , , , , , , );


--sr_a[2] is sr_a[2] at PIN_D14
sr_a[2] = OUTPUT();


--A1L503 is sr_a[3]~output at IOOBUF_X28_Y29_N16
A1L503 = OUTPUT_BUFFER.O(.I(G1_dram_a[3]), , , , , , , , , , , , , , , , , );


--sr_a[3] is sr_a[3] at PIN_A15
sr_a[3] = OUTPUT();


--A1L505 is sr_a[4]~output at IOOBUF_X23_Y29_N2
A1L505 = OUTPUT_BUFFER.O(.I(G1_dram_a[4]), , , , , , , , , , , , , , , , , );


--sr_a[4] is sr_a[4] at PIN_C9
sr_a[4] = OUTPUT();


--A1L507 is sr_a[5]~output at IOOBUF_X23_Y29_N9
A1L507 = OUTPUT_BUFFER.O(.I(G1_dram_a[5]), , , , , , , , , , , , , , , , , );


--sr_a[5] is sr_a[5] at PIN_D9
sr_a[5] = OUTPUT();


--A1L509 is sr_a[6]~output at IOOBUF_X14_Y29_N23
A1L509 = OUTPUT_BUFFER.O(.I(G1_dram_a[6]), , , , , , , , , , , , , , , , , );


--sr_a[6] is sr_a[6] at PIN_E8
sr_a[6] = OUTPUT();


--A1L511 is sr_a[7]~output at IOOBUF_X11_Y29_N2
A1L511 = OUTPUT_BUFFER.O(.I(G1_dram_a[7]), , , , , , , , , , , , , , , , , );


--sr_a[7] is sr_a[7] at PIN_A7
sr_a[7] = OUTPUT();


--A1L513 is sr_a[8]~output at IOOBUF_X11_Y29_N9
A1L513 = OUTPUT_BUFFER.O(.I(G1_dram_a[8]), , , , , , , , , , , , , , , , , );


--sr_a[8] is sr_a[8] at PIN_B7
sr_a[8] = OUTPUT();


--A1L515 is sr_a[9]~output at IOOBUF_X9_Y29_N2
A1L515 = OUTPUT_BUFFER.O(.I(G1_dram_a[9]), , , , , , , , , , , , , , , , , );


--sr_a[9] is sr_a[9] at PIN_A6
sr_a[9] = OUTPUT();


--A1L517 is sr_a[10]~output at IOOBUF_X39_Y29_N2
A1L517 = OUTPUT_BUFFER.O(.I(G1_dram_a[10]), , , , , , , , , , , , , , , , , );


--sr_a[10] is sr_a[10] at PIN_C14
sr_a[10] = OUTPUT();


--A1L519 is sr_a[11]~output at IOOBUF_X14_Y29_N2
A1L519 = OUTPUT_BUFFER.O(.I(G1_dram_a[11]), , , , , , , , , , , , , , , , , );


--sr_a[11] is sr_a[11] at PIN_C8
sr_a[11] = OUTPUT();


--A1L521 is sr_a[12]~output at IOOBUF_X9_Y29_N9
A1L521 = OUTPUT_BUFFER.O(.I(G1_dram_a[12]), , , , , , , , , , , , , , , , , );


--sr_a[12] is sr_a[12] at PIN_B6
sr_a[12] = OUTPUT();


--A1L586 is sr_dqm[0]~output at IOOBUF_X32_Y29_N9
A1L586 = OUTPUT_BUFFER.O(.I(G1_dram_dqm[0]), , , , , , , , , , , , , , , , , );


--sr_dqm[0] is sr_dqm[0] at PIN_E10
sr_dqm[0] = OUTPUT();


--A1L588 is sr_dqm[1]~output at IOOBUF_X14_Y29_N9
A1L588 = OUTPUT_BUFFER.O(.I(G1_dram_dqm[1]), , , , , , , , , , , , , , , , , );


--sr_dqm[1] is sr_dqm[1] at PIN_D8
sr_dqm[1] = OUTPUT();


--A1L534 is sr_cs_n~output at IOOBUF_X37_Y29_N2
A1L534 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[3]), , , , , , , , , , , , , , , , , );


--sr_cs_n is sr_cs_n at PIN_D12
sr_cs_n = OUTPUT();


--A1L592 is sr_we_n~output at IOOBUF_X26_Y29_N16
A1L592 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[0]), , , , , , , , , , , , , , , , , );


--sr_we_n is sr_we_n at PIN_F9
sr_we_n = OUTPUT();


--A1L528 is sr_cas_n~output at IOOBUF_X21_Y29_N9
A1L528 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[1]), , , , , , , , , , , , , , , , , );


--sr_cas_n is sr_cas_n at PIN_E9
sr_cas_n = OUTPUT();


--A1L590 is sr_ras_n~output at IOOBUF_X32_Y29_N30
A1L590 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[2]), , , , , , , , , , , , , , , , , );


--sr_ras_n is sr_ras_n at PIN_B12
sr_ras_n = OUTPUT();


--A1L463 is sd_clk~output at IOOBUF_X41_Y18_N16
A1L463 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sd_clk is sd_clk at PIN_G15
sd_clk = OUTPUT();


--A1L465 is sd_cmd~output at IOOBUF_X41_Y18_N23
A1L465 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sd_cmd is sd_cmd at PIN_G16
sd_cmd = OUTPUT();



--tty_txd is tty_txd at PIN_E16
tty_txd = INPUT();


--A1L600 is tty_rxd~output at IOOBUF_X41_Y18_N2
A1L600 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--tty_rxd is tty_rxd at PIN_F13
tty_rxd = OUTPUT();



--tty_rts is tty_rts at PIN_D16
tty_rts = INPUT();


--A1L594 is tty_cts~output at IOOBUF_X41_Y24_N2
A1L594 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--tty_cts is tty_cts at PIN_D15
tty_cts = OUTPUT();



--tty_dtr is tty_dtr at PIN_P14
tty_dtr = INPUT();


--A1L254 is flash_cs_n~output at IOOBUF_X0_Y24_N9
A1L254 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_cs_n is flash_cs_n at PIN_D2
flash_cs_n = OUTPUT();


--A1L252 is flash_clk~output at IOOBUF_X0_Y20_N16
A1L252 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_clk is flash_clk at PIN_H1
flash_clk = OUTPUT();


--A1L258 is flash_mosi~output at IOOBUF_X0_Y25_N9
A1L258 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_mosi is flash_mosi at PIN_C1
flash_mosi = OUTPUT();



--flash_miso is flash_miso at PIN_H2
flash_miso = INPUT();



--rtc_32khz is rtc_32khz at PIN_E15
rtc_32khz = INPUT();



--rtc_int_n is rtc_int_n at PIN_B16
rtc_int_n = INPUT();


--A1L345 is led[1]~output at IOOBUF_X30_Y0_N2
A1L345 = OUTPUT_BUFFER.O(.I(led_ctr[26]), , , , , , , , , , , , , , , , , );


--led[1] is led[1] at PIN_T13
led[1] = OUTPUT();


--A1L347 is led[2]~output at IOOBUF_X37_Y0_N2
A1L347 = OUTPUT_BUFFER.O(.I(led_ctr[27]), , , , , , , , , , , , , , , , , );


--led[2] is led[2] at PIN_R14
led[2] = OUTPUT();


--A1L349 is led[3]~output at IOOBUF_X35_Y0_N9
A1L349 = OUTPUT_BUFFER.O(.I(led_ctr[28]), , , , , , , , , , , , , , , , , );


--led[3] is led[3] at PIN_T14
led[3] = OUTPUT();


--A1L314 is hdmi_d[0]~output at IOOBUF_X41_Y13_N23
A1L314 = LVDS_OUTPUT_BUFFER.O(.I(N1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );

--A1L313 is hdmi_d[0]~0 at IOOBUF_X41_Y13_N23
A1L313 = LVDS_OUTPUT_BUFFER.OBAR(.I(N1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );


--hdmi_d[0] is hdmi_d[0] at PIN_K15
hdmi_d[0] = OUTPUT();


--A1L318 is hdmi_d[1]~output at IOOBUF_X41_Y5_N2
A1L318 = LVDS_OUTPUT_BUFFER.O(.I(N1_wire_ddio_outa_dataout[1]), , , , , , , , , , , , , , , , , );

--A1L317 is hdmi_d[1]~1 at IOOBUF_X41_Y5_N2
A1L317 = LVDS_OUTPUT_BUFFER.OBAR(.I(N1_wire_ddio_outa_dataout[1]), , , , , , , , , , , , , , , , , );


--hdmi_d[1] is hdmi_d[1] at PIN_N15
hdmi_d[1] = OUTPUT();


--A1L322 is hdmi_d[2]~output at IOOBUF_X41_Y3_N9
A1L322 = LVDS_OUTPUT_BUFFER.O(.I(N1_wire_ddio_outa_dataout[2]), , , , , , , , , , , , , , , , , );

--A1L321 is hdmi_d[2]~2 at IOOBUF_X41_Y3_N9
A1L321 = LVDS_OUTPUT_BUFFER.OBAR(.I(N1_wire_ddio_outa_dataout[2]), , , , , , , , , , , , , , , , , );


--hdmi_d[2] is hdmi_d[2] at PIN_R16
hdmi_d[2] = OUTPUT();


--A1L309 is hdmi_clk~output at IOOBUF_X41_Y13_N9
A1L309 = LVDS_OUTPUT_BUFFER.O(.I(Q1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );

--A1L308 is hdmi_clk~0 at IOOBUF_X41_Y13_N9
A1L308 = LVDS_OUTPUT_BUFFER.OBAR(.I(Q1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );


--hdmi_clk is hdmi_clk at PIN_J15
hdmi_clk = OUTPUT();


--hdmi_sda is hdmi_sda at PIN_R13
hdmi_sda = BIDIR();



--abc_d[0] is abc_d[0] at PIN_P3
abc_d[0] = BIDIR();


--A1L69 is abc_d[0]~input at IOIBUF_X3_Y0_N29
A1L69 = INPUT_BUFFER(.I(abc_d[0]), );


--abc_d[1] is abc_d[1] at PIN_M6
abc_d[1] = BIDIR();


--A1L72 is abc_d[1]~input at IOIBUF_X7_Y0_N8
A1L72 = INPUT_BUFFER(.I(abc_d[1]), );


--abc_d[2] is abc_d[2] at PIN_N5
abc_d[2] = BIDIR();


--A1L75 is abc_d[2]~input at IOIBUF_X7_Y0_N22
A1L75 = INPUT_BUFFER(.I(abc_d[2]), );


--abc_d[3] is abc_d[3] at PIN_T2
abc_d[3] = BIDIR();


--A1L78 is abc_d[3]~input at IOIBUF_X5_Y0_N8
A1L78 = INPUT_BUFFER(.I(abc_d[3]), );


--abc_d[4] is abc_d[4] at PIN_R3
abc_d[4] = BIDIR();


--A1L81 is abc_d[4]~input at IOIBUF_X3_Y0_N15
A1L81 = INPUT_BUFFER(.I(abc_d[4]), );


--abc_d[5] is abc_d[5] at PIN_T3
abc_d[5] = BIDIR();


--A1L84 is abc_d[5]~input at IOIBUF_X3_Y0_N8
A1L84 = INPUT_BUFFER(.I(abc_d[5]), );


--abc_d[6] is abc_d[6] at PIN_R4
abc_d[6] = BIDIR();


--A1L87 is abc_d[6]~input at IOIBUF_X5_Y0_N1
A1L87 = INPUT_BUFFER(.I(abc_d[6]), );


--abc_d[7] is abc_d[7] at PIN_T4
abc_d[7] = BIDIR();


--A1L90 is abc_d[7]~input at IOIBUF_X7_Y0_N29
A1L90 = INPUT_BUFFER(.I(abc_d[7]), );


--exth_ha is exth_ha at PIN_N12
exth_ha = BIDIR();



--exth_hb is exth_hb at PIN_N9
exth_hb = BIDIR();



--exth_hd is exth_hd at PIN_R11
exth_hd = BIDIR();



--exth_he is exth_he at PIN_R12
exth_he = BIDIR();



--exth_hf is exth_hf at PIN_T11
exth_hf = BIDIR();



--exth_hg is exth_hg at PIN_N11
exth_hg = BIDIR();



--sr_dq[0] is sr_dq[0] at PIN_A12
sr_dq[0] = BIDIR();


--A1L537 is sr_dq[0]~input at IOIBUF_X32_Y29_N22
A1L537 = INPUT_BUFFER(.I(sr_dq[0]), );


--sr_dq[1] is sr_dq[1] at PIN_E11
sr_dq[1] = BIDIR();


--A1L540 is sr_dq[1]~input at IOIBUF_X32_Y29_N1
A1L540 = INPUT_BUFFER(.I(sr_dq[1]), );


--sr_dq[2] is sr_dq[2] at PIN_D11
sr_dq[2] = BIDIR();


--A1L543 is sr_dq[2]~input at IOIBUF_X39_Y29_N29
A1L543 = INPUT_BUFFER(.I(sr_dq[2]), );


--sr_dq[3] is sr_dq[3] at PIN_C11
sr_dq[3] = BIDIR();


--A1L546 is sr_dq[3]~input at IOIBUF_X37_Y29_N15
A1L546 = INPUT_BUFFER(.I(sr_dq[3]), );


--sr_dq[4] is sr_dq[4] at PIN_B11
sr_dq[4] = BIDIR();


--A1L549 is sr_dq[4]~input at IOIBUF_X30_Y29_N22
A1L549 = INPUT_BUFFER(.I(sr_dq[4]), );


--sr_dq[5] is sr_dq[5] at PIN_A11
sr_dq[5] = BIDIR();


--A1L552 is sr_dq[5]~input at IOIBUF_X30_Y29_N15
A1L552 = INPUT_BUFFER(.I(sr_dq[5]), );


--sr_dq[6] is sr_dq[6] at PIN_B10
sr_dq[6] = BIDIR();


--A1L555 is sr_dq[6]~input at IOIBUF_X26_Y29_N29
A1L555 = INPUT_BUFFER(.I(sr_dq[6]), );


--sr_dq[7] is sr_dq[7] at PIN_A10
sr_dq[7] = BIDIR();


--A1L558 is sr_dq[7]~input at IOIBUF_X26_Y29_N22
A1L558 = INPUT_BUFFER(.I(sr_dq[7]), );


--sr_dq[8] is sr_dq[8] at PIN_A5
sr_dq[8] = BIDIR();


--A1L561 is sr_dq[8]~input at IOIBUF_X5_Y29_N1
A1L561 = INPUT_BUFFER(.I(sr_dq[8]), );


--sr_dq[9] is sr_dq[9] at PIN_E7
sr_dq[9] = BIDIR();


--A1L564 is sr_dq[9]~input at IOIBUF_X7_Y29_N8
A1L564 = INPUT_BUFFER(.I(sr_dq[9]), );


--sr_dq[10] is sr_dq[10] at PIN_B5
sr_dq[10] = BIDIR();


--A1L567 is sr_dq[10]~input at IOIBUF_X5_Y29_N15
A1L567 = INPUT_BUFFER(.I(sr_dq[10]), );


--sr_dq[11] is sr_dq[11] at PIN_A4
sr_dq[11] = BIDIR();


--A1L570 is sr_dq[11]~input at IOIBUF_X3_Y29_N1
A1L570 = INPUT_BUFFER(.I(sr_dq[11]), );


--sr_dq[12] is sr_dq[12] at PIN_E6
sr_dq[12] = BIDIR();


--A1L573 is sr_dq[12]~input at IOIBUF_X7_Y29_N29
A1L573 = INPUT_BUFFER(.I(sr_dq[12]), );


--sr_dq[13] is sr_dq[13] at PIN_D6
sr_dq[13] = BIDIR();


--A1L576 is sr_dq[13]~input at IOIBUF_X5_Y29_N22
A1L576 = INPUT_BUFFER(.I(sr_dq[13]), );


--sr_dq[14] is sr_dq[14] at PIN_C6
sr_dq[14] = BIDIR();


--A1L579 is sr_dq[14]~input at IOIBUF_X11_Y29_N29
A1L579 = INPUT_BUFFER(.I(sr_dq[14]), );


--sr_dq[15] is sr_dq[15] at PIN_D5
sr_dq[15] = BIDIR();


--A1L582 is sr_dq[15]~input at IOIBUF_X3_Y29_N22
A1L582 = INPUT_BUFFER(.I(sr_dq[15]), );


--sd_dat[0] is sd_dat[0] at PIN_F15
sd_dat[0] = BIDIR();



--sd_dat[1] is sd_dat[1] at PIN_M10
sd_dat[1] = BIDIR();



--sd_dat[2] is sd_dat[2] at PIN_F14
sd_dat[2] = BIDIR();



--sd_dat[3] is sd_dat[3] at PIN_F16
sd_dat[3] = BIDIR();



--spi_clk is spi_clk at PIN_P6
spi_clk = BIDIR();



--spi_miso is spi_miso at PIN_M7
spi_miso = BIDIR();



--spi_mosi is spi_mosi at PIN_M8
spi_mosi = BIDIR();



--spi_cs_esp_n is spi_cs_esp_n at PIN_N8
spi_cs_esp_n = BIDIR();



--spi_cs_flash_n is spi_cs_flash_n at PIN_N6
spi_cs_flash_n = BIDIR();



--esp_io0 is esp_io0 at PIN_L8
esp_io0 = BIDIR();



--esp_int is esp_int at PIN_P8
esp_int = BIDIR();



--i2c_scl is i2c_scl at PIN_C16
i2c_scl = BIDIR();



--i2c_sda is i2c_sda at PIN_C15
i2c_sda = BIDIR();



--gpio[0] is gpio[0] at PIN_L7
gpio[0] = BIDIR();



--gpio[1] is gpio[1] at PIN_P9
gpio[1] = BIDIR();



--gpio[2] is gpio[2] at PIN_T6
gpio[2] = BIDIR();



--gpio[3] is gpio[3] at PIN_R10
gpio[3] = BIDIR();



--gpio[4] is gpio[4] at PIN_T7
gpio[4] = BIDIR();



--gpio[5] is gpio[5] at PIN_R7
gpio[5] = BIDIR();



--hdmi_scl is hdmi_scl at PIN_M11
hdmi_scl = BIDIR();



--hdmi_hpd is hdmi_hpd at PIN_T15
hdmi_hpd = BIDIR();



--A1L176 is abc_xmemfl_n~input at IOIBUF_X1_Y0_N1
A1L176 = INPUT_BUFFER(.I(abc_xmemfl_n), );


--abc_xmemfl_n is abc_xmemfl_n at PIN_N3
abc_xmemfl_n = INPUT();


--A1L50 is abc_a[10]~input at IOIBUF_X0_Y4_N1
A1L50 = INPUT_BUFFER(.I(abc_a[10]), );


--abc_a[10] is abc_a[10] at PIN_L4
abc_a[10] = INPUT();


--A1L52 is abc_a[11]~input at IOIBUF_X0_Y10_N8
A1L52 = INPUT_BUFFER(.I(abc_a[11]), );


--abc_a[11] is abc_a[11] at PIN_K1
abc_a[11] = INPUT();


--A1L54 is abc_a[12]~input at IOIBUF_X0_Y9_N1
A1L54 = INPUT_BUFFER(.I(abc_a[12]), );


--abc_a[12] is abc_a[12] at PIN_L1
abc_a[12] = INPUT();


--A1L56 is abc_a[13]~input at IOIBUF_X0_Y14_N22
A1L56 = INPUT_BUFFER(.I(abc_a[13]), );


--abc_a[13] is abc_a[13] at PIN_M1
abc_a[13] = INPUT();


--A1L58 is abc_a[14]~input at IOIBUF_X0_Y5_N8
A1L58 = INPUT_BUFFER(.I(abc_a[14]), );


--abc_a[14] is abc_a[14] at PIN_N2
abc_a[14] = INPUT();


--A1L60 is abc_a[15]~input at IOIBUF_X0_Y5_N15
A1L60 = INPUT_BUFFER(.I(abc_a[15]), );


--abc_a[15] is abc_a[15] at PIN_N1
abc_a[15] = INPUT();


--A1L188 is clock_48~input at IOIBUF_X41_Y15_N15
A1L188 = INPUT_BUFFER(.I(clock_48), );


--clock_48 is clock_48 at PIN_M15
clock_48 = INPUT();


--A1L34 is abc_a[2]~input at IOIBUF_X19_Y29_N1
A1L34 = INPUT_BUFFER(.I(abc_a[2]), );


--abc_a[2] is abc_a[2] at PIN_A9
abc_a[2] = INPUT();


--A1L36 is abc_a[3]~input at IOIBUF_X0_Y24_N15
A1L36 = INPUT_BUFFER(.I(abc_a[3]), );


--abc_a[3] is abc_a[3] at PIN_D1
abc_a[3] = INPUT();


--A1L38 is abc_a[4]~input at IOIBUF_X0_Y22_N8
A1L38 = INPUT_BUFFER(.I(abc_a[4]), );


--abc_a[4] is abc_a[4] at PIN_G5
abc_a[4] = INPUT();


--A1L40 is abc_a[5]~input at IOIBUF_X0_Y25_N15
A1L40 = INPUT_BUFFER(.I(abc_a[5]), );


--abc_a[5] is abc_a[5] at PIN_F3
abc_a[5] = INPUT();


--A1L169 is abc_xinpstb_n~input at IOIBUF_X28_Y0_N22
A1L169 = INPUT_BUFFER(.I(abc_xinpstb_n), );


--abc_xinpstb_n is abc_xinpstb_n at PIN_T12
abc_xinpstb_n = INPUT();


--A1L149 is abc_out_n[0]~input at IOIBUF_X0_Y21_N1
A1L149 = INPUT_BUFFER(.I(abc_out_n[0]), );


--abc_out_n[0] is abc_out_n[0] at PIN_G2
abc_out_n[0] = INPUT();


--A1L151 is abc_out_n[1]~input at IOIBUF_X0_Y13_N15
A1L151 = INPUT_BUFFER(.I(abc_out_n[1]), );


--abc_out_n[1] is abc_out_n[1] at PIN_J2
abc_out_n[1] = INPUT();


--A1L153 is abc_out_n[2]~input at IOIBUF_X0_Y5_N22
A1L153 = INPUT_BUFFER(.I(abc_out_n[2]), );


--abc_out_n[2] is abc_out_n[2] at PIN_K5
abc_out_n[2] = INPUT();


--A1L155 is abc_out_n[3]~input at IOIBUF_X0_Y11_N8
A1L155 = INPUT_BUFFER(.I(abc_out_n[3]), );


--abc_out_n[3] is abc_out_n[3] at PIN_L3
abc_out_n[3] = INPUT();


--A1L185 is abc_xoutpstb_n~input at IOIBUF_X30_Y0_N29
A1L185 = INPUT_BUFFER(.I(abc_xoutpstb_n), );


--abc_xoutpstb_n is abc_xoutpstb_n at PIN_L10
abc_xoutpstb_n = INPUT();


--A1L157 is abc_out_n[4]~input at IOIBUF_X0_Y6_N15
A1L157 = INPUT_BUFFER(.I(abc_out_n[4]), );


--abc_out_n[4] is abc_out_n[4] at PIN_K2
abc_out_n[4] = INPUT();


--A1L42 is abc_a[6]~input at IOIBUF_X0_Y14_N8
A1L42 = INPUT_BUFFER(.I(abc_a[6]), );


--abc_a[6] is abc_a[6] at PIN_E1
abc_a[6] = INPUT();


--A1L44 is abc_a[7]~input at IOIBUF_X0_Y22_N22
A1L44 = INPUT_BUFFER(.I(abc_a[7]), );


--abc_a[7] is abc_a[7] at PIN_F1
abc_a[7] = INPUT();


--A1L46 is abc_a[8]~input at IOIBUF_X0_Y21_N22
A1L46 = INPUT_BUFFER(.I(abc_a[8]), );


--abc_a[8] is abc_a[8] at PIN_G1
abc_a[8] = INPUT();


--A1L48 is abc_a[9]~input at IOIBUF_X0_Y13_N22
A1L48 = INPUT_BUFFER(.I(abc_a[9]), );


--abc_a[9] is abc_a[9] at PIN_J1
abc_a[9] = INPUT();


--A1L30 is abc_a[0]~input at IOIBUF_X19_Y29_N15
A1L30 = INPUT_BUFFER(.I(abc_a[0]), );


--abc_a[0] is abc_a[0] at PIN_A8
abc_a[0] = INPUT();


--A1L32 is abc_a[1]~input at IOIBUF_X19_Y29_N22
A1L32 = INPUT_BUFFER(.I(abc_a[1]), );


--abc_a[1] is abc_a[1] at PIN_B8
abc_a[1] = INPUT();


--A1L181 is abc_xmemw800_n~input at IOIBUF_X0_Y3_N8
A1L181 = INPUT_BUFFER(.I(abc_xmemw800_n), );


--abc_xmemw800_n is abc_xmemw800_n at PIN_P1
abc_xmemw800_n = INPUT();


--A1L179 is abc_xmemw80_n~input at IOIBUF_X0_Y4_N22
A1L179 = INPUT_BUFFER(.I(abc_xmemw80_n), );


--abc_xmemw80_n is abc_xmemw80_n at PIN_R1
abc_xmemw80_n = INPUT();


--A1L312 is hdmi_d[0](n) at PIN_K16
A1L312 = OUTPUT();


--A1L316 is hdmi_d[1](n) at PIN_N16
A1L316 = OUTPUT();


--A1L320 is hdmi_d[2](n) at PIN_P16
A1L320 = OUTPUT();


--A1L307 is hdmi_clk(n) at PIN_J16
A1L307 = OUTPUT();


--K1L101 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_coreclock~clkctrl at CLKCTRL_G4
K1L101 = cycloneive_clkctrl(.INCLK[0] = K1_tx_coreclock) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--K1L73 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock~clkctrl at CLKCTRL_G3
K1L73 = cycloneive_clkctrl(.INCLK[0] = K1_fast_clock) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--A1L26 is WideAnd0~0clkctrl at CLKCTRL_G17
A1L26 = cycloneive_clkctrl(.INCLK[0] = A1L25) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--A1L457 is rst_n~clkctrl at CLKCTRL_G18
A1L457 = cycloneive_clkctrl(.INCLK[0] = rst_n) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--U1L23 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]~clkctrl at CLKCTRL_G8
U1L23 = cycloneive_clkctrl(.INCLK[0] = U1_wire_pll1_clk[0]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--U1L27 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2]~clkctrl at CLKCTRL_G9
U1L27 = cycloneive_clkctrl(.INCLK[0] = U1_wire_pll1_clk[2]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--U1L25 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1]~clkctrl at CLKCTRL_G7
U1L25 = cycloneive_clkctrl(.INCLK[0] = U1_wire_pll1_clk[1]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--G1_dram_d_en is sdram:sdram|dram_d_en at DDIOOECELL_X32_Y29_N26
--register power-up is low

G1_dram_d_en = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L171Q is sdram:sdram|dram_d_en~_Duplicate_1 at DDIOOECELL_X32_Y29_N5
--register power-up is low

G1L171Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L172Q is sdram:sdram|dram_d_en~_Duplicate_2 at DDIOOECELL_X39_Y29_N33
--register power-up is low

G1L172Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L173Q is sdram:sdram|dram_d_en~_Duplicate_3 at DDIOOECELL_X37_Y29_N19
--register power-up is low

G1L173Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L174Q is sdram:sdram|dram_d_en~_Duplicate_4 at DDIOOECELL_X30_Y29_N26
--register power-up is low

G1L174Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L175Q is sdram:sdram|dram_d_en~_Duplicate_5 at DDIOOECELL_X30_Y29_N19
--register power-up is low

G1L175Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L176Q is sdram:sdram|dram_d_en~_Duplicate_6 at DDIOOECELL_X26_Y29_N33
--register power-up is low

G1L176Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L177Q is sdram:sdram|dram_d_en~_Duplicate_7 at DDIOOECELL_X26_Y29_N26
--register power-up is low

G1L177Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L178Q is sdram:sdram|dram_d_en~_Duplicate_8 at DDIOOECELL_X5_Y29_N5
--register power-up is low

G1L178Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L179Q is sdram:sdram|dram_d_en~_Duplicate_9 at DDIOOECELL_X7_Y29_N12
--register power-up is low

G1L179Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L180Q is sdram:sdram|dram_d_en~_Duplicate_10 at DDIOOECELL_X5_Y29_N19
--register power-up is low

G1L180Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L181Q is sdram:sdram|dram_d_en~_Duplicate_11 at DDIOOECELL_X3_Y29_N5
--register power-up is low

G1L181Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L182Q is sdram:sdram|dram_d_en~_Duplicate_12 at DDIOOECELL_X7_Y29_N33
--register power-up is low

G1L182Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L183Q is sdram:sdram|dram_d_en~_Duplicate_13 at DDIOOECELL_X5_Y29_N26
--register power-up is low

G1L183Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1L184Q is sdram:sdram|dram_d_en~_Duplicate_14 at DDIOOECELL_X11_Y29_N33
--register power-up is low

G1L184Q = DFFEAS(G1_state.st_rd, GLOBAL(U1L23), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--G1_dram_a[10] is sdram:sdram|dram_a[10] at DDIOOUTCELL_X39_Y29_N4
--register power-up is low

G1_dram_a[10] = DFFEAS(G1L36, GLOBAL(U1L23),  ,  ,  ,  ,  ,  ,  );


--led_ctr[26] is led_ctr[26] at DDIOOUTCELL_X30_Y0_N4
--register power-up is low

led_ctr[26] = DFFEAS(A1L429, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[27] is led_ctr[27] at DDIOOUTCELL_X37_Y0_N4
--register power-up is low

led_ctr[27] = DFFEAS(A1L433, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--led_ctr[28] is led_ctr[28] at DDIOOUTCELL_X35_Y0_N11
--register power-up is low

led_ctr[28] = DFFEAS(A1L437, GLOBAL(U1L25), GLOBAL(A1L457),  ,  ,  ,  ,  ,  );


--K1L154 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]~feeder at LCCOMB_X35_Y11_N14
K1L154 = C3_qreg[0];


--K1L133 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]~feeder at LCCOMB_X36_Y12_N20
K1L133 = C2_qreg[4];


--K1L135 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]~feeder at LCCOMB_X35_Y12_N6
K1L135 = C3_qreg[4];


--K1L131 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]~feeder at LCCOMB_X35_Y12_N26
K1L131 = C1_qreg[4];


--K1L145 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]~feeder at LCCOMB_X35_Y12_N30
K1L145 = C2_qreg[2];


--K1L147 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]~feeder at LCCOMB_X35_Y11_N2
K1L147 = C3_qreg[2];


--K1L121 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]~feeder at LCCOMB_X36_Y12_N24
K1L121 = C2_qreg[6];


--K1L123 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]~feeder at LCCOMB_X35_Y12_N10
K1L123 = C3_qreg[6];


--K1L143 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]~feeder at LCCOMB_X35_Y11_N16
K1L143 = C1_qreg[2];


--A1L604 is vid_rst_n~feeder at LCCOMB_X26_Y12_N12
A1L604 = rst_n;


--G1L109 is sdram:sdram|dram_a[1]~feeder at LCCOMB_X14_Y24_N12
G1L109 = G1L45;


--G1L114 is sdram:sdram|dram_a[2]~feeder at LCCOMB_X14_Y24_N24
G1L114 = G1L44;


--G1L116 is sdram:sdram|dram_a[3]~feeder at LCCOMB_X14_Y24_N28
G1L116 = G1L43;


--G1L118 is sdram:sdram|dram_a[4]~feeder at LCCOMB_X14_Y24_N0
G1L118 = G1L42;


--G1L120 is sdram:sdram|dram_a[5]~feeder at LCCOMB_X14_Y24_N20
G1L120 = G1L41;


--G1L122 is sdram:sdram|dram_a[6]~feeder at LCCOMB_X14_Y24_N16
G1L122 = G1L40;


--G1L124 is sdram:sdram|dram_a[7]~feeder at LCCOMB_X14_Y24_N6
G1L124 = G1L39;


--G1L126 is sdram:sdram|dram_a[8]~feeder at LCCOMB_X14_Y24_N18
G1L126 = G1L38;


--A1L129 is abc_mempg[0]~feeder at LCCOMB_X14_Y24_N22
A1L129 = abc_di[0];


--A1L131 is abc_mempg[1]~feeder at LCCOMB_X14_Y24_N30
A1L131 = abc_di[1];


--A1L133 is abc_mempg[2]~feeder at LCCOMB_X14_Y24_N14
A1L133 = abc_di[2];


--A1L135 is abc_mempg[3]~feeder at LCCOMB_X14_Y24_N8
A1L135 = abc_di[3];


--A1L137 is abc_mempg[4]~feeder at LCCOMB_X14_Y24_N4
A1L137 = abc_di[4];


--A1L139 is abc_mempg[5]~feeder at LCCOMB_X14_Y24_N26
A1L139 = abc_di[5];


--A1L142 is abc_mempg[7]~feeder at LCCOMB_X16_Y21_N0
A1L142 = abc_di[7];


--P2L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6]~feeder at LCCOMB_X39_Y14_N16
P2L8 = K1_dffe22;


--K1L23 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[0]~feeder at LCCOMB_X37_Y12_N22
K1L23 = K1_dffe3a[0];


--K1L26 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[2]~feeder at LCCOMB_X37_Y12_N8
K1L26 = K1_dffe3a[2];


--K1L29 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[0]~feeder at LCCOMB_X37_Y12_N10
K1L29 = K1_dffe4a[0];


--K1L31 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[1]~feeder at LCCOMB_X36_Y14_N26
K1L31 = K1_dffe4a[1];


--K1L58 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[0]~feeder at LCCOMB_X36_Y14_N24
K1L58 = K1_dffe14a[0];


--K1L62 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[2]~feeder at LCCOMB_X36_Y14_N30
K1L62 = K1_dffe14a[2];


--K1L60 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[1]~feeder at LCCOMB_X36_Y14_N10
K1L60 = K1_dffe14a[1];


--K1L16 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[0]~feeder at LCCOMB_X37_Y12_N24
K1L16 = M2_counter_reg_bit[0];


--K1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[0]~feeder at LCCOMB_X37_Y12_N18
K1L9 = M2_counter_reg_bit[0];


--K1L20 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[2]~feeder at LCCOMB_X37_Y12_N26
K1L20 = M2_counter_reg_bit[2];


--K1L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[2]~feeder at LCCOMB_X37_Y12_N2
K1L13 = M2_counter_reg_bit[2];


--K1L40 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[0]~feeder at LCCOMB_X37_Y12_N6
K1L40 = K1_dffe6a[0];


--K1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[1]~feeder at LCCOMB_X36_Y14_N4
K1L11 = M2_counter_reg_bit[1];


--K1L18 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[1]~feeder at LCCOMB_X36_Y14_N12
K1L18 = M2_counter_reg_bit[1];


--K1L36 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[1]~feeder at LCCOMB_X36_Y14_N18
K1L36 = K1_dffe5a[1];


--C1L58 is tmdsenc:hdmitmds[0].enc|qreg[6]~feeder at LCCOMB_X33_Y12_N20
C1L58 = C1L62;


--A1L213 is dummydata[17]~feeder at LCCOMB_X33_Y12_N28
A1L213 = dummydata[16];


--K1L51 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[0]~feeder at LCCOMB_X36_Y14_N20
K1L51 = M1_counter_reg_bit[0];


--K1L65 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[0]~feeder at LCCOMB_X36_Y14_N6
K1L65 = K1_dffe16a[0];


--K1L55 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[2]~feeder at LCCOMB_X36_Y14_N0
K1L55 = M1_counter_reg_bit[2];


--K1L67 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[1]~feeder at LCCOMB_X36_Y14_N22
K1L67 = K1_dffe16a[1];


--K1L53 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[1]~feeder at LCCOMB_X36_Y14_N16
K1L53 = M1_counter_reg_bit[1];


--K1L112 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]~feeder at LCCOMB_X36_Y11_N8
K1L112 = C3_qreg[8];


--C2L55 is tmdsenc:hdmitmds[1].enc|qreg[4]~feeder at LCCOMB_X33_Y12_N6
C2L55 = C2L66;


--C3L53 is tmdsenc:hdmitmds[2].enc|qreg[4]~feeder at LCCOMB_X33_Y12_N12
C3L53 = C3L63;


--C1L55 is tmdsenc:hdmitmds[0].enc|qreg[4]~feeder at LCCOMB_X33_Y12_N26
C1L55 = C1L67;


--C2L52 is tmdsenc:hdmitmds[1].enc|qreg[2]~feeder at LCCOMB_X33_Y12_N16
C2L52 = C2L71;


--C3L50 is tmdsenc:hdmitmds[2].enc|qreg[2]~feeder at LCCOMB_X33_Y12_N30
C3L50 = C3L69;


--C2L58 is tmdsenc:hdmitmds[1].enc|qreg[6]~feeder at LCCOMB_X33_Y12_N24
C2L58 = C2L73;


--C3L56 is tmdsenc:hdmitmds[2].enc|qreg[6]~feeder at LCCOMB_X33_Y12_N22
C3L56 = C3L70;


--C1L52 is tmdsenc:hdmitmds[0].enc|qreg[2]~feeder at LCCOMB_X33_Y12_N8
C1L52 = C1L73;


--G1L383 is sdram:sdram|wdata_q[17]~feeder at LCCOMB_X8_Y3_N12
G1L383 = A1L72;


--G1L372 is sdram:sdram|wdata_q[10]~feeder at LCCOMB_X7_Y12_N4
G1L372 = A1L75;


--G1L374 is sdram:sdram|wdata_q[11]~feeder at LCCOMB_X7_Y12_N6
G1L374 = A1L78;


--G1L376 is sdram:sdram|wdata_q[12]~feeder at LCCOMB_X7_Y12_N20
G1L376 = A1L81;


--G1L379 is sdram:sdram|wdata_q[14]~feeder at LCCOMB_X7_Y12_N0
G1L379 = A1L87;


--G1L381 is sdram:sdram|wdata_q[15]~feeder at LCCOMB_X8_Y3_N10
G1L381 = A1L90;


--A1L144 is abc_mempg[8]~feeder at LCCOMB_X16_Y21_N26
A1L144 = A1L30;


--K1L91 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|pll_lock_sync~feeder at LCCOMB_X20_Y5_N28
K1L91 = VCC;


--C1L30 is tmdsenc:hdmitmds[0].enc|denreg~feeder at LCCOMB_X33_Y12_N14
C1L30 = VCC;