max80_fw/output_files/max80.fit.eqn

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--T1_wire_pll1_locked is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_locked at PLL_2
T1_wire_pll1_locked = EQUATION NOT SUPPORTED;

--T1_wire_pll1_fbout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_fbout at PLL_2
T1_wire_pll1_fbout = EQUATION NOT SUPPORTED;

--T1_wire_pll1_clk[0] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] at PLL_2
T1_wire_pll1_clk[0] = EQUATION NOT SUPPORTED;

--T1_wire_pll1_clk[1] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1] at PLL_2
T1_wire_pll1_clk[1] = EQUATION NOT SUPPORTED;

--T1_wire_pll1_clk[2] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2] at PLL_2
T1_wire_pll1_clk[2] = EQUATION NOT SUPPORTED;


--A1L378Q is led_ctr[26]~_Duplicate_1 at FF_X35_Y1_N23
--register power-up is low

A1L378Q = DFFEAS(A1L376, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--A1L382Q is led_ctr[27]~_Duplicate_1 at FF_X35_Y1_N25
--register power-up is low

A1L382Q = DFFEAS(A1L380, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--A1L386Q is led_ctr[28]~_Duplicate_1 at FF_X35_Y1_N27
--register power-up is low

A1L386Q = DFFEAS(A1L384, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--M1_wire_ddio_outa_dataout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[0] at DDIOOUTCELL_X41_Y13_N25
M1_wire_ddio_outa_dataout[0] = DDIO_OUT(.DATAINHI(Q1_shift_reg[0]), .DATAINLO(Q2_shift_reg[0]), , , , );


--M1_wire_ddio_outa_dataout[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[1] at DDIOOUTCELL_X41_Y5_N4
M1_wire_ddio_outa_dataout[1] = DDIO_OUT(.DATAINHI(Q3_shift_reg[0]), .DATAINLO(Q4_shift_reg[0]), , , , );


--M1_wire_ddio_outa_dataout[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[2] at DDIOOUTCELL_X41_Y3_N11
M1_wire_ddio_outa_dataout[2] = DDIO_OUT(.DATAINHI(Q5_shift_reg[0]), .DATAINLO(Q6_shift_reg[0]), , , , );


--P1_wire_ddio_outa_dataout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out1:outclock_ddio|wire_ddio_outa_dataout[0] at DDIOOUTCELL_X41_Y13_N11
P1_wire_ddio_outa_dataout[0] = DDIO_OUT(.DATAINHI(N1_shift_reg[0]), .DATAINLO(N2_shift_reg[0]), , , , );


--U1_wire_le_comb8_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le:altpll_dyn_phase_le2|wire_le_comb8_combout at LCCOMB_X40_Y28_N16
U1_wire_le_comb8_combout = (T1_remap_decoy_le3a_2) # ((!T1_remap_decoy_le3a_1 & T1_remap_decoy_le3a_0));


--V1_wire_le_comb9_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le1:altpll_dyn_phase_le4|wire_le_comb9_combout at LCCOMB_X40_Y28_N18
V1_wire_le_comb9_combout = (T1_remap_decoy_le3a_2) # ((T1_remap_decoy_le3a_1 & !T1_remap_decoy_le3a_0));


--W1_wire_le_comb10_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le12:altpll_dyn_phase_le5|wire_le_comb10_combout at LCCOMB_X40_Y28_N28
W1_wire_le_comb10_combout = (T1_remap_decoy_le3a_2 & ((T1_remap_decoy_le3a_1) # (T1_remap_decoy_le3a_0))) # (!T1_remap_decoy_le3a_2 & (T1_remap_decoy_le3a_1 & T1_remap_decoy_le3a_0));


--led_ctr[25] is led_ctr[25] at FF_X35_Y1_N21
--register power-up is low

led_ctr[25] = DFFEAS(A1L373, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[24] is led_ctr[24] at FF_X35_Y1_N19
--register power-up is low

led_ctr[24] = DFFEAS(A1L370, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[23] is led_ctr[23] at FF_X35_Y1_N17
--register power-up is low

led_ctr[23] = DFFEAS(A1L367, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[22] is led_ctr[22] at FF_X35_Y1_N15
--register power-up is low

led_ctr[22] = DFFEAS(A1L364, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[21] is led_ctr[21] at FF_X35_Y1_N13
--register power-up is low

led_ctr[21] = DFFEAS(A1L361, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[20] is led_ctr[20] at FF_X35_Y1_N11
--register power-up is low

led_ctr[20] = DFFEAS(A1L358, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[19] is led_ctr[19] at FF_X35_Y1_N9
--register power-up is low

led_ctr[19] = DFFEAS(A1L355, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[18] is led_ctr[18] at FF_X35_Y1_N7
--register power-up is low

led_ctr[18] = DFFEAS(A1L352, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[17] is led_ctr[17] at FF_X35_Y1_N5
--register power-up is low

led_ctr[17] = DFFEAS(A1L349, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[16] is led_ctr[16] at FF_X35_Y1_N3
--register power-up is low

led_ctr[16] = DFFEAS(A1L346, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[15] is led_ctr[15] at FF_X35_Y1_N1
--register power-up is low

led_ctr[15] = DFFEAS(A1L343, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[14] is led_ctr[14] at FF_X35_Y2_N31
--register power-up is low

led_ctr[14] = DFFEAS(A1L340, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[13] is led_ctr[13] at FF_X35_Y2_N29
--register power-up is low

led_ctr[13] = DFFEAS(A1L337, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[12] is led_ctr[12] at FF_X35_Y2_N27
--register power-up is low

led_ctr[12] = DFFEAS(A1L334, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[11] is led_ctr[11] at FF_X35_Y2_N25
--register power-up is low

led_ctr[11] = DFFEAS(A1L331, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[10] is led_ctr[10] at FF_X35_Y2_N23
--register power-up is low

led_ctr[10] = DFFEAS(A1L328, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[9] is led_ctr[9] at FF_X35_Y2_N21
--register power-up is low

led_ctr[9] = DFFEAS(A1L325, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[8] is led_ctr[8] at FF_X35_Y2_N19
--register power-up is low

led_ctr[8] = DFFEAS(A1L322, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[7] is led_ctr[7] at FF_X35_Y2_N17
--register power-up is low

led_ctr[7] = DFFEAS(A1L319, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[6] is led_ctr[6] at FF_X35_Y2_N15
--register power-up is low

led_ctr[6] = DFFEAS(A1L316, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[5] is led_ctr[5] at FF_X35_Y2_N13
--register power-up is low

led_ctr[5] = DFFEAS(A1L313, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[4] is led_ctr[4] at FF_X35_Y2_N11
--register power-up is low

led_ctr[4] = DFFEAS(A1L310, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[3] is led_ctr[3] at FF_X35_Y2_N9
--register power-up is low

led_ctr[3] = DFFEAS(A1L307, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[2] is led_ctr[2] at FF_X35_Y2_N7
--register power-up is low

led_ctr[2] = DFFEAS(A1L304, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[1] is led_ctr[1] at FF_X35_Y2_N5
--register power-up is low

led_ctr[1] = DFFEAS(A1L301, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--A1L301 is led_ctr[1]~28 at LCCOMB_X35_Y2_N4
A1L301 = (led_ctr[1] & (led_ctr[0] $ (VCC))) # (!led_ctr[1] & (led_ctr[0] & VCC));

--A1L302 is led_ctr[1]~29 at LCCOMB_X35_Y2_N4
A1L302 = CARRY((led_ctr[1] & led_ctr[0]));


--A1L304 is led_ctr[2]~30 at LCCOMB_X35_Y2_N6
A1L304 = (led_ctr[2] & (!A1L302)) # (!led_ctr[2] & ((A1L302) # (GND)));

--A1L305 is led_ctr[2]~31 at LCCOMB_X35_Y2_N6
A1L305 = CARRY((!A1L302) # (!led_ctr[2]));


--A1L307 is led_ctr[3]~32 at LCCOMB_X35_Y2_N8
A1L307 = (led_ctr[3] & (A1L305 $ (GND))) # (!led_ctr[3] & (!A1L305 & VCC));

--A1L308 is led_ctr[3]~33 at LCCOMB_X35_Y2_N8
A1L308 = CARRY((led_ctr[3] & !A1L305));


--A1L310 is led_ctr[4]~34 at LCCOMB_X35_Y2_N10
A1L310 = (led_ctr[4] & (!A1L308)) # (!led_ctr[4] & ((A1L308) # (GND)));

--A1L311 is led_ctr[4]~35 at LCCOMB_X35_Y2_N10
A1L311 = CARRY((!A1L308) # (!led_ctr[4]));


--A1L313 is led_ctr[5]~36 at LCCOMB_X35_Y2_N12
A1L313 = (led_ctr[5] & (A1L311 $ (GND))) # (!led_ctr[5] & (!A1L311 & VCC));

--A1L314 is led_ctr[5]~37 at LCCOMB_X35_Y2_N12
A1L314 = CARRY((led_ctr[5] & !A1L311));


--A1L316 is led_ctr[6]~38 at LCCOMB_X35_Y2_N14
A1L316 = (led_ctr[6] & (!A1L314)) # (!led_ctr[6] & ((A1L314) # (GND)));

--A1L317 is led_ctr[6]~39 at LCCOMB_X35_Y2_N14
A1L317 = CARRY((!A1L314) # (!led_ctr[6]));


--A1L319 is led_ctr[7]~40 at LCCOMB_X35_Y2_N16
A1L319 = (led_ctr[7] & (A1L317 $ (GND))) # (!led_ctr[7] & (!A1L317 & VCC));

--A1L320 is led_ctr[7]~41 at LCCOMB_X35_Y2_N16
A1L320 = CARRY((led_ctr[7] & !A1L317));


--A1L322 is led_ctr[8]~42 at LCCOMB_X35_Y2_N18
A1L322 = (led_ctr[8] & (!A1L320)) # (!led_ctr[8] & ((A1L320) # (GND)));

--A1L323 is led_ctr[8]~43 at LCCOMB_X35_Y2_N18
A1L323 = CARRY((!A1L320) # (!led_ctr[8]));


--A1L325 is led_ctr[9]~44 at LCCOMB_X35_Y2_N20
A1L325 = (led_ctr[9] & (A1L323 $ (GND))) # (!led_ctr[9] & (!A1L323 & VCC));

--A1L326 is led_ctr[9]~45 at LCCOMB_X35_Y2_N20
A1L326 = CARRY((led_ctr[9] & !A1L323));


--A1L328 is led_ctr[10]~46 at LCCOMB_X35_Y2_N22
A1L328 = (led_ctr[10] & (!A1L326)) # (!led_ctr[10] & ((A1L326) # (GND)));

--A1L329 is led_ctr[10]~47 at LCCOMB_X35_Y2_N22
A1L329 = CARRY((!A1L326) # (!led_ctr[10]));


--A1L331 is led_ctr[11]~48 at LCCOMB_X35_Y2_N24
A1L331 = (led_ctr[11] & (A1L329 $ (GND))) # (!led_ctr[11] & (!A1L329 & VCC));

--A1L332 is led_ctr[11]~49 at LCCOMB_X35_Y2_N24
A1L332 = CARRY((led_ctr[11] & !A1L329));


--A1L334 is led_ctr[12]~50 at LCCOMB_X35_Y2_N26
A1L334 = (led_ctr[12] & (!A1L332)) # (!led_ctr[12] & ((A1L332) # (GND)));

--A1L335 is led_ctr[12]~51 at LCCOMB_X35_Y2_N26
A1L335 = CARRY((!A1L332) # (!led_ctr[12]));


--A1L337 is led_ctr[13]~52 at LCCOMB_X35_Y2_N28
A1L337 = (led_ctr[13] & (A1L335 $ (GND))) # (!led_ctr[13] & (!A1L335 & VCC));

--A1L338 is led_ctr[13]~53 at LCCOMB_X35_Y2_N28
A1L338 = CARRY((led_ctr[13] & !A1L335));


--A1L340 is led_ctr[14]~54 at LCCOMB_X35_Y2_N30
A1L340 = (led_ctr[14] & (!A1L338)) # (!led_ctr[14] & ((A1L338) # (GND)));

--A1L341 is led_ctr[14]~55 at LCCOMB_X35_Y2_N30
A1L341 = CARRY((!A1L338) # (!led_ctr[14]));


--A1L343 is led_ctr[15]~56 at LCCOMB_X35_Y1_N0
A1L343 = (led_ctr[15] & (A1L341 $ (GND))) # (!led_ctr[15] & (!A1L341 & VCC));

--A1L344 is led_ctr[15]~57 at LCCOMB_X35_Y1_N0
A1L344 = CARRY((led_ctr[15] & !A1L341));


--A1L346 is led_ctr[16]~58 at LCCOMB_X35_Y1_N2
A1L346 = (led_ctr[16] & (!A1L344)) # (!led_ctr[16] & ((A1L344) # (GND)));

--A1L347 is led_ctr[16]~59 at LCCOMB_X35_Y1_N2
A1L347 = CARRY((!A1L344) # (!led_ctr[16]));


--A1L349 is led_ctr[17]~60 at LCCOMB_X35_Y1_N4
A1L349 = (led_ctr[17] & (A1L347 $ (GND))) # (!led_ctr[17] & (!A1L347 & VCC));

--A1L350 is led_ctr[17]~61 at LCCOMB_X35_Y1_N4
A1L350 = CARRY((led_ctr[17] & !A1L347));


--A1L352 is led_ctr[18]~62 at LCCOMB_X35_Y1_N6
A1L352 = (led_ctr[18] & (!A1L350)) # (!led_ctr[18] & ((A1L350) # (GND)));

--A1L353 is led_ctr[18]~63 at LCCOMB_X35_Y1_N6
A1L353 = CARRY((!A1L350) # (!led_ctr[18]));


--A1L355 is led_ctr[19]~64 at LCCOMB_X35_Y1_N8
A1L355 = (led_ctr[19] & (A1L353 $ (GND))) # (!led_ctr[19] & (!A1L353 & VCC));

--A1L356 is led_ctr[19]~65 at LCCOMB_X35_Y1_N8
A1L356 = CARRY((led_ctr[19] & !A1L353));


--A1L358 is led_ctr[20]~66 at LCCOMB_X35_Y1_N10
A1L358 = (led_ctr[20] & (!A1L356)) # (!led_ctr[20] & ((A1L356) # (GND)));

--A1L359 is led_ctr[20]~67 at LCCOMB_X35_Y1_N10
A1L359 = CARRY((!A1L356) # (!led_ctr[20]));


--A1L361 is led_ctr[21]~68 at LCCOMB_X35_Y1_N12
A1L361 = (led_ctr[21] & (A1L359 $ (GND))) # (!led_ctr[21] & (!A1L359 & VCC));

--A1L362 is led_ctr[21]~69 at LCCOMB_X35_Y1_N12
A1L362 = CARRY((led_ctr[21] & !A1L359));


--A1L364 is led_ctr[22]~70 at LCCOMB_X35_Y1_N14
A1L364 = (led_ctr[22] & (!A1L362)) # (!led_ctr[22] & ((A1L362) # (GND)));

--A1L365 is led_ctr[22]~71 at LCCOMB_X35_Y1_N14
A1L365 = CARRY((!A1L362) # (!led_ctr[22]));


--A1L367 is led_ctr[23]~72 at LCCOMB_X35_Y1_N16
A1L367 = (led_ctr[23] & (A1L365 $ (GND))) # (!led_ctr[23] & (!A1L365 & VCC));

--A1L368 is led_ctr[23]~73 at LCCOMB_X35_Y1_N16
A1L368 = CARRY((led_ctr[23] & !A1L365));


--A1L370 is led_ctr[24]~74 at LCCOMB_X35_Y1_N18
A1L370 = (led_ctr[24] & (!A1L368)) # (!led_ctr[24] & ((A1L368) # (GND)));

--A1L371 is led_ctr[24]~75 at LCCOMB_X35_Y1_N18
A1L371 = CARRY((!A1L368) # (!led_ctr[24]));


--A1L373 is led_ctr[25]~76 at LCCOMB_X35_Y1_N20
A1L373 = (led_ctr[25] & (A1L371 $ (GND))) # (!led_ctr[25] & (!A1L371 & VCC));

--A1L374 is led_ctr[25]~77 at LCCOMB_X35_Y1_N20
A1L374 = CARRY((led_ctr[25] & !A1L371));


--A1L376 is led_ctr[26]~78 at LCCOMB_X35_Y1_N22
A1L376 = (A1L378Q & (!A1L374)) # (!A1L378Q & ((A1L374) # (GND)));

--A1L377 is led_ctr[26]~79 at LCCOMB_X35_Y1_N22
A1L377 = CARRY((!A1L374) # (!A1L378Q));


--A1L380 is led_ctr[27]~80 at LCCOMB_X35_Y1_N24
A1L380 = (A1L382Q & (A1L377 $ (GND))) # (!A1L382Q & (!A1L377 & VCC));

--A1L381 is led_ctr[27]~81 at LCCOMB_X35_Y1_N24
A1L381 = CARRY((A1L382Q & !A1L377));


--A1L384 is led_ctr[28]~82 at LCCOMB_X35_Y1_N26
A1L384 = A1L386Q $ (A1L381);


--J1_wire_lvds_tx_pll_fbout is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_fbout at PLL_1
J1_wire_lvds_tx_pll_fbout = EQUATION NOT SUPPORTED;

--J1_fast_clock is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock at PLL_1
J1_fast_clock = EQUATION NOT SUPPORTED;

--J1_wire_lvds_tx_pll_clk[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_clk[1] at PLL_1
J1_wire_lvds_tx_pll_clk[1] = EQUATION NOT SUPPORTED;


--A1L1 is Add0~0 at LCCOMB_X31_Y28_N4
A1L1 = (rst_ctr[0] & (rst_ctr[1] $ (VCC))) # (!rst_ctr[0] & (rst_ctr[1] & VCC));

--A1L2 is Add0~1 at LCCOMB_X31_Y28_N4
A1L2 = CARRY((rst_ctr[0] & rst_ctr[1]));


--A1L3 is Add0~2 at LCCOMB_X31_Y28_N6
A1L3 = (rst_ctr[2] & (!A1L2)) # (!rst_ctr[2] & ((A1L2) # (GND)));

--A1L4 is Add0~3 at LCCOMB_X31_Y28_N6
A1L4 = CARRY((!A1L2) # (!rst_ctr[2]));


--A1L5 is Add0~4 at LCCOMB_X31_Y28_N8
A1L5 = (rst_ctr[3] & (A1L4 $ (GND))) # (!rst_ctr[3] & (!A1L4 & VCC));

--A1L6 is Add0~5 at LCCOMB_X31_Y28_N8
A1L6 = CARRY((rst_ctr[3] & !A1L4));


--A1L7 is Add0~6 at LCCOMB_X31_Y28_N10
A1L7 = (rst_ctr[4] & (!A1L6)) # (!rst_ctr[4] & ((A1L6) # (GND)));

--A1L8 is Add0~7 at LCCOMB_X31_Y28_N10
A1L8 = CARRY((!A1L6) # (!rst_ctr[4]));


--A1L9 is Add0~8 at LCCOMB_X31_Y28_N12
A1L9 = (rst_ctr[5] & (A1L8 $ (GND))) # (!rst_ctr[5] & (!A1L8 & VCC));

--A1L10 is Add0~9 at LCCOMB_X31_Y28_N12
A1L10 = CARRY((rst_ctr[5] & !A1L8));


--A1L11 is Add0~10 at LCCOMB_X31_Y28_N14
A1L11 = (rst_ctr[6] & (!A1L10)) # (!rst_ctr[6] & ((A1L10) # (GND)));

--A1L12 is Add0~11 at LCCOMB_X31_Y28_N14
A1L12 = CARRY((!A1L10) # (!rst_ctr[6]));


--A1L13 is Add0~12 at LCCOMB_X31_Y28_N16
A1L13 = (rst_ctr[7] & (A1L12 $ (GND))) # (!rst_ctr[7] & (!A1L12 & VCC));

--A1L14 is Add0~13 at LCCOMB_X31_Y28_N16
A1L14 = CARRY((rst_ctr[7] & !A1L12));


--A1L15 is Add0~14 at LCCOMB_X31_Y28_N18
A1L15 = (rst_ctr[8] & (!A1L14)) # (!rst_ctr[8] & ((A1L14) # (GND)));

--A1L16 is Add0~15 at LCCOMB_X31_Y28_N18
A1L16 = CARRY((!A1L14) # (!rst_ctr[8]));


--A1L17 is Add0~16 at LCCOMB_X31_Y28_N20
A1L17 = (rst_ctr[9] & (A1L16 $ (GND))) # (!rst_ctr[9] & (!A1L16 & VCC));

--A1L18 is Add0~17 at LCCOMB_X31_Y28_N20
A1L18 = CARRY((rst_ctr[9] & !A1L16));


--A1L19 is Add0~18 at LCCOMB_X31_Y28_N22
A1L19 = (rst_ctr[10] & (!A1L18)) # (!rst_ctr[10] & ((A1L18) # (GND)));

--A1L20 is Add0~19 at LCCOMB_X31_Y28_N22
A1L20 = CARRY((!A1L18) # (!rst_ctr[10]));


--A1L21 is Add0~20 at LCCOMB_X31_Y28_N24
A1L21 = (rst_ctr[11] & (A1L20 $ (GND))) # (!rst_ctr[11] & (!A1L20 & VCC));

--A1L22 is Add0~21 at LCCOMB_X31_Y28_N24
A1L22 = CARRY((rst_ctr[11] & !A1L20));


--A1L23 is Add0~22 at LCCOMB_X31_Y28_N26
A1L23 = A1L22;


--C1_qreg[6] is tmdsenc:hdmitmds[0].enc|qreg[6] at FF_X26_Y22_N17
--register power-up is low

C1_qreg[6] = DFFEAS(C1L58, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C2_qreg[0] is tmdsenc:hdmitmds[1].enc|qreg[0] at FF_X27_Y22_N9
--register power-up is low

C2_qreg[0] = DFFEAS(C2L61, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3_qreg[0] is tmdsenc:hdmitmds[2].enc|qreg[0] at FF_X22_Y22_N17
--register power-up is low

C3_qreg[0] = DFFEAS(C3L62, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[3] is tmdsenc:hdmitmds[2].enc|disparity[3] at FF_X22_Y23_N19
--register power-up is low

C3_disparity[3] = DFFEAS(C3L42, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[0] is tmdsenc:hdmitmds[2].enc|disparity[0] at FF_X22_Y23_N13
--register power-up is low

C3_disparity[0] = DFFEAS(C3L33, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[1] is tmdsenc:hdmitmds[2].enc|disparity[1] at FF_X22_Y23_N15
--register power-up is low

C3_disparity[1] = DFFEAS(C3L36, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[2] is tmdsenc:hdmitmds[2].enc|disparity[2] at FF_X22_Y23_N17
--register power-up is low

C3_disparity[2] = DFFEAS(C3L39, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[3] is tmdsenc:hdmitmds[0].enc|disparity[3] at FF_X28_Y18_N17
--register power-up is low

C1_disparity[3] = DFFEAS(C1L44, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[0] is tmdsenc:hdmitmds[0].enc|disparity[0] at FF_X28_Y18_N11
--register power-up is low

C1_disparity[0] = DFFEAS(C1L35, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[1] is tmdsenc:hdmitmds[0].enc|disparity[1] at FF_X28_Y18_N13
--register power-up is low

C1_disparity[1] = DFFEAS(C1L38, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[2] is tmdsenc:hdmitmds[0].enc|disparity[2] at FF_X28_Y18_N15
--register power-up is low

C1_disparity[2] = DFFEAS(C1L41, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C2_qreg[4] is tmdsenc:hdmitmds[1].enc|qreg[4] at FF_X26_Y22_N3
--register power-up is low

C2_qreg[4] = DFFEAS(C2L53, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C2_disparity[3] is tmdsenc:hdmitmds[1].enc|disparity[3] at FF_X28_Y22_N25
--register power-up is low

C2_disparity[3] = DFFEAS(C2L42, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[0] is tmdsenc:hdmitmds[1].enc|disparity[0] at FF_X28_Y22_N19
--register power-up is low

C2_disparity[0] = DFFEAS(C2L33, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[1] is tmdsenc:hdmitmds[1].enc|disparity[1] at FF_X28_Y22_N21
--register power-up is low

C2_disparity[1] = DFFEAS(C2L36, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[2] is tmdsenc:hdmitmds[1].enc|disparity[2] at FF_X28_Y22_N23
--register power-up is low

C2_disparity[2] = DFFEAS(C2L39, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3_qreg[4] is tmdsenc:hdmitmds[2].enc|qreg[4] at FF_X26_Y22_N13
--register power-up is low

C3_qreg[4] = DFFEAS(C3L53, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[1] is tmdsenc:hdmitmds[2].enc|qreg[1] at FF_X22_Y22_N3
--register power-up is low

C3_qreg[1] = DFFEAS(C3L64, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C1_qreg[0] is tmdsenc:hdmitmds[0].enc|qreg[0] at FF_X29_Y22_N1
--register power-up is low

C1_qreg[0] = DFFEAS(C1L66, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C3L32 is tmdsenc:hdmitmds[2].enc|disparity[0]~5 at LCCOMB_X22_Y23_N10
C3L32 = CARRY(C3L26);


--C3L33 is tmdsenc:hdmitmds[2].enc|disparity[0]~6 at LCCOMB_X22_Y23_N12
C3L33 = (C3_disparity[0] & ((C3L25 & (C3L32 & VCC)) # (!C3L25 & (!C3L32)))) # (!C3_disparity[0] & ((C3L25 & (!C3L32)) # (!C3L25 & ((C3L32) # (GND)))));

--C3L34 is tmdsenc:hdmitmds[2].enc|disparity[0]~7 at LCCOMB_X22_Y23_N12
C3L34 = CARRY((C3_disparity[0] & (!C3L25 & !C3L32)) # (!C3_disparity[0] & ((!C3L32) # (!C3L25))));


--C3L36 is tmdsenc:hdmitmds[2].enc|disparity[1]~8 at LCCOMB_X22_Y23_N14
C3L36 = ((C3L24 $ (C3_disparity[1] $ (!C3L34)))) # (GND);

--C3L37 is tmdsenc:hdmitmds[2].enc|disparity[1]~9 at LCCOMB_X22_Y23_N14
C3L37 = CARRY((C3L24 & ((C3_disparity[1]) # (!C3L34))) # (!C3L24 & (C3_disparity[1] & !C3L34)));


--C3L39 is tmdsenc:hdmitmds[2].enc|disparity[2]~10 at LCCOMB_X22_Y23_N16
C3L39 = (C3L22 & ((C3_disparity[2] & (C3L37 & VCC)) # (!C3_disparity[2] & (!C3L37)))) # (!C3L22 & ((C3_disparity[2] & (!C3L37)) # (!C3_disparity[2] & ((C3L37) # (GND)))));

--C3L40 is tmdsenc:hdmitmds[2].enc|disparity[2]~11 at LCCOMB_X22_Y23_N16
C3L40 = CARRY((C3L22 & (!C3_disparity[2] & !C3L37)) # (!C3L22 & ((!C3L37) # (!C3_disparity[2]))));


--C3L42 is tmdsenc:hdmitmds[2].enc|disparity[3]~12 at LCCOMB_X22_Y23_N18
C3L42 = C3_disparity[3] $ (C3L40 $ (!C3L20));


--L2_wire_counter_comb_bita_0combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_0combout[0] at LCCOMB_X24_Y24_N8
L2_wire_counter_comb_bita_0combout[0] = L2_counter_reg_bit[0] $ (((VCC) # (!J1_sync_dffe12a)));

--L2_wire_counter_comb_bita_0cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_0cout[0] at LCCOMB_X24_Y24_N8
L2_wire_counter_comb_bita_0cout[0] = CARRY(J1_sync_dffe12a $ (!L2_counter_reg_bit[0]));


--L2_wire_counter_comb_bita_1combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_1combout[0] at LCCOMB_X24_Y24_N10
L2_wire_counter_comb_bita_1combout[0] = (L2_wire_counter_comb_bita_0cout[0] & (L2_counter_reg_bit[1] $ (((J1_sync_dffe12a) # (VCC))))) # (!L2_wire_counter_comb_bita_0cout[0] & (((L2_counter_reg_bit[1]) # (GND))));

--L2_wire_counter_comb_bita_1cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_1cout[0] at LCCOMB_X24_Y24_N10
L2_wire_counter_comb_bita_1cout[0] = CARRY((J1_sync_dffe12a $ (L2_counter_reg_bit[1])) # (!L2_wire_counter_comb_bita_0cout[0]));


--L2_wire_counter_comb_bita_2combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2combout[0] at LCCOMB_X24_Y24_N12
L2_wire_counter_comb_bita_2combout[0] = (L2_wire_counter_comb_bita_1cout[0] & (((L2_counter_reg_bit[2] & VCC)))) # (!L2_wire_counter_comb_bita_1cout[0] & (L2_counter_reg_bit[2] $ (((VCC) # (!J1_sync_dffe12a)))));

--L2_wire_counter_comb_bita_2cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2cout[0] at LCCOMB_X24_Y24_N12
L2_wire_counter_comb_bita_2cout[0] = CARRY((!L2_wire_counter_comb_bita_1cout[0] & (J1_sync_dffe12a $ (!L2_counter_reg_bit[2]))));


--L2L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2cout[0]~0 at LCCOMB_X24_Y24_N14
L2L25 = L2_wire_counter_comb_bita_2cout[0];


--C1L34 is tmdsenc:hdmitmds[0].enc|disparity[0]~5 at LCCOMB_X28_Y18_N8
C1L34 = CARRY(C1L26);


--C1L35 is tmdsenc:hdmitmds[0].enc|disparity[0]~6 at LCCOMB_X28_Y18_N10
C1L35 = (C1_disparity[0] & ((C1L25 & (C1L34 & VCC)) # (!C1L25 & (!C1L34)))) # (!C1_disparity[0] & ((C1L25 & (!C1L34)) # (!C1L25 & ((C1L34) # (GND)))));

--C1L36 is tmdsenc:hdmitmds[0].enc|disparity[0]~7 at LCCOMB_X28_Y18_N10
C1L36 = CARRY((C1_disparity[0] & (!C1L25 & !C1L34)) # (!C1_disparity[0] & ((!C1L34) # (!C1L25))));


--C1L38 is tmdsenc:hdmitmds[0].enc|disparity[1]~8 at LCCOMB_X28_Y18_N12
C1L38 = ((C1_disparity[1] $ (C1L24 $ (!C1L36)))) # (GND);

--C1L39 is tmdsenc:hdmitmds[0].enc|disparity[1]~9 at LCCOMB_X28_Y18_N12
C1L39 = CARRY((C1_disparity[1] & ((C1L24) # (!C1L36))) # (!C1_disparity[1] & (C1L24 & !C1L36)));


--C1L41 is tmdsenc:hdmitmds[0].enc|disparity[2]~10 at LCCOMB_X28_Y18_N14
C1L41 = (C1L22 & ((C1_disparity[2] & (C1L39 & VCC)) # (!C1_disparity[2] & (!C1L39)))) # (!C1L22 & ((C1_disparity[2] & (!C1L39)) # (!C1_disparity[2] & ((C1L39) # (GND)))));

--C1L42 is tmdsenc:hdmitmds[0].enc|disparity[2]~11 at LCCOMB_X28_Y18_N14
C1L42 = CARRY((C1L22 & (!C1_disparity[2] & !C1L39)) # (!C1L22 & ((!C1L39) # (!C1_disparity[2]))));


--C1L44 is tmdsenc:hdmitmds[0].enc|disparity[3]~12 at LCCOMB_X28_Y18_N16
C1L44 = C1L20 $ (C1_disparity[3] $ (!C1L42));


--C2L32 is tmdsenc:hdmitmds[1].enc|disparity[0]~5 at LCCOMB_X28_Y22_N16
C2L32 = CARRY(C2L26);


--C2L33 is tmdsenc:hdmitmds[1].enc|disparity[0]~6 at LCCOMB_X28_Y22_N18
C2L33 = (C2_disparity[0] & ((C2L25 & (C2L32 & VCC)) # (!C2L25 & (!C2L32)))) # (!C2_disparity[0] & ((C2L25 & (!C2L32)) # (!C2L25 & ((C2L32) # (GND)))));

--C2L34 is tmdsenc:hdmitmds[1].enc|disparity[0]~7 at LCCOMB_X28_Y22_N18
C2L34 = CARRY((C2_disparity[0] & (!C2L25 & !C2L32)) # (!C2_disparity[0] & ((!C2L32) # (!C2L25))));


--C2L36 is tmdsenc:hdmitmds[1].enc|disparity[1]~8 at LCCOMB_X28_Y22_N20
C2L36 = ((C2L24 $ (C2_disparity[1] $ (!C2L34)))) # (GND);

--C2L37 is tmdsenc:hdmitmds[1].enc|disparity[1]~9 at LCCOMB_X28_Y22_N20
C2L37 = CARRY((C2L24 & ((C2_disparity[1]) # (!C2L34))) # (!C2L24 & (C2_disparity[1] & !C2L34)));


--C2L39 is tmdsenc:hdmitmds[1].enc|disparity[2]~10 at LCCOMB_X28_Y22_N22
C2L39 = (C2_disparity[2] & ((C2L22 & (C2L37 & VCC)) # (!C2L22 & (!C2L37)))) # (!C2_disparity[2] & ((C2L22 & (!C2L37)) # (!C2L22 & ((C2L37) # (GND)))));

--C2L40 is tmdsenc:hdmitmds[1].enc|disparity[2]~11 at LCCOMB_X28_Y22_N22
C2L40 = CARRY((C2_disparity[2] & (!C2L22 & !C2L37)) # (!C2_disparity[2] & ((!C2L37) # (!C2L22))));


--C2L42 is tmdsenc:hdmitmds[1].enc|disparity[3]~12 at LCCOMB_X28_Y22_N24
C2L42 = C2_disparity[3] $ (C2L40 $ (!C2L20));


--C1_qreg[4] is tmdsenc:hdmitmds[0].enc|qreg[4] at FF_X26_Y22_N15
--register power-up is low

C1_qreg[4] = DFFEAS(C1L55, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C1_qreg[1] is tmdsenc:hdmitmds[0].enc|qreg[1] at FF_X29_Y22_N11
--register power-up is low

C1_qreg[1] = DFFEAS(C1L68, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--C2_qreg[1] is tmdsenc:hdmitmds[1].enc|qreg[1] at FF_X27_Y22_N3
--register power-up is low

C2_qreg[1] = DFFEAS(C2L66, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  , !C1_denreg,  );


--L1_wire_counter_comb_bita_0combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_0combout[0] at LCCOMB_X24_Y24_N18
L1_wire_counter_comb_bita_0combout[0] = L1_counter_reg_bit[0] $ (((VCC) # (!J1_sync_dffe12a)));

--L1_wire_counter_comb_bita_0cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_0cout[0] at LCCOMB_X24_Y24_N18
L1_wire_counter_comb_bita_0cout[0] = CARRY(L1_counter_reg_bit[0] $ (!J1_sync_dffe12a));


--L1_wire_counter_comb_bita_1combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_1combout[0] at LCCOMB_X24_Y24_N20
L1_wire_counter_comb_bita_1combout[0] = (L1_wire_counter_comb_bita_0cout[0] & (L1_counter_reg_bit[1] $ (((J1_sync_dffe12a) # (VCC))))) # (!L1_wire_counter_comb_bita_0cout[0] & ((L1_counter_reg_bit[1]) # ((GND))));

--L1_wire_counter_comb_bita_1cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_1cout[0] at LCCOMB_X24_Y24_N20
L1_wire_counter_comb_bita_1cout[0] = CARRY((L1_counter_reg_bit[1] $ (J1_sync_dffe12a)) # (!L1_wire_counter_comb_bita_0cout[0]));


--L1_wire_counter_comb_bita_2combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2combout[0] at LCCOMB_X24_Y24_N22
L1_wire_counter_comb_bita_2combout[0] = (L1_wire_counter_comb_bita_1cout[0] & (((L1_counter_reg_bit[2] & VCC)))) # (!L1_wire_counter_comb_bita_1cout[0] & (L1_counter_reg_bit[2] $ (((VCC) # (!J1_sync_dffe12a)))));

--L1_wire_counter_comb_bita_2cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2cout[0] at LCCOMB_X24_Y24_N22
L1_wire_counter_comb_bita_2cout[0] = CARRY((!L1_wire_counter_comb_bita_1cout[0] & (J1_sync_dffe12a $ (!L1_counter_reg_bit[2]))));


--L1L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2cout[0]~0 at LCCOMB_X24_Y24_N24
L1L25 = L1_wire_counter_comb_bita_2cout[0];


--C2_qreg[2] is tmdsenc:hdmitmds[1].enc|qreg[2] at FF_X26_Y22_N25
--register power-up is low

C2_qreg[2] = DFFEAS(C2L50, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[2] is tmdsenc:hdmitmds[2].enc|qreg[2] at FF_X26_Y22_N11
--register power-up is low

C3_qreg[2] = DFFEAS(C3L50, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C2_qreg[6] is tmdsenc:hdmitmds[1].enc|qreg[6] at FF_X26_Y22_N21
--register power-up is low

C2_qreg[6] = DFFEAS(C2L56, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[6] is tmdsenc:hdmitmds[2].enc|qreg[6] at FF_X26_Y22_N7
--register power-up is low

C3_qreg[6] = DFFEAS(C3L56, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--C1_qreg[2] is tmdsenc:hdmitmds[0].enc|qreg[2] at FF_X26_Y22_N9
--register power-up is low

C1_qreg[2] = DFFEAS(C1L52, GLOBAL(T1L27), GLOBAL(A1L404),  ,  , VCC,  ,  , !C1_denreg);


--A1L118 is abc_rdy_x~output at IOOBUF_X3_Y29_N9
A1L118 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L120 is abc_resin_x~output at IOOBUF_X16_Y0_N30
A1L120 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L99 is abc_int80_x~output at IOOBUF_X1_Y29_N2
A1L99 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L101 is abc_int800_x~output at IOOBUF_X3_Y29_N16
A1L101 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L105 is abc_nmi_x~output at IOOBUF_X3_Y29_N30
A1L105 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L126 is abc_xm_x~output at IOOBUF_X0_Y26_N16
A1L126 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L67 is abc_d[0]~output at IOOBUF_X3_Y0_N30
A1L67 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L70 is abc_d[1]~output at IOOBUF_X7_Y0_N9
A1L70 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L73 is abc_d[2]~output at IOOBUF_X7_Y0_N23
A1L73 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L76 is abc_d[3]~output at IOOBUF_X5_Y0_N9
A1L76 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L79 is abc_d[4]~output at IOOBUF_X3_Y0_N16
A1L79 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L82 is abc_d[5]~output at IOOBUF_X3_Y0_N9
A1L82 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L85 is abc_d[6]~output at IOOBUF_X5_Y0_N2
A1L85 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L88 is abc_d[7]~output at IOOBUF_X7_Y0_N30
A1L88 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L278 is hdmi_sda~output at IOOBUF_X30_Y0_N9
A1L278 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L179 is exth_ha~output at IOOBUF_X30_Y0_N16
A1L179 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L182 is exth_hb~output at IOOBUF_X23_Y0_N9
A1L182 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L187 is exth_hd~output at IOOBUF_X26_Y0_N16
A1L187 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L190 is exth_he~output at IOOBUF_X26_Y0_N2
A1L190 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L193 is exth_hf~output at IOOBUF_X26_Y0_N9
A1L193 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L196 is exth_hg~output at IOOBUF_X35_Y0_N16
A1L196 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L484 is sr_dq[0]~output at IOOBUF_X32_Y29_N23
A1L484 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L487 is sr_dq[1]~output at IOOBUF_X32_Y29_N2
A1L487 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L490 is sr_dq[2]~output at IOOBUF_X39_Y29_N30
A1L490 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L493 is sr_dq[3]~output at IOOBUF_X37_Y29_N16
A1L493 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L496 is sr_dq[4]~output at IOOBUF_X30_Y29_N23
A1L496 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L499 is sr_dq[5]~output at IOOBUF_X30_Y29_N16
A1L499 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L502 is sr_dq[6]~output at IOOBUF_X26_Y29_N30
A1L502 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L505 is sr_dq[7]~output at IOOBUF_X26_Y29_N23
A1L505 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L508 is sr_dq[8]~output at IOOBUF_X5_Y29_N2
A1L508 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L511 is sr_dq[9]~output at IOOBUF_X7_Y29_N9
A1L511 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L514 is sr_dq[10]~output at IOOBUF_X5_Y29_N16
A1L514 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L517 is sr_dq[11]~output at IOOBUF_X3_Y29_N2
A1L517 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L520 is sr_dq[12]~output at IOOBUF_X7_Y29_N30
A1L520 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L523 is sr_dq[13]~output at IOOBUF_X5_Y29_N23
A1L523 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L526 is sr_dq[14]~output at IOOBUF_X11_Y29_N30
A1L526 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L529 is sr_dq[15]~output at IOOBUF_X3_Y29_N23
A1L529 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--A1L416 is sd_dat[0]~output at IOOBUF_X41_Y19_N9
A1L416 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L419 is sd_dat[1]~output at IOOBUF_X35_Y0_N23
A1L419 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L422 is sd_dat[2]~output at IOOBUF_X41_Y23_N2
A1L422 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L425 is sd_dat[3]~output at IOOBUF_X41_Y19_N16
A1L425 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L428 is spi_clk~output at IOOBUF_X14_Y0_N23
A1L428 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L437 is spi_miso~output at IOOBUF_X14_Y0_N16
A1L437 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L440 is spi_mosi~output at IOOBUF_X19_Y0_N9
A1L440 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L431 is spi_cs_esp_n~output at IOOBUF_X19_Y0_N2
A1L431 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L434 is spi_cs_flash_n~output at IOOBUF_X7_Y0_N16
A1L434 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L176 is esp_io0~output at IOOBUF_X19_Y0_N30
A1L176 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L173 is esp_int~output at IOOBUF_X21_Y0_N30
A1L173 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L286 is i2c_scl~output at IOOBUF_X41_Y27_N23
A1L286 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L289 is i2c_sda~output at IOOBUF_X41_Y27_N16
A1L289 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L210 is gpio[0]~output at IOOBUF_X16_Y0_N16
A1L210 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L213 is gpio[1]~output at IOOBUF_X30_Y0_N23
A1L213 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L216 is gpio[2]~output at IOOBUF_X16_Y0_N23
A1L216 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L219 is gpio[3]~output at IOOBUF_X26_Y0_N30
A1L219 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L222 is gpio[4]~output at IOOBUF_X16_Y0_N2
A1L222 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L225 is gpio[5]~output at IOOBUF_X16_Y0_N9
A1L225 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L275 is hdmi_scl~output at IOOBUF_X39_Y0_N23
A1L275 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L272 is hdmi_hpd~output at IOOBUF_X35_Y0_N2
A1L272 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--led_ctr[0] is led_ctr[0] at FF_X35_Y2_N1
--register power-up is low

led_ctr[0] = DFFEAS(A1L299, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--rst_n is rst_n at FF_X31_Y28_N1
--register power-up is low

rst_n = DFFEAS(A1L403, GLOBAL(T1L25), T1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[0] at FF_X23_Y23_N25
--register power-up is low

Q2_shift_reg[0] = DFFEAS(Q2L7, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q1_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[0] at FF_X26_Y21_N25
--register power-up is low

Q1_shift_reg[0] = DFFEAS(Q1L7, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q4_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[0] at FF_X26_Y21_N3
--register power-up is low

Q4_shift_reg[0] = DFFEAS(Q4L7, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q3_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[0] at FF_X24_Y22_N1
--register power-up is low

Q3_shift_reg[0] = DFFEAS(Q3L7, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q6_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[0] at FF_X23_Y22_N1
--register power-up is low

Q6_shift_reg[0] = DFFEAS(Q6L7, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q5_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[0] at FF_X26_Y23_N25
--register power-up is low

Q5_shift_reg[0] = DFFEAS(Q5L7, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[0] at FF_X35_Y17_N25
--register power-up is low

N2_shift_reg[0] = DFFEAS(N2L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[0] at FF_X35_Y17_N11
--register power-up is low

N1_shift_reg[0] = DFFEAS(N1L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--rst_ctr[11] is rst_ctr[11] at FF_X31_Y28_N25
--register power-up is low

rst_ctr[11] = DFFEAS(A1L21, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[10] is rst_ctr[10] at FF_X31_Y28_N23
--register power-up is low

rst_ctr[10] = DFFEAS(A1L19, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[9] is rst_ctr[9] at FF_X31_Y28_N21
--register power-up is low

rst_ctr[9] = DFFEAS(A1L17, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[8] is rst_ctr[8] at FF_X31_Y28_N19
--register power-up is low

rst_ctr[8] = DFFEAS(A1L15, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[7] is rst_ctr[7] at FF_X31_Y28_N17
--register power-up is low

rst_ctr[7] = DFFEAS(A1L13, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[6] is rst_ctr[6] at FF_X31_Y28_N15
--register power-up is low

rst_ctr[6] = DFFEAS(A1L11, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[5] is rst_ctr[5] at FF_X31_Y28_N13
--register power-up is low

rst_ctr[5] = DFFEAS(A1L9, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[4] is rst_ctr[4] at FF_X31_Y28_N11
--register power-up is low

rst_ctr[4] = DFFEAS(A1L7, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[3] is rst_ctr[3] at FF_X31_Y28_N9
--register power-up is low

rst_ctr[3] = DFFEAS(A1L5, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[2] is rst_ctr[2] at FF_X31_Y28_N7
--register power-up is low

rst_ctr[2] = DFFEAS(A1L3, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[0] is rst_ctr[0] at FF_X31_Y28_N3
--register power-up is low

rst_ctr[0] = DFFEAS(A1L390, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[1] is rst_ctr[1] at FF_X31_Y28_N5
--register power-up is low

rst_ctr[1] = DFFEAS(A1L1, GLOBAL(T1L25), T1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--A1L403 is rst_n~0 at LCCOMB_X31_Y28_N0
A1L403 = (A1L23) # (rst_n);


--J1_tx_reg[8] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8] at FF_X22_Y24_N9
--register power-up is low

J1_tx_reg[8] = DFFEAS(J1L113, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[1] at FF_X23_Y23_N27
--register power-up is low

Q2_shift_reg[1] = DFFEAS(Q2L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--J1_dffe11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11 at FF_X23_Y23_N29
--register power-up is low

J1_dffe11 = DFFEAS(J1L48, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q2L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~0 at LCCOMB_X23_Y23_N24
Q2L7 = (J1_dffe11 & ((J1_tx_reg[8]))) # (!J1_dffe11 & (Q2_shift_reg[1]));


--J1_tx_reg[9] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9] at FF_X26_Y22_N19
--register power-up is low

J1_tx_reg[9] = DFFEAS(J1L115, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q1_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[1] at FF_X26_Y21_N13
--register power-up is low

Q1_shift_reg[1] = DFFEAS(Q1L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q1L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~0 at LCCOMB_X26_Y21_N24
Q1L7 = (J1_dffe11 & ((J1_tx_reg[9]))) # (!J1_dffe11 & (Q1_shift_reg[1]));


--J1_tx_reg[18] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18] at FF_X26_Y21_N23
--register power-up is low

J1_tx_reg[18] = DFFEAS(J1L131, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q4_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[1] at FF_X23_Y22_N3
--register power-up is low

Q4_shift_reg[1] = DFFEAS(Q4L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q4L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~0 at LCCOMB_X26_Y21_N2
Q4L7 = (J1_dffe11 & (J1_tx_reg[18])) # (!J1_dffe11 & ((Q4_shift_reg[1])));


--J1_tx_reg[19] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19] at FF_X24_Y22_N3
--register power-up is low

J1_tx_reg[19] = DFFEAS(J1L133, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q3_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[1] at FF_X24_Y22_N5
--register power-up is low

Q3_shift_reg[1] = DFFEAS(Q3L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q3L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~0 at LCCOMB_X24_Y22_N0
Q3L7 = (J1_dffe11 & (J1_tx_reg[19])) # (!J1_dffe11 & ((Q3_shift_reg[1])));


--J1_tx_reg[28] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28] at FF_X23_Y22_N13
--register power-up is low

J1_tx_reg[28] = DFFEAS(J1L150, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q6_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[1] at FF_X23_Y22_N31
--register power-up is low

Q6_shift_reg[1] = DFFEAS(Q6L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q6L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~0 at LCCOMB_X23_Y22_N0
Q6L7 = (J1_dffe11 & (J1_tx_reg[28])) # (!J1_dffe11 & ((Q6_shift_reg[1])));


--J1_tx_reg[29] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29] at FF_X23_Y22_N25
--register power-up is low

J1_tx_reg[29] = DFFEAS(J1L152, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q5_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[1] at FF_X26_Y23_N27
--register power-up is low

Q5_shift_reg[1] = DFFEAS(Q5L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q5L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~0 at LCCOMB_X26_Y23_N24
Q5L7 = (J1_dffe11 & (J1_tx_reg[29])) # (!J1_dffe11 & ((Q5_shift_reg[1])));


--J1_dffe22 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22 at FF_X23_Y23_N7
--register power-up is low

J1_dffe22 = DFFEAS(J1L69, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[1] at FF_X35_Y17_N21
--register power-up is low

N2_shift_reg[1] = DFFEAS(N2L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~0 at LCCOMB_X35_Y17_N24
N2L9 = (J1_dffe22) # (N2_shift_reg[1]);


--N1_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[1] at FF_X35_Y17_N23
--register power-up is low

N1_shift_reg[1] = DFFEAS(N1L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~0 at LCCOMB_X35_Y17_N10
N1L9 = (J1_dffe22) # (N1_shift_reg[1]);


--C3_qreg[7] is tmdsenc:hdmitmds[2].enc|qreg[7] at FF_X22_Y22_N5
--register power-up is low

C3_qreg[7] = DFFEAS(C3L61, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6] at FF_X29_Y23_N9
--register power-up is low

J1_tx_reg[6] = DFFEAS(J1L109, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[2] at FF_X23_Y23_N9
--register power-up is low

Q2_shift_reg[2] = DFFEAS(Q2L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q2L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~1 at LCCOMB_X23_Y23_N26
Q2L8 = (J1_dffe11 & ((J1_tx_reg[6]))) # (!J1_dffe11 & (Q2_shift_reg[2]));


--J1_dffe7a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[2] at FF_X23_Y24_N1
--register power-up is low

J1_dffe7a[2] = DFFEAS(J1L38, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe3a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[0] at FF_X23_Y24_N11
--register power-up is low

J1_dffe3a[0] = DFFEAS(J1L9, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe7a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[0] at FF_X23_Y24_N13
--register power-up is low

J1_dffe7a[0] = DFFEAS( , GLOBAL(J1L71),  ,  , !J1_sync_dffe12a, J1_dffe5a[0],  ,  , VCC);


--J1_dffe3a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[2] at FF_X23_Y24_N23
--register power-up is low

J1_dffe3a[2] = DFFEAS(J1L13, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--J1L44 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~0 at LCCOMB_X23_Y24_N12
J1L44 = (J1_dffe3a[2] & (J1_dffe7a[2] & (J1_dffe7a[0] $ (!J1_dffe3a[0])))) # (!J1_dffe3a[2] & (!J1_dffe7a[2] & (J1_dffe7a[0] $ (!J1_dffe3a[0]))));


--J1_dffe8a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[2] at FF_X23_Y24_N9
--register power-up is low

J1_dffe8a[2] = DFFEAS( , GLOBAL(J1L71),  ,  , J1_sync_dffe12a, J1_dffe6a[2],  ,  , VCC);


--J1_dffe8a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[0] at FF_X23_Y24_N19
--register power-up is low

J1_dffe8a[0] = DFFEAS( , GLOBAL(J1L71),  ,  , J1_sync_dffe12a, J1_dffe6a[0],  ,  , VCC);


--J1_dffe4a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[0] at FF_X23_Y24_N29
--register power-up is low

J1_dffe4a[0] = DFFEAS(J1L16, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe4a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[2] at FF_X23_Y24_N7
--register power-up is low

J1_dffe4a[2] = DFFEAS(J1L20, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1L45 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~1 at LCCOMB_X23_Y24_N8
J1L45 = (J1_dffe4a[2] & (J1_dffe8a[2] & (J1_dffe8a[0] $ (!J1_dffe4a[0])))) # (!J1_dffe4a[2] & (!J1_dffe8a[2] & (J1_dffe8a[0] $ (!J1_dffe4a[0]))));


--J1_dffe8a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[1] at FF_X24_Y23_N7
--register power-up is low

J1_dffe8a[1] = DFFEAS( , GLOBAL(J1L71),  ,  , J1_sync_dffe12a, J1_dffe6a[1],  ,  , VCC);


--J1_dffe4a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[1] at FF_X24_Y23_N19
--register power-up is low

J1_dffe4a[1] = DFFEAS(J1L18, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_sync_dffe12a is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a at FF_X24_Y24_N19
--register power-up is low

J1_sync_dffe12a = DFFEAS( , GLOBAL(J1L155),  ,  ,  , J1L95,  ,  , VCC);


--J1L46 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~2 at LCCOMB_X24_Y23_N6
J1L46 = (!J1_sync_dffe12a & (J1_dffe8a[1] $ (!J1_dffe4a[1])));


--J1_dffe7a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[1] at FF_X24_Y23_N31
--register power-up is low

J1_dffe7a[1] = DFFEAS( , GLOBAL(J1L71),  ,  , !J1_sync_dffe12a, J1_dffe5a[1],  ,  , VCC);


--J1_dffe3a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[1] at FF_X24_Y23_N11
--register power-up is low

J1_dffe3a[1] = DFFEAS(J1L11, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--J1L47 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~3 at LCCOMB_X24_Y23_N30
J1L47 = (J1_sync_dffe12a & (J1_dffe3a[1] $ (!J1_dffe7a[1])));


--J1L48 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~4 at LCCOMB_X23_Y23_N28
J1L48 = (J1L47 & ((J1L44) # ((J1L45 & J1L46)))) # (!J1L47 & (J1L45 & ((J1L46))));


--J1_tx_reg[7] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7] at FF_X27_Y21_N25
--register power-up is low

J1_tx_reg[7] = DFFEAS(J1L111, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q1_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[2] at FF_X26_Y21_N9
--register power-up is low

Q1_shift_reg[2] = DFFEAS(Q1L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q1L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~1 at LCCOMB_X26_Y21_N12
Q1L8 = (J1_dffe11 & (J1_tx_reg[7])) # (!J1_dffe11 & ((Q1_shift_reg[2])));


--C1_qreg[3] is tmdsenc:hdmitmds[0].enc|qreg[3] at FF_X29_Y22_N21
--register power-up is low

C1_qreg[3] = DFFEAS(C1L63, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[16] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16] at FF_X23_Y22_N19
--register power-up is low

J1_tx_reg[16] = DFFEAS( , GLOBAL(J1L155),  ,  ,  , C2_qreg[4],  ,  , VCC);


--Q4_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[2] at FF_X24_Y22_N31
--register power-up is low

Q4_shift_reg[2] = DFFEAS(Q4L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q4L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~1 at LCCOMB_X23_Y22_N2
Q4L8 = (J1_dffe11 & (J1_tx_reg[16])) # (!J1_dffe11 & ((Q4_shift_reg[2])));


--C2_qreg[3] is tmdsenc:hdmitmds[1].enc|qreg[3] at FF_X27_Y22_N29
--register power-up is low

C2_qreg[3] = DFFEAS(C2L60, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[17] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17] at FF_X24_Y22_N17
--register power-up is low

J1_tx_reg[17] = DFFEAS(J1L129, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q3_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[2] at FF_X24_Y22_N27
--register power-up is low

Q3_shift_reg[2] = DFFEAS(Q3L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q3L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~1 at LCCOMB_X24_Y22_N4
Q3L8 = (J1_dffe11 & (J1_tx_reg[17])) # (!J1_dffe11 & ((Q3_shift_reg[2])));


--J1_tx_reg[26] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26] at FF_X23_Y22_N29
--register power-up is low

J1_tx_reg[26] = DFFEAS(J1L146, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q6_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[2] at FF_X23_Y22_N23
--register power-up is low

Q6_shift_reg[2] = DFFEAS(Q6L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q6L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~1 at LCCOMB_X23_Y22_N30
Q6L8 = (J1_dffe11 & (J1_tx_reg[26])) # (!J1_dffe11 & ((Q6_shift_reg[2])));


--J1_tx_reg[27] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27] at FF_X29_Y23_N27
--register power-up is low

J1_tx_reg[27] = DFFEAS(J1L148, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q5_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[2] at FF_X26_Y23_N5
--register power-up is low

Q5_shift_reg[2] = DFFEAS(Q5L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q5L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~1 at LCCOMB_X26_Y23_N26
Q5L8 = (J1_dffe11 & ((J1_tx_reg[27]))) # (!J1_dffe11 & (Q5_shift_reg[2]));


--J1_dffe18a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[2] at FF_X24_Y23_N29
--register power-up is low

J1_dffe18a[2] = DFFEAS( , GLOBAL(J1L71),  ,  , !J1_sync_dffe12a, J1_dffe16a[2],  ,  , VCC);


--J1_dffe14a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[0] at FF_X24_Y23_N21
--register power-up is low

J1_dffe14a[0] = DFFEAS( , GLOBAL(J1L71),  ,  , J1_sync_dffe12a, L1_counter_reg_bit[0],  ,  , VCC);


--J1_dffe18a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[0] at FF_X24_Y23_N17
--register power-up is low

J1_dffe18a[0] = DFFEAS(J1L63, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe14a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[2] at FF_X24_Y23_N27
--register power-up is low

J1_dffe14a[2] = DFFEAS(J1L54, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--J1L68 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22~0 at LCCOMB_X24_Y23_N28
J1L68 = (J1_dffe14a[2] & (J1_dffe18a[2] & (J1_dffe18a[0] $ (!J1_dffe14a[0])))) # (!J1_dffe14a[2] & (!J1_dffe18a[2] & (J1_dffe18a[0] $ (!J1_dffe14a[0]))));


--J1_dffe18a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[1] at FF_X24_Y23_N25
--register power-up is low

J1_dffe18a[1] = DFFEAS(J1L65, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe14a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[1] at FF_X24_Y23_N23
--register power-up is low

J1_dffe14a[1] = DFFEAS(J1L52, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--J1L69 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22~1 at LCCOMB_X23_Y23_N6
J1L69 = (J1_sync_dffe12a & (J1L68 & (J1_dffe18a[1] $ (!J1_dffe14a[1]))));


--N2_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[2] at FF_X35_Y17_N9
--register power-up is low

N2_shift_reg[2] = DFFEAS(N2L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~1 at LCCOMB_X35_Y17_N20
N2L10 = (J1_dffe22) # (N2_shift_reg[2]);


--N1_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[2] at FF_X35_Y17_N27
--register power-up is low

N1_shift_reg[2] = DFFEAS(N1L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~1 at LCCOMB_X35_Y17_N22
N1L10 = (J1_dffe22) # (N1_shift_reg[2]);


--C1_denreg is tmdsenc:hdmitmds[0].enc|denreg at FF_X27_Y22_N7
--register power-up is low

C1_denreg = DFFEAS(C1L30, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--dummydata[0] is dummydata[0] at FF_X21_Y22_N1
--register power-up is low

dummydata[0] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[23],  ,  , VCC);


--dummydata[23] is dummydata[23] at FF_X21_Y22_N23
--register power-up is low

dummydata[23] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[22],  ,  , VCC);


--dummydata[21] is dummydata[21] at FF_X21_Y22_N5
--register power-up is low

dummydata[21] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[20],  ,  , VCC);


--dummydata[22] is dummydata[22] at FF_X21_Y22_N13
--register power-up is low

dummydata[22] = DFFEAS(A1L169, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[19] is dummydata[19] at FF_X21_Y23_N25
--register power-up is low

dummydata[19] = DFFEAS(A1L164, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[20] is dummydata[20] at FF_X21_Y22_N11
--register power-up is low

dummydata[20] = DFFEAS(A1L166, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[17] is dummydata[17] at FF_X21_Y22_N7
--register power-up is low

dummydata[17] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[16],  ,  , VCC);


--dummydata[18] is dummydata[18] at FF_X21_Y22_N9
--register power-up is low

dummydata[18] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[17],  ,  , VCC);


--C3L4 is tmdsenc:hdmitmds[2].enc|Add4~2 at LCCOMB_X21_Y22_N20
C3L4 = dummydata[17] $ (dummydata[18] $ (dummydata[20] $ (!dummydata[19])));


--C3L5 is tmdsenc:hdmitmds[2].enc|Add4~3 at LCCOMB_X21_Y22_N14
C3L5 = dummydata[22] $ (dummydata[23] $ (dummydata[21] $ (C3L4)));


--C3L27 is tmdsenc:hdmitmds[2].enc|Equal0~0 at LCCOMB_X22_Y23_N24
C3L27 = (!C3_disparity[0] & (!C3_disparity[2] & (!C3_disparity[1] & !C3_disparity[3])));


--C3L1 is tmdsenc:hdmitmds[2].enc|Add2~0 at LCCOMB_X21_Y22_N4
C3L1 = dummydata[0] $ (dummydata[23] $ (dummydata[21] $ (!dummydata[22])));


--C3L6 is tmdsenc:hdmitmds[2].enc|Add4~4 at LCCOMB_X21_Y22_N6
C3L6 = dummydata[17] $ (dummydata[18]);


--C3L12 is tmdsenc:hdmitmds[2].enc|Add6~0 at LCCOMB_X21_Y22_N28
C3L12 = (C3L1 & (dummydata[20] $ (C3L6 $ (!dummydata[19]))));


--C3L10 is tmdsenc:hdmitmds[2].enc|Add5~0 at LCCOMB_X21_Y22_N16
C3L10 = (dummydata[20] & ((dummydata[18] & ((dummydata[19]) # (!dummydata[17]))) # (!dummydata[18] & ((dummydata[17]) # (!dummydata[19]))))) # (!dummydata[20] & ((dummydata[18] & ((dummydata[17]) # (!dummydata[19]))) # (!dummydata[18] & (dummydata[17] & !dummydata[19]))));


--C3L2 is tmdsenc:hdmitmds[2].enc|Add2~1 at LCCOMB_X21_Y22_N22
C3L2 = (dummydata[0] & ((dummydata[21] & ((!dummydata[22]) # (!dummydata[23]))) # (!dummydata[21] & (!dummydata[23] & !dummydata[22])))) # (!dummydata[0] & ((dummydata[21] & ((dummydata[23]) # (dummydata[22]))) # (!dummydata[21] & ((!dummydata[22]) # (!dummydata[23])))));


--C3L11 is tmdsenc:hdmitmds[2].enc|Add5~1 at LCCOMB_X21_Y22_N8
C3L11 = (dummydata[20] & (dummydata[17] & (dummydata[18] & !dummydata[19])));


--C3L3 is tmdsenc:hdmitmds[2].enc|Add2~2 at LCCOMB_X21_Y22_N0
C3L3 = (!dummydata[23] & (dummydata[21] & (!dummydata[0] & !dummydata[22])));


--C3L13 is tmdsenc:hdmitmds[2].enc|Add6~1 at LCCOMB_X21_Y22_N30
C3L13 = C3L11 $ (C3L3);


--C3L14 is tmdsenc:hdmitmds[2].enc|Add6~2 at LCCOMB_X21_Y22_N26
C3L14 = C3L13 $ (((C3L2 & ((C3L10) # (C3L12))) # (!C3L2 & (C3L10 & C3L12))));


--C3L15 is tmdsenc:hdmitmds[2].enc|Add6~3 at LCCOMB_X21_Y22_N2
C3L15 = dummydata[20] $ (C3L1 $ (C3L6 $ (!dummydata[19])));


--C3L16 is tmdsenc:hdmitmds[2].enc|Add6~4 at LCCOMB_X21_Y22_N24
C3L16 = C3L10 $ (C3L2 $ (C3L12));


--C3L28 is tmdsenc:hdmitmds[2].enc|always1~0 at LCCOMB_X22_Y23_N26
C3L28 = (C3L27) # ((!C3L16 & (!C3L15 & C3L14)));


--C3L44 is tmdsenc:hdmitmds[2].enc|dx[8]~0 at LCCOMB_X21_Y22_N18
C3L44 = (dummydata[17] & (C3L14 & ((C3L15) # (C3L16)))) # (!dummydata[17] & (((C3L14) # (!C3L16)) # (!C3L15)));


--C3L7 is tmdsenc:hdmitmds[2].enc|Add4~5 at LCCOMB_X22_Y22_N6
C3L7 = C3L14 $ (C3_disparity[3]);


--C3L60 is tmdsenc:hdmitmds[2].enc|qreg~0 at LCCOMB_X22_Y22_N24
C3L60 = C3L5 $ (((!C3L28 & (C3L44 $ (!C3L7)))));


--C3L61 is tmdsenc:hdmitmds[2].enc|qreg~1 at LCCOMB_X22_Y22_N4
C3L61 = (dummydata[0] $ (C3L60)) # (!C1_denreg);


--C1_qreg[7] is tmdsenc:hdmitmds[0].enc|qreg[7] at FF_X29_Y22_N7
--register power-up is low

C1_qreg[7] = DFFEAS(C1L65, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4] at FF_X27_Y23_N17
--register power-up is low

J1_tx_reg[4] = DFFEAS(J1L105, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[3] at FF_X23_Y23_N11
--register power-up is low

Q2_shift_reg[3] = DFFEAS(Q2L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~2 at LCCOMB_X23_Y23_N8
Q2L9 = (J1_dffe11 & ((J1_tx_reg[4]))) # (!J1_dffe11 & (Q2_shift_reg[3]));


--J1_dffe5a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[2] at FF_X23_Y24_N25
--register power-up is low

J1_dffe5a[2] = DFFEAS( , GLOBAL(J1L71),  ,  , J1_sync_dffe12a, J1_dffe3a[2],  ,  , VCC);


--L2_counter_reg_bit[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[0] at FF_X24_Y24_N17
--register power-up is low

L2_counter_reg_bit[0] = DFFEAS(L2L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--J1_dffe5a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[0] at FF_X23_Y24_N27
--register power-up is low

J1_dffe5a[0] = DFFEAS(J1L23, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--L2_counter_reg_bit[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[2] at FF_X24_Y24_N3
--register power-up is low

L2_counter_reg_bit[2] = DFFEAS(L2L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--J1_dffe6a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[2] at FF_X23_Y24_N5
--register power-up is low

J1_dffe6a[2] = DFFEAS(J1L33, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe6a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[0] at FF_X23_Y24_N31
--register power-up is low

J1_dffe6a[0] = DFFEAS(J1L29, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--J1_dffe6a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[1] at FF_X24_Y23_N9
--register power-up is low

J1_dffe6a[1] = DFFEAS(J1L31, GLOBAL(J1L71),  ,  , !J1_sync_dffe12a,  ,  ,  ,  );


--L2_counter_reg_bit[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[1] at FF_X24_Y24_N5
--register power-up is low

L2_counter_reg_bit[1] = DFFEAS(L2L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--J1_dffe5a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[1] at FF_X24_Y23_N15
--register power-up is low

J1_dffe5a[1] = DFFEAS(J1L25, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--dummydata[7] is dummydata[7] at FF_X28_Y21_N13
--register power-up is low

dummydata[7] = DFFEAS(A1L148, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[8] is dummydata[8] at FF_X28_Y21_N25
--register power-up is low

dummydata[8] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[7],  ,  , VCC);


--dummydata[5] is dummydata[5] at FF_X28_Y21_N23
--register power-up is low

dummydata[5] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[4],  ,  , VCC);


--dummydata[6] is dummydata[6] at FF_X28_Y21_N11
--register power-up is low

dummydata[6] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[5],  ,  , VCC);


--C1L1 is tmdsenc:hdmitmds[0].enc|Add2~0 at LCCOMB_X28_Y21_N10
C1L1 = dummydata[7] $ (dummydata[5] $ (dummydata[6] $ (dummydata[8])));


--dummydata[3] is dummydata[3] at FF_X28_Y21_N17
--register power-up is low

dummydata[3] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , A1L143,  ,  , VCC);


--dummydata[4] is dummydata[4] at FF_X28_Y21_N31
--register power-up is low

dummydata[4] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[3],  ,  , VCC);


--dummydata[1] is dummydata[1] at FF_X28_Y21_N27
--register power-up is low

dummydata[1] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[0],  ,  , VCC);


--dummydata[2] is dummydata[2] at FF_X28_Y21_N19
--register power-up is low

dummydata[2] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[1],  ,  , VCC);


--C1L4 is tmdsenc:hdmitmds[0].enc|Add4~2 at LCCOMB_X28_Y21_N26
C1L4 = dummydata[1] $ (dummydata[2]);


--C1L12 is tmdsenc:hdmitmds[0].enc|Add6~0 at LCCOMB_X28_Y21_N30
C1L12 = (C1L1 & (dummydata[3] $ (dummydata[4] $ (C1L4))));


--C1L10 is tmdsenc:hdmitmds[0].enc|Add5~0 at LCCOMB_X28_Y21_N28
C1L10 = (dummydata[1] & ((dummydata[4] & ((dummydata[3]) # (!dummydata[2]))) # (!dummydata[4] & (dummydata[3] & !dummydata[2])))) # (!dummydata[1] & ((dummydata[4] & ((dummydata[2]) # (!dummydata[3]))) # (!dummydata[4] & ((dummydata[3]) # (!dummydata[2])))));


--C1L2 is tmdsenc:hdmitmds[0].enc|Add2~1 at LCCOMB_X28_Y21_N22
C1L2 = (dummydata[7] & ((dummydata[8] & (dummydata[5] & dummydata[6])) # (!dummydata[8] & ((dummydata[5]) # (dummydata[6]))))) # (!dummydata[7] & ((dummydata[8] & ((dummydata[5]) # (dummydata[6]))) # (!dummydata[8] & ((!dummydata[6]) # (!dummydata[5])))));


--C1L11 is tmdsenc:hdmitmds[0].enc|Add5~1 at LCCOMB_X28_Y21_N18
C1L11 = (!dummydata[1] & (dummydata[3] & (!dummydata[2] & dummydata[4])));


--C1L3 is tmdsenc:hdmitmds[0].enc|Add2~2 at LCCOMB_X28_Y21_N24
C1L3 = (!dummydata[7] & (dummydata[5] & (!dummydata[8] & dummydata[6])));


--C1L13 is tmdsenc:hdmitmds[0].enc|Add6~1 at LCCOMB_X28_Y21_N16
C1L13 = C1L11 $ (C1L3);


--C1L14 is tmdsenc:hdmitmds[0].enc|Add6~2 at LCCOMB_X28_Y21_N8
C1L14 = C1L13 $ (((C1L2 & ((C1L12) # (C1L10))) # (!C1L2 & (C1L12 & C1L10))));


--C1L15 is tmdsenc:hdmitmds[0].enc|Add6~3 at LCCOMB_X28_Y21_N6
C1L15 = C1L1 $ (dummydata[3] $ (dummydata[4] $ (C1L4)));


--C1L16 is tmdsenc:hdmitmds[0].enc|Add6~4 at LCCOMB_X28_Y21_N4
C1L16 = C1L2 $ (C1L12 $ (C1L10));


--C1L46 is tmdsenc:hdmitmds[0].enc|dx[8]~0 at LCCOMB_X28_Y18_N0
C1L46 = (C1L14 & ((dummydata[1]) # ((C1L16) # (C1L15)))) # (!C1L14 & (dummydata[1] & ((!C1L15) # (!C1L16))));


--C1L27 is tmdsenc:hdmitmds[0].enc|Equal0~0 at LCCOMB_X28_Y18_N2
C1L27 = (!C1_disparity[1] & (!C1_disparity[3] & (!C1_disparity[2] & !C1_disparity[0])));


--C1L28 is tmdsenc:hdmitmds[0].enc|always1~0 at LCCOMB_X28_Y18_N4
C1L28 = (C1L27) # ((C1L14 & (!C1L16 & !C1L15)));


--C1L5 is tmdsenc:hdmitmds[0].enc|Add4~3 at LCCOMB_X28_Y21_N14
C1L5 = dummydata[1] $ (dummydata[4] $ (dummydata[3] $ (dummydata[2])));


--C1L6 is tmdsenc:hdmitmds[0].enc|Add4~4 at LCCOMB_X28_Y21_N20
C1L6 = dummydata[5] $ (dummydata[7] $ (C1L5 $ (!dummydata[6])));


--C1L7 is tmdsenc:hdmitmds[0].enc|Add4~5 at LCCOMB_X29_Y22_N8
C1L7 = C1_disparity[3] $ (C1L14);


--C1L62 is tmdsenc:hdmitmds[0].enc|qreg~0 at LCCOMB_X29_Y22_N18
C1L62 = C1L6 $ (((C1L28 & (!C1L46)) # (!C1L28 & ((C1L7)))));


--C2_qreg[7] is tmdsenc:hdmitmds[1].enc|qreg[7] at FF_X27_Y22_N17
--register power-up is low

C2_qreg[7] = DFFEAS(C2L63, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[5] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5] at FF_X26_Y21_N27
--register power-up is low

J1_tx_reg[5] = DFFEAS(J1L107, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q1_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[3] at FF_X26_Y21_N5
--register power-up is low

Q1_shift_reg[3] = DFFEAS(Q1L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~2 at LCCOMB_X26_Y21_N8
Q1L9 = (J1_dffe11 & (J1_tx_reg[5])) # (!J1_dffe11 & ((Q1_shift_reg[3])));


--C1L63 is tmdsenc:hdmitmds[0].enc|qreg~1 at LCCOMB_X29_Y22_N20
C1L63 = (C1L5 $ (((C1L28) # (C1L9)))) # (!C1_denreg);


--J1_tx_reg[14] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14] at FF_X23_Y22_N17
--register power-up is low

J1_tx_reg[14] = DFFEAS(J1L124, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q4_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[3] at FF_X24_Y22_N13
--register power-up is low

Q4_shift_reg[3] = DFFEAS(Q4L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q4L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~2 at LCCOMB_X24_Y22_N30
Q4L9 = (J1_dffe11 & ((J1_tx_reg[14]))) # (!J1_dffe11 & (Q4_shift_reg[3]));


--dummydata[11] is dummydata[11] at FF_X28_Y23_N19
--register power-up is low

dummydata[11] = DFFEAS(A1L154, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[12] is dummydata[12] at FF_X28_Y23_N29
--register power-up is low

dummydata[12] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[11],  ,  , VCC);


--dummydata[9] is dummydata[9] at FF_X28_Y23_N1
--register power-up is low

dummydata[9] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[8],  ,  , VCC);


--dummydata[10] is dummydata[10] at FF_X28_Y23_N31
--register power-up is low

dummydata[10] = DFFEAS(A1L152, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--C2L4 is tmdsenc:hdmitmds[1].enc|Add4~2 at LCCOMB_X28_Y23_N14
C2L4 = dummydata[10] $ (dummydata[12] $ (dummydata[9] $ (!dummydata[11])));


--C2L27 is tmdsenc:hdmitmds[1].enc|Equal0~0 at LCCOMB_X28_Y22_N0
C2L27 = (!C2_disparity[0] & (!C2_disparity[1] & (!C2_disparity[2] & !C2_disparity[3])));


--dummydata[15] is dummydata[15] at FF_X28_Y23_N25
--register power-up is low

dummydata[15] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[14],  ,  , VCC);


--dummydata[16] is dummydata[16] at FF_X28_Y23_N11
--register power-up is low

dummydata[16] = DFFEAS(A1L160, GLOBAL(T1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[13] is dummydata[13] at FF_X28_Y23_N3
--register power-up is low

dummydata[13] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[12],  ,  , VCC);


--dummydata[14] is dummydata[14] at FF_X28_Y23_N13
--register power-up is low

dummydata[14] = DFFEAS( , GLOBAL(T1L27),  ,  ,  , dummydata[13],  ,  , VCC);


--C2L1 is tmdsenc:hdmitmds[1].enc|Add2~0 at LCCOMB_X28_Y23_N12
C2L1 = dummydata[13] $ (dummydata[15] $ (dummydata[14] $ (!dummydata[16])));


--C2L5 is tmdsenc:hdmitmds[1].enc|Add4~3 at LCCOMB_X28_Y23_N4
C2L5 = dummydata[9] $ (!dummydata[10]);


--C2L12 is tmdsenc:hdmitmds[1].enc|Add6~0 at LCCOMB_X28_Y23_N22
C2L12 = (C2L1 & (dummydata[12] $ (C2L5 $ (dummydata[11]))));


--C2L10 is tmdsenc:hdmitmds[1].enc|Add5~0 at LCCOMB_X28_Y23_N28
C2L10 = (dummydata[11] & ((dummydata[10] & ((!dummydata[9]) # (!dummydata[12]))) # (!dummydata[10] & (!dummydata[12] & !dummydata[9])))) # (!dummydata[11] & ((dummydata[10] & ((dummydata[12]) # (dummydata[9]))) # (!dummydata[10] & ((!dummydata[9]) # (!dummydata[12])))));


--C2L2 is tmdsenc:hdmitmds[1].enc|Add2~1 at LCCOMB_X28_Y23_N2
C2L2 = (dummydata[14] & ((dummydata[15] & (!dummydata[13] & dummydata[16])) # (!dummydata[15] & ((dummydata[16]) # (!dummydata[13]))))) # (!dummydata[14] & ((dummydata[15] & ((dummydata[16]) # (!dummydata[13]))) # (!dummydata[15] & ((dummydata[13]) # (!dummydata[16])))));


--C2L11 is tmdsenc:hdmitmds[1].enc|Add5~1 at LCCOMB_X28_Y23_N0
C2L11 = (dummydata[10] & (!dummydata[12] & (!dummydata[9] & !dummydata[11])));


--C2L3 is tmdsenc:hdmitmds[1].enc|Add2~2 at LCCOMB_X28_Y23_N24
C2L3 = (!dummydata[14] & (dummydata[16] & (!dummydata[15] & !dummydata[13])));


--C2L13 is tmdsenc:hdmitmds[1].enc|Add6~1 at LCCOMB_X28_Y23_N6
C2L13 = C2L3 $ (C2L11);


--C2L14 is tmdsenc:hdmitmds[1].enc|Add6~2 at LCCOMB_X28_Y23_N20
C2L14 = C2L13 $ (((C2L12 & ((C2L2) # (C2L10))) # (!C2L12 & (C2L2 & C2L10))));


--C2L15 is tmdsenc:hdmitmds[1].enc|Add6~3 at LCCOMB_X28_Y23_N8
C2L15 = C2L1 $ (dummydata[12] $ (C2L5 $ (dummydata[11])));


--C2L16 is tmdsenc:hdmitmds[1].enc|Add6~4 at LCCOMB_X28_Y23_N16
C2L16 = C2L10 $ (C2L2 $ (C2L12));


--C2L28 is tmdsenc:hdmitmds[1].enc|always1~0 at LCCOMB_X28_Y22_N10
C2L28 = (C2L27) # ((C2L14 & (!C2L15 & !C2L16)));


--C2L44 is tmdsenc:hdmitmds[1].enc|dx[8]~0 at LCCOMB_X28_Y22_N12
C2L44 = (C2L14 & ((C2L16) # ((dummydata[9]) # (C2L15)))) # (!C2L14 & (dummydata[9] & ((!C2L15) # (!C2L16))));


--C2L6 is tmdsenc:hdmitmds[1].enc|Add4~4 at LCCOMB_X27_Y22_N10
C2L6 = C2L14 $ (C2_disparity[3]);


--C2L60 is tmdsenc:hdmitmds[1].enc|qreg~0 at LCCOMB_X27_Y22_N28
C2L60 = (C2L4 $ (((C2L9) # (C2L28)))) # (!C1_denreg);


--J1_tx_reg[15] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15] at FF_X24_Y22_N7
--register power-up is low

J1_tx_reg[15] = DFFEAS(J1L126, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q3_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[3] at FF_X24_Y22_N25
--register power-up is low

Q3_shift_reg[3] = DFFEAS(Q3L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q3L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~2 at LCCOMB_X24_Y22_N26
Q3L9 = (J1_dffe11 & ((J1_tx_reg[15]))) # (!J1_dffe11 & (Q3_shift_reg[3]));


--C2L61 is tmdsenc:hdmitmds[1].enc|qreg~1 at LCCOMB_X27_Y22_N8
C2L61 = dummydata[9] $ (((C2L28 & ((C2L44))) # (!C2L28 & (!C2L6))));


--J1_tx_reg[24] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24] at FF_X23_Y22_N11
--register power-up is low

J1_tx_reg[24] = DFFEAS( , GLOBAL(J1L155),  ,  ,  , C1_qreg[1],  ,  , VCC);


--Q6_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[3] at FF_X23_Y22_N5
--register power-up is low

Q6_shift_reg[3] = DFFEAS(Q6L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q6L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~2 at LCCOMB_X23_Y22_N22
Q6L9 = (J1_dffe11 & (J1_tx_reg[24])) # (!J1_dffe11 & ((Q6_shift_reg[3])));


--C3L62 is tmdsenc:hdmitmds[2].enc|qreg~2 at LCCOMB_X22_Y22_N16
C3L62 = dummydata[17] $ (((C3L28 & ((!C3L44))) # (!C3L28 & (C3L7))));


--J1_tx_reg[25] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25] at FF_X26_Y22_N5
--register power-up is low

J1_tx_reg[25] = DFFEAS(J1L144, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q5_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[3] at FF_X26_Y23_N15
--register power-up is low

Q5_shift_reg[3] = DFFEAS(Q5L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q5L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~2 at LCCOMB_X26_Y23_N4
Q5L9 = (J1_dffe11 & (J1_tx_reg[25])) # (!J1_dffe11 & ((Q5_shift_reg[3])));


--J1_dffe16a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[2] at FF_X24_Y23_N5
--register power-up is low

J1_dffe16a[2] = DFFEAS( , GLOBAL(J1L71),  ,  , J1_sync_dffe12a, J1_dffe14a[2],  ,  , VCC);


--L1_counter_reg_bit[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[0] at FF_X24_Y24_N7
--register power-up is low

L1_counter_reg_bit[0] = DFFEAS(L1L9, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--J1_dffe16a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[0] at FF_X24_Y23_N13
--register power-up is low

J1_dffe16a[0] = DFFEAS(J1L57, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--L1_counter_reg_bit[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[2] at FF_X24_Y24_N1
--register power-up is low

L1_counter_reg_bit[2] = DFFEAS(L1L10, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--J1_dffe16a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[1] at FF_X23_Y23_N13
--register power-up is low

J1_dffe16a[1] = DFFEAS(J1L59, GLOBAL(J1L71),  ,  , J1_sync_dffe12a,  ,  ,  ,  );


--L1_counter_reg_bit[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[1] at FF_X24_Y24_N27
--register power-up is low

L1_counter_reg_bit[1] = DFFEAS(L1L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[3] at FF_X35_Y17_N29
--register power-up is low

N2_shift_reg[3] = DFFEAS(N2L12, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~2 at LCCOMB_X35_Y17_N8
N2L11 = (!J1_dffe22 & N2_shift_reg[3]);


--N1_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[3] at FF_X35_Y17_N31
--register power-up is low

N1_shift_reg[3] = DFFEAS(N1L12, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~2 at LCCOMB_X35_Y17_N26
N1L11 = (J1_dffe22) # (N1_shift_reg[3]);


--C3L17 is tmdsenc:hdmitmds[2].enc|Add8~4 at LCCOMB_X22_Y23_N28
C3L17 = (!dummydata[17] & (!C3L15 & !C3L16));


--C3L18 is tmdsenc:hdmitmds[2].enc|Add8~5 at LCCOMB_X22_Y23_N6
C3L18 = (C3L16 & ((C3L14) # ((C3L15) # (!dummydata[17]))));


--C3L19 is tmdsenc:hdmitmds[2].enc|Add8~6 at LCCOMB_X22_Y23_N8
C3L19 = (C3_disparity[3]) # ((C3L14 & ((C3L17))) # (!C3L14 & (C3L18)));


--C3L20 is tmdsenc:hdmitmds[2].enc|Add8~7 at LCCOMB_X22_Y23_N20
C3L20 = C3L14 $ (((C3L28 & ((C3L44))) # (!C3L28 & (C3L19))));


--C3L21 is tmdsenc:hdmitmds[2].enc|Add8~8 at LCCOMB_X22_Y23_N22
C3L21 = (!C3L28 & ((C3L17) # ((!C3L18 & !C3L7))));


--C3L22 is tmdsenc:hdmitmds[2].enc|Add8~9 at LCCOMB_X22_Y23_N0
C3L22 = C3L14 $ (((C3L21) # ((C3L44 & C3L28))));


--C3L23 is tmdsenc:hdmitmds[2].enc|Add8~10 at LCCOMB_X22_Y23_N2
C3L23 = (C3L28) # ((!C3L15 & (C3L14 $ (C3_disparity[3]))));


--C3L24 is tmdsenc:hdmitmds[2].enc|Add8~11 at LCCOMB_X22_Y23_N4
C3L24 = C3L16 $ (((C3L44 & (!C3L23)) # (!C3L44 & ((C3L23) # (C3L15)))));


--C1L64 is tmdsenc:hdmitmds[0].enc|qreg~2 at LCCOMB_X29_Y22_N28
C1L64 = C1L6 $ (((!C1L28 & (C1L46 $ (!C1L7)))));


--C1L65 is tmdsenc:hdmitmds[0].enc|qreg~3 at LCCOMB_X29_Y22_N6
C1L65 = (dummydata[8] $ (C1L64)) # (!C1_denreg);


--C2_qreg[8] is tmdsenc:hdmitmds[1].enc|qreg[8] at FF_X27_Y22_N21
--register power-up is low

C2_qreg[8] = DFFEAS(C2L65, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2] at FF_X23_Y22_N15
--register power-up is low

J1_tx_reg[2] = DFFEAS(J1L102, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[4] at FF_X23_Y23_N23
--register power-up is low

Q2_shift_reg[4] = DFFEAS(Q2L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~3 at LCCOMB_X23_Y23_N10
Q2L10 = (J1_dffe11 & (J1_tx_reg[2])) # (!J1_dffe11 & ((Q2_shift_reg[4])));


--L2L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|cout_actual~0 at LCCOMB_X24_Y24_N28
L2L12 = (J1_sync_dffe12a & (L2_counter_reg_bit[2] & (!L2_counter_reg_bit[1] & !L2_counter_reg_bit[0])));


--L2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~0 at LCCOMB_X24_Y24_N16
L2L9 = (!L2L12 & (L2_wire_counter_comb_bita_0combout[0] & !L2L25));


--L2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~1 at LCCOMB_X24_Y24_N2
L2L10 = (L2L25 & (((!J1_sync_dffe12a)))) # (!L2L25 & (L2_wire_counter_comb_bita_2combout[0] & (!L2L12)));


--L2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~2 at LCCOMB_X24_Y24_N4
L2L11 = (L2_wire_counter_comb_bita_1combout[0] & (!L2L12 & !L2L25));


--C1L17 is tmdsenc:hdmitmds[0].enc|Add8~4 at LCCOMB_X28_Y18_N6
C1L17 = (dummydata[1] & (!C1L16 & !C1L15));


--C1L18 is tmdsenc:hdmitmds[0].enc|Add8~5 at LCCOMB_X28_Y18_N18
C1L18 = (C1L16 & ((C1L14) # ((dummydata[1]) # (C1L15))));


--C1L19 is tmdsenc:hdmitmds[0].enc|Add8~6 at LCCOMB_X28_Y18_N28
C1L19 = (C1_disparity[3]) # ((C1L14 & (C1L17)) # (!C1L14 & ((C1L18))));


--C1L20 is tmdsenc:hdmitmds[0].enc|Add8~7 at LCCOMB_X28_Y18_N22
C1L20 = C1L14 $ (((C1L28 & ((C1L46))) # (!C1L28 & (C1L19))));


--C1L21 is tmdsenc:hdmitmds[0].enc|Add8~8 at LCCOMB_X28_Y18_N24
C1L21 = (!C1L28 & ((C1L17) # ((!C1L7 & !C1L18))));


--C1L22 is tmdsenc:hdmitmds[0].enc|Add8~9 at LCCOMB_X28_Y18_N26
C1L22 = C1L14 $ (((C1L21) # ((C1L28 & C1L46))));


--C1L23 is tmdsenc:hdmitmds[0].enc|Add8~10 at LCCOMB_X29_Y22_N14
C1L23 = (C1L28) # ((!C1L15 & (C1_disparity[3] $ (C1L14))));


--C1L24 is tmdsenc:hdmitmds[0].enc|Add8~11 at LCCOMB_X29_Y22_N16
C1L24 = C1L16 $ (((C1L46 & (!C1L23)) # (!C1L46 & ((C1L23) # (C1L15)))));


--C2L7 is tmdsenc:hdmitmds[1].enc|Add4~5 at LCCOMB_X28_Y23_N26
C2L7 = dummydata[13] $ (dummydata[15] $ (dummydata[14] $ (!C2L4)));


--C2L62 is tmdsenc:hdmitmds[1].enc|qreg~2 at LCCOMB_X27_Y22_N30
C2L62 = C2L7 $ (((!C2L28 & (C2L6 $ (!C2L44)))));


--C2L63 is tmdsenc:hdmitmds[1].enc|qreg~3 at LCCOMB_X27_Y22_N16
C2L63 = (C2L62 $ (!dummydata[16])) # (!C1_denreg);


--C3_qreg[8] is tmdsenc:hdmitmds[2].enc|qreg[8] at FF_X22_Y22_N27
--register power-up is low

C3_qreg[8] = DFFEAS(C3L65, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3] at FF_X26_Y21_N7
--register power-up is low

J1_tx_reg[3] = DFFEAS( , GLOBAL(J1L155),  ,  ,  , C1_qreg[8],  ,  , VCC);


--Q1_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[4] at FF_X26_Y21_N17
--register power-up is low

Q1_shift_reg[4] = DFFEAS(Q1L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~3 at LCCOMB_X26_Y21_N4
Q1L10 = (J1_dffe11 & ((J1_tx_reg[3]))) # (!J1_dffe11 & (Q1_shift_reg[4]));


--C2L45 is tmdsenc:hdmitmds[1].enc|dx~1 at LCCOMB_X28_Y20_N0
C2L45 = C2L4 $ (!dummydata[13]);


--C2L64 is tmdsenc:hdmitmds[1].enc|qreg~4 at LCCOMB_X27_Y22_N0
C2L64 = C2L45 $ (((C2L28 & ((!C2L44))) # (!C2L28 & (C2L6))));


--C3_qreg[5] is tmdsenc:hdmitmds[2].enc|qreg[5] at FF_X22_Y22_N13
--register power-up is low

C3_qreg[5] = DFFEAS(C3L67, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[12] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12] at FF_X24_Y22_N11
--register power-up is low

J1_tx_reg[12] = DFFEAS(J1L120, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q4_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[4] at FF_X24_Y22_N29
--register power-up is low

Q4_shift_reg[4] = DFFEAS(Q4L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q4L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~3 at LCCOMB_X24_Y22_N12
Q4L10 = (J1_dffe11 & (J1_tx_reg[12])) # (!J1_dffe11 & ((Q4_shift_reg[4])));


--C2L17 is tmdsenc:hdmitmds[1].enc|Add8~4 at LCCOMB_X28_Y22_N6
C2L17 = (dummydata[9] & (!C2L16 & !C2L15));


--C2L18 is tmdsenc:hdmitmds[1].enc|Add8~5 at LCCOMB_X28_Y22_N8
C2L18 = (C2L16 & ((C2L14) # ((dummydata[9]) # (C2L15))));


--C2L19 is tmdsenc:hdmitmds[1].enc|Add8~6 at LCCOMB_X28_Y22_N2
C2L19 = (C2_disparity[3]) # ((C2L14 & (C2L17)) # (!C2L14 & ((C2L18))));


--C2L20 is tmdsenc:hdmitmds[1].enc|Add8~7 at LCCOMB_X28_Y22_N28
C2L20 = C2L14 $ (((C2L28 & ((C2L44))) # (!C2L28 & (C2L19))));


--C2L21 is tmdsenc:hdmitmds[1].enc|Add8~8 at LCCOMB_X27_Y22_N26
C2L21 = (!C2L28 & ((C2L17) # ((!C2L6 & !C2L18))));


--C2L22 is tmdsenc:hdmitmds[1].enc|Add8~9 at LCCOMB_X27_Y22_N4
C2L22 = C2L14 $ (((C2L21) # ((C2L44 & C2L28))));


--C2L23 is tmdsenc:hdmitmds[1].enc|Add8~10 at LCCOMB_X28_Y22_N14
C2L23 = (C2L28) # ((!C2L15 & (C2L14 $ (C2_disparity[3]))));


--C2L24 is tmdsenc:hdmitmds[1].enc|Add8~11 at LCCOMB_X28_Y22_N26
C2L24 = C2L16 $ (((C2L44 & (!C2L23)) # (!C2L44 & ((C2L23) # (C2L15)))));


--C3L45 is tmdsenc:hdmitmds[2].enc|dx~1 at LCCOMB_X22_Y22_N22
C3L45 = dummydata[21] $ (C3L4);


--C3L63 is tmdsenc:hdmitmds[2].enc|qreg~3 at LCCOMB_X22_Y22_N0
C3L63 = C3L45 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--J1_tx_reg[13] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13] at FF_X24_Y22_N23
--register power-up is low

J1_tx_reg[13] = DFFEAS(J1L122, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q3_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[4] at FF_X24_Y22_N9
--register power-up is low

Q3_shift_reg[4] = DFFEAS(Q3L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q3L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~3 at LCCOMB_X24_Y22_N24
Q3L10 = (J1_dffe11 & (J1_tx_reg[13])) # (!J1_dffe11 & ((Q3_shift_reg[4])));


--C3L64 is tmdsenc:hdmitmds[2].enc|qreg~4 at LCCOMB_X22_Y22_N2
C3L64 = C3L6 $ (((!C3L28 & (C3L44 $ (!C3L7)))));


--J1_tx_reg[22] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22] at FF_X23_Y22_N9
--register power-up is low

J1_tx_reg[22] = DFFEAS(J1L139, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q6_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[4] at FF_X23_Y22_N27
--register power-up is low

Q6_shift_reg[4] = DFFEAS(Q6L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q6L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~3 at LCCOMB_X23_Y22_N4
Q6L10 = (J1_dffe11 & (J1_tx_reg[22])) # (!J1_dffe11 & ((Q6_shift_reg[4])));


--C1L66 is tmdsenc:hdmitmds[0].enc|qreg~4 at LCCOMB_X29_Y22_N0
C1L66 = dummydata[1] $ (((C1L28 & (C1L46)) # (!C1L28 & ((!C1L7)))));


--J1_tx_reg[23] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23] at FF_X26_Y22_N23
--register power-up is low

J1_tx_reg[23] = DFFEAS(J1L141, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q5_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[4] at FF_X26_Y23_N9
--register power-up is low

Q5_shift_reg[4] = DFFEAS(Q5L11, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--Q5L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~3 at LCCOMB_X26_Y23_N14
Q5L10 = (J1_dffe11 & (J1_tx_reg[23])) # (!J1_dffe11 & ((Q5_shift_reg[4])));


--L1L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|cout_actual~0 at LCCOMB_X24_Y24_N30
L1L12 = (J1_sync_dffe12a & (L1_counter_reg_bit[2] & (!L1_counter_reg_bit[1] & !L1_counter_reg_bit[0])));


--L1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~0 at LCCOMB_X24_Y24_N6
L1L9 = (!L1L12 & (!L1L25 & L1_wire_counter_comb_bita_0combout[0]));


--L1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~1 at LCCOMB_X24_Y24_N0
L1L10 = (L1L25 & (((!J1_sync_dffe12a)))) # (!L1L25 & (!L1L12 & (L1_wire_counter_comb_bita_2combout[0])));


--L1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~2 at LCCOMB_X24_Y24_N26
L1L11 = (!L1L12 & (!L1L25 & L1_wire_counter_comb_bita_1combout[0]));


--N2_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[4] at FF_X35_Y17_N17
--register power-up is low

N2_shift_reg[4] = DFFEAS(N2L13, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~3 at LCCOMB_X35_Y17_N28
N2L12 = (!J1_dffe22 & N2_shift_reg[4]);


--N1_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[4] at FF_X35_Y17_N19
--register power-up is low

N1_shift_reg[4] = DFFEAS(N1L13, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~3 at LCCOMB_X35_Y17_N30
N1L12 = (!J1_dffe22 & N1_shift_reg[4]);


--C2L65 is tmdsenc:hdmitmds[1].enc|qreg~5 at LCCOMB_X27_Y22_N20
C2L65 = (C2L44) # (!C1_denreg);


--C3_qreg[9] is tmdsenc:hdmitmds[2].enc|qreg[9] at FF_X22_Y22_N19
--register power-up is low

C3_qreg[9] = DFFEAS(C3L68, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0] at FF_X26_Y22_N1
--register power-up is low

J1_tx_reg[0] = DFFEAS(J1L98, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~4 at LCCOMB_X23_Y23_N22
Q2L11 = (J1_dffe11 & J1_tx_reg[0]);


--C3L65 is tmdsenc:hdmitmds[2].enc|qreg~5 at LCCOMB_X22_Y22_N26
C3L65 = (C3L44) # (!C1_denreg);


--C1_qreg[8] is tmdsenc:hdmitmds[0].enc|qreg[8] at FF_X29_Y22_N3
--register power-up is low

C1_qreg[8] = DFFEAS(C1L69, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1] at FF_X26_Y22_N27
--register power-up is low

J1_tx_reg[1] = DFFEAS(J1L100, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~4 at LCCOMB_X26_Y21_N16
Q1L11 = (J1_dffe11 & J1_tx_reg[1]);


--C3L66 is tmdsenc:hdmitmds[2].enc|qreg~6 at LCCOMB_X22_Y22_N28
C3L66 = C3L4 $ (dummydata[21] $ (!dummydata[22]));


--C3L67 is tmdsenc:hdmitmds[2].enc|qreg~7 at LCCOMB_X22_Y22_N12
C3L67 = (C3L66 $ (((C3L9) # (C3L28)))) # (!C1_denreg);


--C1_qreg[5] is tmdsenc:hdmitmds[0].enc|qreg[5] at FF_X29_Y22_N13
--register power-up is low

C1_qreg[5] = DFFEAS(C1L71, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[10] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10] at FF_X24_Y22_N19
--register power-up is low

J1_tx_reg[10] = DFFEAS(J1L117, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q4L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~4 at LCCOMB_X24_Y22_N28
Q4L11 = (J1_dffe11 & J1_tx_reg[10]);


--C1L47 is tmdsenc:hdmitmds[0].enc|dx~1 at LCCOMB_X29_Y22_N22
C1L47 = dummydata[5] $ (C1L5);


--C1L67 is tmdsenc:hdmitmds[0].enc|qreg~5 at LCCOMB_X29_Y22_N24
C1L67 = C1L47 $ (((C1L28 & (!C1L46)) # (!C1L28 & ((C1L7)))));


--C2_qreg[5] is tmdsenc:hdmitmds[1].enc|qreg[5] at FF_X27_Y22_N23
--register power-up is low

C2_qreg[5] = DFFEAS(C2L68, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1_tx_reg[11] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11] at FF_X24_Y22_N21
--register power-up is low

J1_tx_reg[11] = DFFEAS( , GLOBAL(J1L155),  ,  ,  , C3_qreg[6],  ,  , VCC);


--Q3L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~4 at LCCOMB_X24_Y22_N8
Q3L11 = (J1_dffe11 & J1_tx_reg[11]);


--C1L68 is tmdsenc:hdmitmds[0].enc|qreg~6 at LCCOMB_X29_Y22_N10
C1L68 = C1L4 $ (((!C1L28 & (C1L46 $ (!C1L7)))));


--J1_tx_reg[20] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20] at FF_X23_Y22_N21
--register power-up is low

J1_tx_reg[20] = DFFEAS(J1L135, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q6L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~4 at LCCOMB_X23_Y22_N26
Q6L11 = (J1_dffe11 & J1_tx_reg[20]);


--C2L66 is tmdsenc:hdmitmds[1].enc|qreg~6 at LCCOMB_X27_Y22_N2
C2L66 = C2L5 $ (((!C2L28 & (C2L6 $ (!C2L44)))));


--J1_tx_reg[21] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21] at FF_X26_Y22_N29
--register power-up is low

J1_tx_reg[21] = DFFEAS(J1L137, GLOBAL(J1L155),  ,  ,  ,  ,  ,  ,  );


--Q5L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~4 at LCCOMB_X26_Y23_N8
Q5L11 = (J1_dffe11 & J1_tx_reg[21]);


--N1_shift_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[6] at FF_X35_Y17_N5
--register power-up is low

N1_shift_reg[6] = DFFEAS(N1L14, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N2L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~4 at LCCOMB_X35_Y17_N16
N2L13 = (!J1_dffe22 & N1_shift_reg[6]);


--N1_shift_reg[5] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[5] at FF_X35_Y17_N15
--register power-up is low

N1_shift_reg[5] = DFFEAS(N1L15, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~4 at LCCOMB_X35_Y17_N18
N1L13 = (!J1_dffe22 & N1_shift_reg[5]);


--C3L68 is tmdsenc:hdmitmds[2].enc|qreg~8 at LCCOMB_X22_Y22_N18
C3L68 = (C1_denreg & ((C3L28 & ((C3L44))) # (!C3L28 & (!C3L7))));


--C1_qreg[9] is tmdsenc:hdmitmds[0].enc|qreg[9] at FF_X29_Y22_N27
--register power-up is low

C1_qreg[9] = DFFEAS(C1L72, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--C1L69 is tmdsenc:hdmitmds[0].enc|qreg~7 at LCCOMB_X29_Y22_N2
C1L69 = (C1L46) # (!C1_denreg);


--C2_qreg[9] is tmdsenc:hdmitmds[1].enc|qreg[9] at FF_X27_Y22_N25
--register power-up is low

C2_qreg[9] = DFFEAS(C2L70, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--C1L70 is tmdsenc:hdmitmds[0].enc|qreg~8 at LCCOMB_X28_Y21_N0
C1L70 = dummydata[6] $ (dummydata[5] $ (C1L5));


--C1L71 is tmdsenc:hdmitmds[0].enc|qreg~9 at LCCOMB_X29_Y22_N12
C1L71 = (C1L70 $ (((C1L28) # (C1L9)))) # (!C1_denreg);


--C2L67 is tmdsenc:hdmitmds[1].enc|qreg~7 at LCCOMB_X28_Y20_N2
C2L67 = dummydata[14] $ (C2L4 $ (dummydata[13]));


--C2L68 is tmdsenc:hdmitmds[1].enc|qreg~8 at LCCOMB_X27_Y22_N22
C2L68 = (C2L67 $ (((C2L9) # (C2L28)))) # (!C1_denreg);


--C2L8 is tmdsenc:hdmitmds[1].enc|Add4~6 at LCCOMB_X27_Y23_N10
C2L8 = dummydata[11] $ (dummydata[9] $ (dummydata[10]));


--C2L69 is tmdsenc:hdmitmds[1].enc|qreg~9 at LCCOMB_X27_Y22_N18
C2L69 = C2L8 $ (((C2L28 & ((!C2L44))) # (!C2L28 & (C2L6))));


--C3_qreg[3] is tmdsenc:hdmitmds[2].enc|qreg[3] at FF_X22_Y22_N15
--register power-up is low

C3_qreg[3] = DFFEAS(C3L71, GLOBAL(T1L27), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--C3L8 is tmdsenc:hdmitmds[2].enc|Add4~6 at LCCOMB_X21_Y23_N26
C3L8 = dummydata[18] $ (dummydata[17] $ (!dummydata[19]));


--C3L69 is tmdsenc:hdmitmds[2].enc|qreg~9 at LCCOMB_X22_Y22_N8
C3L69 = C3L8 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--N2_shift_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6] at FF_X35_Y17_N1
--register power-up is low

N2_shift_reg[6] = DFFEAS(N2L8, GLOBAL(J1L71),  ,  ,  ,  ,  ,  ,  );


--N1L14 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~5 at LCCOMB_X35_Y17_N4
N1L14 = (J1_dffe22) # (N2_shift_reg[6]);


--N1L15 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~6 at LCCOMB_X35_Y17_N14
N1L15 = (J1_dffe22) # (N1_shift_reg[6]);


--C1L72 is tmdsenc:hdmitmds[0].enc|qreg~10 at LCCOMB_X29_Y22_N26
C1L72 = (C1_denreg & ((C1L28 & ((C1L46))) # (!C1L28 & (!C1L7))));


--C2L70 is tmdsenc:hdmitmds[1].enc|qreg~10 at LCCOMB_X27_Y22_N24
C2L70 = (C1_denreg & ((C2L28 & (C2L44)) # (!C2L28 & ((!C2L6)))));


--C2L71 is tmdsenc:hdmitmds[1].enc|qreg~11 at LCCOMB_X27_Y22_N12
C2L71 = C2L7 $ (((C2L28 & ((!C2L44))) # (!C2L28 & (C2L6))));


--C3L70 is tmdsenc:hdmitmds[2].enc|qreg~10 at LCCOMB_X22_Y22_N10
C3L70 = C3L5 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--C3L71 is tmdsenc:hdmitmds[2].enc|qreg~11 at LCCOMB_X22_Y22_N14
C3L71 = (C3L4 $ (((C3L9) # (C3L28)))) # (!C1_denreg);


--C1L8 is tmdsenc:hdmitmds[0].enc|Add4~6 at LCCOMB_X28_Y21_N2
C1L8 = dummydata[3] $ (dummydata[1] $ (dummydata[2]));


--C1L73 is tmdsenc:hdmitmds[0].enc|qreg~11 at LCCOMB_X29_Y22_N4
C1L73 = C1L8 $ (((C1L28 & (!C1L46)) # (!C1L28 & ((C1L7)))));


--C1L9 is tmdsenc:hdmitmds[0].enc|Add4~7 at LCCOMB_X29_Y22_N30
C1L9 = C1_disparity[3] $ (C1L46 $ (C1L14));


--C2L9 is tmdsenc:hdmitmds[1].enc|Add4~7 at LCCOMB_X27_Y22_N14
C2L9 = C2L44 $ (C2L14 $ (C2_disparity[3]));


--C3L25 is tmdsenc:hdmitmds[2].enc|Add8~12 at LCCOMB_X22_Y23_N30
C3L25 = (C3L15 & ((C3L14) # ((!dummydata[17] & !C3L16)))) # (!C3L15 & (dummydata[17] & ((!C3L16) # (!C3L14))));


--C3L26 is tmdsenc:hdmitmds[2].enc|Add8~13 at LCCOMB_X22_Y22_N20
C3L26 = (C3L28 & (((!C3L44)))) # (!C3L28 & (C3_disparity[3] $ (((C3L14)))));


--C1L25 is tmdsenc:hdmitmds[0].enc|Add8~12 at LCCOMB_X28_Y18_N20
C1L25 = (C1L15 & ((C1L14) # ((dummydata[1] & !C1L16)))) # (!C1L15 & (!dummydata[1] & ((!C1L16) # (!C1L14))));


--C1L26 is tmdsenc:hdmitmds[0].enc|Add8~13 at LCCOMB_X28_Y18_N30
C1L26 = (C1L28 & (((!C1L46)))) # (!C1L28 & (C1L14 $ (((C1_disparity[3])))));


--C2L25 is tmdsenc:hdmitmds[1].enc|Add8~12 at LCCOMB_X28_Y22_N4
C2L25 = (C2L15 & ((C2L14) # ((!C2L16 & dummydata[9])))) # (!C2L15 & (!dummydata[9] & ((!C2L16) # (!C2L14))));


--C2L26 is tmdsenc:hdmitmds[1].enc|Add8~13 at LCCOMB_X28_Y22_N30
C2L26 = (C2L28 & (((!C2L44)))) # (!C2L28 & (C2_disparity[3] $ ((C2L14))));


--C3L9 is tmdsenc:hdmitmds[2].enc|Add4~7 at LCCOMB_X22_Y22_N30
C3L9 = C3L14 $ (C3_disparity[3] $ (C3L44));


--A1L299 is led_ctr[0]~84 at LCCOMB_X35_Y2_N0
A1L299 = !led_ctr[0];


--A1L390 is rst_ctr[0]~0 at LCCOMB_X31_Y28_N2
A1L390 = !rst_ctr[0];


--J1L113 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]~0 at LCCOMB_X22_Y24_N8
J1L113 = !C3_qreg[7];


--J1L131 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]~1 at LCCOMB_X26_Y21_N22
J1L131 = !C1_qreg[3];


--J1L133 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]~2 at LCCOMB_X24_Y22_N2
J1L133 = !C2_qreg[3];


--J1L109 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]~3 at LCCOMB_X29_Y23_N8
J1L109 = !C1_qreg[7];


--J1L95 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a~0 at LCCOMB_X23_Y24_N18
J1L95 = !J1_sync_dffe12a;


--J1L111 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]~4 at LCCOMB_X27_Y21_N24
J1L111 = !C2_qreg[7];


--A1L169 is dummydata[22]~0 at LCCOMB_X21_Y22_N12
A1L169 = !dummydata[21];


--A1L164 is dummydata[19]~1 at LCCOMB_X21_Y23_N24
A1L164 = !dummydata[18];


--A1L166 is dummydata[20]~2 at LCCOMB_X21_Y22_N10
A1L166 = !dummydata[19];


--A1L148 is dummydata[7]~3 at LCCOMB_X28_Y21_N12
A1L148 = !dummydata[6];


--A1L143 is dummydata[3]~4 at LCCOMB_X27_Y21_N26
A1L143 = !dummydata[2];


--J1L124 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]~5 at LCCOMB_X23_Y22_N16
J1L124 = !C3_qreg[5];


--A1L154 is dummydata[11]~5 at LCCOMB_X28_Y23_N18
A1L154 = !dummydata[10];


--A1L152 is dummydata[10]~6 at LCCOMB_X28_Y23_N30
A1L152 = !dummydata[9];


--A1L160 is dummydata[16]~7 at LCCOMB_X28_Y23_N10
A1L160 = !dummydata[15];


--J1L102 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]~6 at LCCOMB_X23_Y22_N14
J1L102 = !C3_qreg[9];


--J1L120 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]~7 at LCCOMB_X24_Y22_N10
J1L120 = !C1_qreg[5];


--J1L122 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]~8 at LCCOMB_X24_Y22_N22
J1L122 = !C2_qreg[5];


--J1L98 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]~9 at LCCOMB_X26_Y22_N0
J1L98 = !C1_qreg[9];


--J1L100 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]~10 at LCCOMB_X26_Y22_N26
J1L100 = !C2_qreg[9];


--J1L135 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]~11 at LCCOMB_X23_Y22_N20
J1L135 = !C3_qreg[3];


--T1_remap_decoy_le3a_0 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_0 at LCCOMB_X40_Y28_N6
T1_remap_decoy_le3a_0 = LCELL(GND);


--T1_remap_decoy_le3a_1 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_1 at LCCOMB_X40_Y28_N24
T1_remap_decoy_le3a_1 = LCELL(GND);


--T1_remap_decoy_le3a_2 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_2 at LCCOMB_X40_Y28_N10
T1_remap_decoy_le3a_2 = LCELL(GND);


--A1L549 is ~GND at LCCOMB_X40_Y28_N12
A1L549 = GND;



--abc_clk is abc_clk at PIN_T8
abc_clk = INPUT();



--abc_a[0] is abc_a[0] at PIN_A8
abc_a[0] = INPUT();



--abc_a[1] is abc_a[1] at PIN_B8
abc_a[1] = INPUT();



--abc_a[2] is abc_a[2] at PIN_A9
abc_a[2] = INPUT();



--abc_a[3] is abc_a[3] at PIN_D1
abc_a[3] = INPUT();



--abc_a[4] is abc_a[4] at PIN_G5
abc_a[4] = INPUT();



--abc_a[5] is abc_a[5] at PIN_F3
abc_a[5] = INPUT();



--abc_a[6] is abc_a[6] at PIN_E1
abc_a[6] = INPUT();



--abc_a[7] is abc_a[7] at PIN_F1
abc_a[7] = INPUT();



--abc_a[8] is abc_a[8] at PIN_G1
abc_a[8] = INPUT();



--abc_a[9] is abc_a[9] at PIN_J1
abc_a[9] = INPUT();



--abc_a[10] is abc_a[10] at PIN_L4
abc_a[10] = INPUT();



--abc_a[11] is abc_a[11] at PIN_K1
abc_a[11] = INPUT();



--abc_a[12] is abc_a[12] at PIN_L1
abc_a[12] = INPUT();



--abc_a[13] is abc_a[13] at PIN_M1
abc_a[13] = INPUT();



--abc_a[14] is abc_a[14] at PIN_N2
abc_a[14] = INPUT();



--abc_a[15] is abc_a[15] at PIN_N1
abc_a[15] = INPUT();


--A1L92 is abc_d_oe~output at IOOBUF_X14_Y0_N2
A1L92 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_d_oe is abc_d_oe at PIN_T5
abc_d_oe = OUTPUT();



--abc_rst_n is abc_rst_n at PIN_P2
abc_rst_n = INPUT();



--abc_cs_n is abc_cs_n at PIN_F2
abc_cs_n = INPUT();



--abc_out_n[0] is abc_out_n[0] at PIN_G2
abc_out_n[0] = INPUT();



--abc_out_n[1] is abc_out_n[1] at PIN_J2
abc_out_n[1] = INPUT();



--abc_out_n[2] is abc_out_n[2] at PIN_K5
abc_out_n[2] = INPUT();



--abc_out_n[3] is abc_out_n[3] at PIN_L3
abc_out_n[3] = INPUT();



--abc_out_n[4] is abc_out_n[4] at PIN_K2
abc_out_n[4] = INPUT();



--abc_inp_n[0] is abc_inp_n[0] at PIN_L2
abc_inp_n[0] = INPUT();



--abc_inp_n[1] is abc_inp_n[1] at PIN_M2
abc_inp_n[1] = INPUT();



--abc_xmemfl_n is abc_xmemfl_n at PIN_N3
abc_xmemfl_n = INPUT();



--abc_xmemw800_n is abc_xmemw800_n at PIN_P1
abc_xmemw800_n = INPUT();



--abc_xmemw80_n is abc_xmemw80_n at PIN_R1
abc_xmemw80_n = INPUT();



--abc_xinpstb_n is abc_xinpstb_n at PIN_T12
abc_xinpstb_n = INPUT();



--abc_xoutpstb_n is abc_xoutpstb_n at PIN_L10
abc_xoutpstb_n = INPUT();


--abc_rdy_x is abc_rdy_x at PIN_B4
abc_rdy_x = OUTPUT();


--abc_resin_x is abc_resin_x at PIN_R6
abc_resin_x = OUTPUT();


--abc_int80_x is abc_int80_x at PIN_B3
abc_int80_x = OUTPUT();


--abc_int800_x is abc_int800_x at PIN_A2
abc_int800_x = OUTPUT();


--abc_nmi_x is abc_nmi_x at PIN_A3
abc_nmi_x = OUTPUT();


--abc_xm_x is abc_xm_x at PIN_B1
abc_xm_x = OUTPUT();


--A1L103 is abc_master~output at IOOBUF_X26_Y0_N23
A1L103 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_master is abc_master at PIN_T10
abc_master = OUTPUT();


--A1L59 is abc_a_oe~output at IOOBUF_X0_Y25_N2
A1L59 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_a_oe is abc_a_oe at PIN_C2
abc_a_oe = OUTPUT();


--A1L90 is abc_d_ce_n~output at IOOBUF_X14_Y0_N9
A1L90 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_d_ce_n is abc_d_ce_n at PIN_R5
abc_d_ce_n = OUTPUT();



--exth_hc is exth_hc at PIN_T9
exth_hc = INPUT();



--exth_hh is exth_hh at PIN_R8
exth_hh = INPUT();


--A1L478 is sr_clk~output at IOOBUF_X1_Y29_N30
A1L478 = OUTPUT_BUFFER.O(.I(GLOBAL(T1L23)), , , , , , , , , , , , , , , , , );


--sr_clk is sr_clk at PIN_D3
sr_clk = OUTPUT();


--A1L476 is sr_cke~output at IOOBUF_X14_Y29_N30
A1L476 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_cke is sr_cke at PIN_F8
sr_cke = OUTPUT();


--A1L470 is sr_ba[0]~output at IOOBUF_X28_Y29_N9
A1L470 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_ba[0] is sr_ba[0] at PIN_A13
sr_ba[0] = OUTPUT();


--A1L472 is sr_ba[1]~output at IOOBUF_X37_Y29_N23
A1L472 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_ba[1] is sr_ba[1] at PIN_B13
sr_ba[1] = OUTPUT();


--A1L443 is sr_a[0]~output at IOOBUF_X35_Y29_N2
A1L443 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[0] is sr_a[0] at PIN_A14
sr_a[0] = OUTPUT();


--A1L445 is sr_a[1]~output at IOOBUF_X35_Y29_N9
A1L445 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[1] is sr_a[1] at PIN_B14
sr_a[1] = OUTPUT();


--A1L447 is sr_a[2]~output at IOOBUF_X39_Y29_N9
A1L447 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[2] is sr_a[2] at PIN_D14
sr_a[2] = OUTPUT();


--A1L449 is sr_a[3]~output at IOOBUF_X28_Y29_N16
A1L449 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[3] is sr_a[3] at PIN_A15
sr_a[3] = OUTPUT();


--A1L451 is sr_a[4]~output at IOOBUF_X23_Y29_N2
A1L451 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[4] is sr_a[4] at PIN_C9
sr_a[4] = OUTPUT();


--A1L453 is sr_a[5]~output at IOOBUF_X23_Y29_N9
A1L453 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[5] is sr_a[5] at PIN_D9
sr_a[5] = OUTPUT();


--A1L455 is sr_a[6]~output at IOOBUF_X14_Y29_N23
A1L455 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[6] is sr_a[6] at PIN_E8
sr_a[6] = OUTPUT();


--A1L457 is sr_a[7]~output at IOOBUF_X11_Y29_N2
A1L457 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[7] is sr_a[7] at PIN_A7
sr_a[7] = OUTPUT();


--A1L459 is sr_a[8]~output at IOOBUF_X11_Y29_N9
A1L459 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[8] is sr_a[8] at PIN_B7
sr_a[8] = OUTPUT();


--A1L461 is sr_a[9]~output at IOOBUF_X9_Y29_N2
A1L461 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[9] is sr_a[9] at PIN_A6
sr_a[9] = OUTPUT();


--A1L463 is sr_a[10]~output at IOOBUF_X39_Y29_N2
A1L463 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[10] is sr_a[10] at PIN_C14
sr_a[10] = OUTPUT();


--A1L465 is sr_a[11]~output at IOOBUF_X14_Y29_N2
A1L465 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[11] is sr_a[11] at PIN_C8
sr_a[11] = OUTPUT();


--A1L467 is sr_a[12]~output at IOOBUF_X9_Y29_N9
A1L467 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[12] is sr_a[12] at PIN_B6
sr_a[12] = OUTPUT();


--A1L532 is sr_dqm[0]~output at IOOBUF_X32_Y29_N9
A1L532 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sr_dqm[0] is sr_dqm[0] at PIN_E10
sr_dqm[0] = OUTPUT();


--A1L534 is sr_dqm[1]~output at IOOBUF_X14_Y29_N9
A1L534 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sr_dqm[1] is sr_dqm[1] at PIN_D8
sr_dqm[1] = OUTPUT();


--A1L480 is sr_cs_n~output at IOOBUF_X37_Y29_N2
A1L480 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sr_cs_n is sr_cs_n at PIN_D12
sr_cs_n = OUTPUT();


--A1L538 is sr_we_n~output at IOOBUF_X26_Y29_N16
A1L538 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sr_we_n is sr_we_n at PIN_F9
sr_we_n = OUTPUT();


--A1L474 is sr_cas_n~output at IOOBUF_X21_Y29_N9
A1L474 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sr_cas_n is sr_cas_n at PIN_E9
sr_cas_n = OUTPUT();


--A1L536 is sr_ras_n~output at IOOBUF_X32_Y29_N30
A1L536 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sr_ras_n is sr_ras_n at PIN_B12
sr_ras_n = OUTPUT();


--A1L410 is sd_clk~output at IOOBUF_X41_Y18_N16
A1L410 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sd_clk is sd_clk at PIN_G15
sd_clk = OUTPUT();


--A1L412 is sd_cmd~output at IOOBUF_X41_Y18_N23
A1L412 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sd_cmd is sd_cmd at PIN_G16
sd_cmd = OUTPUT();



--tty_txd is tty_txd at PIN_E16
tty_txd = INPUT();


--A1L546 is tty_rxd~output at IOOBUF_X41_Y18_N2
A1L546 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--tty_rxd is tty_rxd at PIN_F13
tty_rxd = OUTPUT();



--tty_rts is tty_rts at PIN_D16
tty_rts = INPUT();


--A1L540 is tty_cts~output at IOOBUF_X41_Y24_N2
A1L540 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--tty_cts is tty_cts at PIN_D15
tty_cts = OUTPUT();



--tty_dtr is tty_dtr at PIN_P14
tty_dtr = INPUT();


--A1L202 is flash_cs_n~output at IOOBUF_X0_Y24_N9
A1L202 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_cs_n is flash_cs_n at PIN_D2
flash_cs_n = OUTPUT();


--A1L200 is flash_clk~output at IOOBUF_X0_Y20_N16
A1L200 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_clk is flash_clk at PIN_H1
flash_clk = OUTPUT();


--A1L206 is flash_mosi~output at IOOBUF_X0_Y25_N9
A1L206 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_mosi is flash_mosi at PIN_C1
flash_mosi = OUTPUT();



--flash_miso is flash_miso at PIN_H2
flash_miso = INPUT();



--rtc_32khz is rtc_32khz at PIN_E15
rtc_32khz = INPUT();



--rtc_int_n is rtc_int_n at PIN_B16
rtc_int_n = INPUT();


--A1L292 is led[1]~output at IOOBUF_X30_Y0_N2
A1L292 = OUTPUT_BUFFER.O(.I(led_ctr[26]), , , , , , , , , , , , , , , , , );


--led[1] is led[1] at PIN_T13
led[1] = OUTPUT();


--A1L294 is led[2]~output at IOOBUF_X37_Y0_N2
A1L294 = OUTPUT_BUFFER.O(.I(led_ctr[27]), , , , , , , , , , , , , , , , , );


--led[2] is led[2] at PIN_R14
led[2] = OUTPUT();


--A1L296 is led[3]~output at IOOBUF_X35_Y0_N9
A1L296 = OUTPUT_BUFFER.O(.I(led_ctr[28]), , , , , , , , , , , , , , , , , );


--led[3] is led[3] at PIN_T14
led[3] = OUTPUT();


--A1L261 is hdmi_d[0]~output at IOOBUF_X41_Y13_N23
A1L261 = LVDS_OUTPUT_BUFFER.O(.I(M1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );

--A1L260 is hdmi_d[0]~0 at IOOBUF_X41_Y13_N23
A1L260 = LVDS_OUTPUT_BUFFER.OBAR(.I(M1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );


--hdmi_d[0] is hdmi_d[0] at PIN_K15
hdmi_d[0] = OUTPUT();


--A1L265 is hdmi_d[1]~output at IOOBUF_X41_Y5_N2
A1L265 = LVDS_OUTPUT_BUFFER.O(.I(M1_wire_ddio_outa_dataout[1]), , , , , , , , , , , , , , , , , );

--A1L264 is hdmi_d[1]~1 at IOOBUF_X41_Y5_N2
A1L264 = LVDS_OUTPUT_BUFFER.OBAR(.I(M1_wire_ddio_outa_dataout[1]), , , , , , , , , , , , , , , , , );


--hdmi_d[1] is hdmi_d[1] at PIN_N15
hdmi_d[1] = OUTPUT();


--A1L269 is hdmi_d[2]~output at IOOBUF_X41_Y3_N9
A1L269 = LVDS_OUTPUT_BUFFER.O(.I(M1_wire_ddio_outa_dataout[2]), , , , , , , , , , , , , , , , , );

--A1L268 is hdmi_d[2]~2 at IOOBUF_X41_Y3_N9
A1L268 = LVDS_OUTPUT_BUFFER.OBAR(.I(M1_wire_ddio_outa_dataout[2]), , , , , , , , , , , , , , , , , );


--hdmi_d[2] is hdmi_d[2] at PIN_R16
hdmi_d[2] = OUTPUT();


--A1L256 is hdmi_clk~output at IOOBUF_X41_Y13_N9
A1L256 = LVDS_OUTPUT_BUFFER.O(.I(P1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );

--A1L255 is hdmi_clk~0 at IOOBUF_X41_Y13_N9
A1L255 = LVDS_OUTPUT_BUFFER.OBAR(.I(P1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );


--hdmi_clk is hdmi_clk at PIN_J15
hdmi_clk = OUTPUT();


--abc_d[0] is abc_d[0] at PIN_P3
abc_d[0] = BIDIR();



--abc_d[1] is abc_d[1] at PIN_M6
abc_d[1] = BIDIR();



--abc_d[2] is abc_d[2] at PIN_N5
abc_d[2] = BIDIR();



--abc_d[3] is abc_d[3] at PIN_T2
abc_d[3] = BIDIR();



--abc_d[4] is abc_d[4] at PIN_R3
abc_d[4] = BIDIR();



--abc_d[5] is abc_d[5] at PIN_T3
abc_d[5] = BIDIR();



--abc_d[6] is abc_d[6] at PIN_R4
abc_d[6] = BIDIR();



--abc_d[7] is abc_d[7] at PIN_T4
abc_d[7] = BIDIR();



--hdmi_sda is hdmi_sda at PIN_R13
hdmi_sda = BIDIR();



--exth_ha is exth_ha at PIN_N12
exth_ha = BIDIR();



--exth_hb is exth_hb at PIN_N9
exth_hb = BIDIR();



--exth_hd is exth_hd at PIN_R11
exth_hd = BIDIR();



--exth_he is exth_he at PIN_R12
exth_he = BIDIR();



--exth_hf is exth_hf at PIN_T11
exth_hf = BIDIR();



--exth_hg is exth_hg at PIN_N11
exth_hg = BIDIR();



--sr_dq[0] is sr_dq[0] at PIN_A12
sr_dq[0] = BIDIR();



--sr_dq[1] is sr_dq[1] at PIN_E11
sr_dq[1] = BIDIR();



--sr_dq[2] is sr_dq[2] at PIN_D11
sr_dq[2] = BIDIR();



--sr_dq[3] is sr_dq[3] at PIN_C11
sr_dq[3] = BIDIR();



--sr_dq[4] is sr_dq[4] at PIN_B11
sr_dq[4] = BIDIR();



--sr_dq[5] is sr_dq[5] at PIN_A11
sr_dq[5] = BIDIR();



--sr_dq[6] is sr_dq[6] at PIN_B10
sr_dq[6] = BIDIR();



--sr_dq[7] is sr_dq[7] at PIN_A10
sr_dq[7] = BIDIR();



--sr_dq[8] is sr_dq[8] at PIN_A5
sr_dq[8] = BIDIR();



--sr_dq[9] is sr_dq[9] at PIN_E7
sr_dq[9] = BIDIR();



--sr_dq[10] is sr_dq[10] at PIN_B5
sr_dq[10] = BIDIR();



--sr_dq[11] is sr_dq[11] at PIN_A4
sr_dq[11] = BIDIR();



--sr_dq[12] is sr_dq[12] at PIN_E6
sr_dq[12] = BIDIR();



--sr_dq[13] is sr_dq[13] at PIN_D6
sr_dq[13] = BIDIR();



--sr_dq[14] is sr_dq[14] at PIN_C6
sr_dq[14] = BIDIR();



--sr_dq[15] is sr_dq[15] at PIN_D5
sr_dq[15] = BIDIR();



--sd_dat[0] is sd_dat[0] at PIN_F15
sd_dat[0] = BIDIR();



--sd_dat[1] is sd_dat[1] at PIN_M10
sd_dat[1] = BIDIR();



--sd_dat[2] is sd_dat[2] at PIN_F14
sd_dat[2] = BIDIR();



--sd_dat[3] is sd_dat[3] at PIN_F16
sd_dat[3] = BIDIR();



--spi_clk is spi_clk at PIN_P6
spi_clk = BIDIR();



--spi_miso is spi_miso at PIN_M7
spi_miso = BIDIR();



--spi_mosi is spi_mosi at PIN_M8
spi_mosi = BIDIR();



--spi_cs_esp_n is spi_cs_esp_n at PIN_N8
spi_cs_esp_n = BIDIR();



--spi_cs_flash_n is spi_cs_flash_n at PIN_N6
spi_cs_flash_n = BIDIR();



--esp_io0 is esp_io0 at PIN_L8
esp_io0 = BIDIR();



--esp_int is esp_int at PIN_P8
esp_int = BIDIR();



--i2c_scl is i2c_scl at PIN_C16
i2c_scl = BIDIR();



--i2c_sda is i2c_sda at PIN_C15
i2c_sda = BIDIR();



--gpio[0] is gpio[0] at PIN_L7
gpio[0] = BIDIR();



--gpio[1] is gpio[1] at PIN_P9
gpio[1] = BIDIR();



--gpio[2] is gpio[2] at PIN_T6
gpio[2] = BIDIR();



--gpio[3] is gpio[3] at PIN_R10
gpio[3] = BIDIR();



--gpio[4] is gpio[4] at PIN_T7
gpio[4] = BIDIR();



--gpio[5] is gpio[5] at PIN_R7
gpio[5] = BIDIR();



--hdmi_scl is hdmi_scl at PIN_M11
hdmi_scl = BIDIR();



--hdmi_hpd is hdmi_hpd at PIN_T15
hdmi_hpd = BIDIR();



--A1L137 is clock_48~input at IOIBUF_X41_Y15_N15
A1L137 = INPUT_BUFFER(.I(clock_48), );


--clock_48 is clock_48 at PIN_M15
clock_48 = INPUT();


--A1L259 is hdmi_d[0](n) at PIN_K16
A1L259 = OUTPUT();


--A1L263 is hdmi_d[1](n) at PIN_N16
A1L263 = OUTPUT();


--A1L267 is hdmi_d[2](n) at PIN_P16
A1L267 = OUTPUT();


--A1L254 is hdmi_clk(n) at PIN_J16
A1L254 = OUTPUT();


--J1L155 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_clk[1]~clkctrl at CLKCTRL_G4
J1L155 = cycloneive_clkctrl(.INCLK[0] = J1_wire_lvds_tx_pll_clk[1]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--J1L71 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock~clkctrl at CLKCTRL_G3
J1L71 = cycloneive_clkctrl(.INCLK[0] = J1_fast_clock) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--A1L404 is rst_n~clkctrl at CLKCTRL_G13
A1L404 = cycloneive_clkctrl(.INCLK[0] = rst_n) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--T1L23 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]~clkctrl at CLKCTRL_G8
T1L23 = cycloneive_clkctrl(.INCLK[0] = T1_wire_pll1_clk[0]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--T1L27 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2]~clkctrl at CLKCTRL_G9
T1L27 = cycloneive_clkctrl(.INCLK[0] = T1_wire_pll1_clk[2]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--T1L25 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1]~clkctrl at CLKCTRL_G7
T1L25 = cycloneive_clkctrl(.INCLK[0] = T1_wire_pll1_clk[1]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--led_ctr[26] is led_ctr[26] at DDIOOUTCELL_X30_Y0_N4
--register power-up is low

led_ctr[26] = DFFEAS(A1L376, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[27] is led_ctr[27] at DDIOOUTCELL_X37_Y0_N4
--register power-up is low

led_ctr[27] = DFFEAS(A1L380, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--led_ctr[28] is led_ctr[28] at DDIOOUTCELL_X35_Y0_N11
--register power-up is low

led_ctr[28] = DFFEAS(A1L384, GLOBAL(T1L25), GLOBAL(A1L404),  ,  ,  ,  ,  ,  );


--J1L115 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]~feeder at LCCOMB_X26_Y22_N18
J1L115 = C1_qreg[6];


--J1L150 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28]~feeder at LCCOMB_X23_Y22_N12
J1L150 = C2_qreg[0];


--J1L152 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29]~feeder at LCCOMB_X23_Y22_N24
J1L152 = C3_qreg[0];


--J1L129 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17]~feeder at LCCOMB_X24_Y22_N16
J1L129 = C3_qreg[4];


--J1L146 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26]~feeder at LCCOMB_X23_Y22_N28
J1L146 = C3_qreg[1];


--J1L148 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]~feeder at LCCOMB_X29_Y23_N26
J1L148 = C1_qreg[0];


--J1L126 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]~feeder at LCCOMB_X24_Y22_N6
J1L126 = C1_qreg[4];


--J1L144 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25]~feeder at LCCOMB_X26_Y22_N4
J1L144 = C2_qreg[1];


--J1L139 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]~feeder at LCCOMB_X23_Y22_N8
J1L139 = C2_qreg[2];


--J1L141 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]~feeder at LCCOMB_X26_Y22_N22
J1L141 = C3_qreg[2];


--J1L117 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]~feeder at LCCOMB_X24_Y22_N18
J1L117 = C2_qreg[6];


--J1L137 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]~feeder at LCCOMB_X26_Y22_N28
J1L137 = C1_qreg[2];


--N2L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6]~feeder at LCCOMB_X35_Y17_N0
N2L8 = J1_dffe22;


--J1L23 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[0]~feeder at LCCOMB_X23_Y24_N26
J1L23 = J1_dffe3a[0];


--J1L29 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[0]~feeder at LCCOMB_X23_Y24_N30
J1L29 = J1_dffe4a[0];


--J1L33 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[2]~feeder at LCCOMB_X23_Y24_N4
J1L33 = J1_dffe4a[2];


--J1L31 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[1]~feeder at LCCOMB_X24_Y23_N8
J1L31 = J1_dffe4a[1];


--J1L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[1]~feeder at LCCOMB_X24_Y23_N14
J1L25 = J1_dffe3a[1];


--J1L57 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[0]~feeder at LCCOMB_X24_Y23_N12
J1L57 = J1_dffe14a[0];


--J1L59 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[1]~feeder at LCCOMB_X23_Y23_N12
J1L59 = J1_dffe14a[1];


--J1L38 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[2]~feeder at LCCOMB_X23_Y24_N0
J1L38 = J1_dffe5a[2];


--J1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[0]~feeder at LCCOMB_X23_Y24_N10
J1L9 = L2_counter_reg_bit[0];


--J1L16 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[0]~feeder at LCCOMB_X23_Y24_N28
J1L16 = L2_counter_reg_bit[0];


--J1L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[2]~feeder at LCCOMB_X23_Y24_N22
J1L13 = L2_counter_reg_bit[2];


--J1L20 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[2]~feeder at LCCOMB_X23_Y24_N6
J1L20 = L2_counter_reg_bit[2];


--J1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[1]~feeder at LCCOMB_X24_Y23_N10
J1L11 = L2_counter_reg_bit[1];


--J1L18 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[1]~feeder at LCCOMB_X24_Y23_N18
J1L18 = L2_counter_reg_bit[1];


--C1L58 is tmdsenc:hdmitmds[0].enc|qreg[6]~feeder at LCCOMB_X26_Y22_N16
C1L58 = C1L62;


--J1L63 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[0]~feeder at LCCOMB_X24_Y23_N16
J1L63 = J1_dffe16a[0];


--J1L54 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[2]~feeder at LCCOMB_X24_Y23_N26
J1L54 = L1_counter_reg_bit[2];


--J1L65 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[1]~feeder at LCCOMB_X24_Y23_N24
J1L65 = J1_dffe16a[1];


--J1L52 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[1]~feeder at LCCOMB_X24_Y23_N22
J1L52 = L1_counter_reg_bit[1];


--J1L105 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]~feeder at LCCOMB_X27_Y23_N16
J1L105 = C2_qreg[8];


--J1L107 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5]~feeder at LCCOMB_X26_Y21_N26
J1L107 = C3_qreg[8];


--C2L53 is tmdsenc:hdmitmds[1].enc|qreg[4]~feeder at LCCOMB_X26_Y22_N2
C2L53 = C2L64;


--C3L53 is tmdsenc:hdmitmds[2].enc|qreg[4]~feeder at LCCOMB_X26_Y22_N12
C3L53 = C3L63;


--C1L55 is tmdsenc:hdmitmds[0].enc|qreg[4]~feeder at LCCOMB_X26_Y22_N14
C1L55 = C1L67;


--C2L50 is tmdsenc:hdmitmds[1].enc|qreg[2]~feeder at LCCOMB_X26_Y22_N24
C2L50 = C2L69;


--C3L50 is tmdsenc:hdmitmds[2].enc|qreg[2]~feeder at LCCOMB_X26_Y22_N10
C3L50 = C3L69;


--C2L56 is tmdsenc:hdmitmds[1].enc|qreg[6]~feeder at LCCOMB_X26_Y22_N20
C2L56 = C2L71;


--C3L56 is tmdsenc:hdmitmds[2].enc|qreg[6]~feeder at LCCOMB_X26_Y22_N6
C3L56 = C3L70;


--C1L52 is tmdsenc:hdmitmds[0].enc|qreg[2]~feeder at LCCOMB_X26_Y22_N8
C1L52 = C1L73;


--C1L30 is tmdsenc:hdmitmds[0].enc|denreg~feeder at LCCOMB_X27_Y22_N6
C1L30 = VCC;