ioregs.h 3.0 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586
  1. #ifndef IODEV_H
  2. #define IODEV_H
  3. #include "iodevs.h"
  4. /* Address for I/O device d, subregister r, offset o */
  5. #define IODEVA(d,r,o) ((~0UL << (IODEV_ADDR_BITS+IODEV_ADDR_SHIFT)) + \
  6. +((d) << IODEV_ADDR_SHIFT)+((r) << 2)+(o))
  7. #ifdef __ASSEMBLY__
  8. /*
  9. * The I/O device range is designed so that it can be addressed via
  10. * negative offsets from the zero register, so no explicit base
  11. * pointer register is necesary.
  12. */
  13. #define IODEVV(d,r) IODEVA(d,r,0)(zero)
  14. #define IODEVB(d,r) IODEVV(d,r,0)
  15. #define IODEVH(d,r) IODEVV(d,r,0)
  16. #define IODEVL(d,r) IODEVV(d,r,0)
  17. #else
  18. #include <stdint.h>
  19. /* Writable registers */
  20. #define IODEVV(d,r) (*(volatile void *)IODEVA(d,r,0))
  21. #define IODEVB(d,r) (*(volatile uint8_t *)IODEVA(d,r,0))
  22. #define IODEVB0(d,r) (*(volatile uint8_t *)IODEVA(d,r,0))
  23. #define IODEVB1(d,r) (*(volatile uint8_t *)IODEVA(d,r,1))
  24. #define IODEVB2(d,r) (*(volatile uint8_t *)IODEVA(d,r,2))
  25. #define IODEVB3(d,r) (*(volatile uint8_t *)IODEVA(d,r,3))
  26. #define IODEVH(d,r) (*(volatile uint16_t *)IODEVA(d,r,0))
  27. #define IODEVH0(d,r) (*(volatile uint16_t *)IODEVA(d,r,0))
  28. #define IODEVH1(d,r) (*(volatile uint16_t *)IODEVA(d,r,2))
  29. #define IODEVL(d,r) (*(volatile uint32_t *)IODEVA(d,r,0))
  30. /* Readonly registers */
  31. #define IODEVRV(d,r) (*(const volatile void *)IODEVA(d,r,0))
  32. #define IODEVRB(d,r) (*(const volatile uint8_t *)IODEVA(d,r,0))
  33. #define IODEVRB0(d,r) (*(const volatile uint8_t *)IODEVA(d,r,0))
  34. #define IODEVRB1(d,r) (*(const volatile uint8_t *)IODEVA(d,r,1))
  35. #define IODEVRB2(d,r) (*(const volatile uint8_t *)IODEVA(d,r,2))
  36. #define IODEVRB3(d,r) (*(const volatile uint8_t *)IODEVA(d,r,3))
  37. #define IODEVRH(d,r) (*(const volatile uint16_t *)IODEVA(d,r,0))
  38. #define IODEVRH0(d,r) (*(const volatile uint16_t *)IODEVA(d,r,0))
  39. #define IODEVRH1(d,r) (*(const volatile uint16_t *)IODEVA(d,r,2))
  40. #define IODEVRL(d,r) (*(const volatile uint32_t *)IODEVA(d,r,0))
  41. #endif
  42. #define CPU_HZ 84000000
  43. #define LED IODEVB(LED_DEV,0)
  44. #define RESET_CMD IODEVL(RESET_DEV,0)
  45. #define ROMCOPY_DONE IODEVRL(ROMCOPY_DEV,0)
  46. #define CONSOLE IODEVB(CONSOLE_DEV,0)
  47. #define CON_BAUDDIV IODEVL(CONSOLE_DEV,1)
  48. #define CON_BAUD_BASE (CPU_HZ >> 4)
  49. #define CON_BAUD_BITS 24
  50. #define CON_STATUS IODEVRL(CONSOLE_DEV,2)
  51. #define CON_IRQEN IODEVL(CONSOLE_DEV,3)
  52. #define SDCARD_CTL IODEVL(SDCARD_DEV,0)
  53. #define SDCARD_CTL_SPEED IODEVB0(SDCARD_DEV,0)
  54. #define SDCARD_CTL_CLRCRC IODEVB1(SDCARD_DEV,0)
  55. #define SDCARD_CRC7_RD IODEVRB0(SDCARD_DEV,4)
  56. #define SDCARD_CRC16_RD IODEVRH1(SDCARD_DEV,4)
  57. #define SDCARD_CRC7_WR IODEVRB0(SDCARD_DEV,5)
  58. #define SDCARD_CRC16_WR IODEVRH1(SDCARD_DEV,5)
  59. /* Speed values, not including -1 adjustment */
  60. #define SD_SLOW 128 /* 328 kHz */
  61. #define SD_20MHZ 3 /* Really 14 MHz */
  62. #define SD_25MHZ 2 /* Really 21 MHz */
  63. #define SD_50MHZ 1 /* Really 42 MHz */
  64. #define SYSCLOCK_DATETIME IODEVL(SYSCLOCK_DEV,0)
  65. #define SYSCLOCK_TICK IODEVL(SYSCLOCK_DEV,1)
  66. #define SYSCLOCK_TICK_HOLD IODEVH0(SYSCLOCK_DEV,1)
  67. #define SYSCLOCK_TICK_NOW IODEVH1(SYSCLOCK_DEV,1)
  68. #endif /* IODEV_H */