v2.sv 6.4 KB

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  1. //
  2. // Top level module for the FPGA on the MAX80 board by
  3. // Per Mårtensson and H. Peter Anvin
  4. //
  5. // MAX80 v2
  6. //
  7. module v2
  8. (
  9. // Clock oscillator
  10. input clock_48, // 48 MHz
  11. input board_id, // This better match the firmware
  12. // ABC-bus
  13. inout abc_clk, // ABC-bus 3 MHz clock
  14. inout [15:0] abc_a, // ABC address bus
  15. inout [7:0] abc_d, // ABC data bus
  16. output abc_d_oe, // Data bus inout enable
  17. inout abc_rst_n, // ABC bus reset strobe
  18. inout abc_cs_n, // ABC card select strobe
  19. inout [4:0] abc_out_n, // OUT, C1-C4 strobe
  20. inout [1:0] abc_inp_n, // INP, STATUS strobe
  21. inout abc_xmemfl_n, // Memory read strobe
  22. inout abc_xmemw800_n, // Memory write strobe (ABC800)
  23. inout abc_xmemw80_n, // Memory write strobe (ABC80)
  24. inout abc_xinpstb_n, // I/O read strobe (ABC800)
  25. inout abc_xoutpstb_n, // I/O write strobe (ABC80)
  26. // The following are inverted versus the bus IF
  27. // the corresponding MOSFETs are installed
  28. inout abc_rdy_x, // RDY = WAIT#
  29. inout abc_resin_x, // System reset request
  30. inout abc_int80_x, // System INT request (ABC80)
  31. inout abc_int800_x, // System INT request (ABC800)
  32. inout abc_nmi_x, // System NMI request (ABC800)
  33. inout abc_xm_x, // System memory override (ABC800)
  34. // Host/device control
  35. output abc_host, // 1 = host, 0 = target
  36. output abc_a_oe,
  37. // ABC-bus extension header
  38. // (Note: cannot use an array here because HC and HH are
  39. // input only.)
  40. inout exth_ha,
  41. inout exth_hb,
  42. input exth_hc,
  43. inout exth_hd,
  44. inout exth_he,
  45. inout exth_hf,
  46. inout exth_hg,
  47. input exth_hh,
  48. // SDRAM bus
  49. output sr_clk,
  50. output [1:0] sr_ba, // Bank address
  51. output [12:0] sr_a, // Address within bank
  52. inout [15:0] sr_dq, // Also known as D or IO
  53. output [1:0] sr_dqm, // DQML and DQMH
  54. output sr_cs_n,
  55. output sr_we_n,
  56. output sr_cas_n,
  57. output sr_ras_n,
  58. // SD card
  59. input sd_cd_n,
  60. output sd_cs_n,
  61. output sd_clk,
  62. output sd_di,
  63. input sd_do,
  64. // SPI flash memory (also configuration)
  65. output flash_cs_n,
  66. output flash_sck,
  67. inout [1:0] flash_io,
  68. // SPI bus (connected to ESP32 so can be bidirectional)
  69. inout spi_clk,
  70. inout spi_miso,
  71. inout spi_mosi,
  72. inout spi_cs_esp_n, // ESP32 IO10
  73. inout spi_cs_flash_n, // ESP32 IO01
  74. // Other ESP32 connections
  75. inout esp_io0, // ESP32 IO00
  76. inout esp_int, // ESP32 IO09
  77. // I2C bus (RTC and external)
  78. inout i2c_scl,
  79. inout i2c_sda,
  80. input rtc_32khz,
  81. input rtc_int_n,
  82. // LED (2 = D23/G, 1 = D22/R, 0 = D17/B)
  83. output [2:0] led,
  84. // USB
  85. inout usb_dp,
  86. inout usb_dn,
  87. output usb_pu,
  88. input usb_rx,
  89. // GPIO
  90. inout [5:0] gpio,
  91. // HDMI
  92. output [2:0] hdmi_d,
  93. output hdmi_clk,
  94. inout hdmi_scl,
  95. inout hdmi_sda,
  96. inout hdmi_hpd,
  97. // Unconnected pins with pullups, used for randomness
  98. inout [2:0] rngio
  99. );
  100. // GPIO assignments for debug serial port:
  101. // gpio[0] - TxD
  102. // gpio[2] - RxD
  103. // gpio[4] - DTR#
  104. // Permanently unused
  105. assign gpio[1] = 1'bz;
  106. assign gpio[3] = 1'bz;
  107. assign gpio[5] = 1'bz;
  108. max80 #(.x_mosfet(6'b000000),
  109. .fpga_ver(8'd2))
  110. max80 (
  111. .clock_48 ( clock_48 ),
  112. .board_id ( board_id ),
  113. .abc_clk ( abc_clk ),
  114. .abc_a ( abc_a ),
  115. .abc_d ( abc_d ),
  116. .abc_d_oe ( abc_d_oe ),
  117. .abc_rst_n ( abc_rst_n ),
  118. .abc_cs_n ( abc_cs_n ),
  119. .abc_out_n ( abc_out_n ),
  120. .abc_inp_n ( abc_inp_n ),
  121. .abc_xmemfl_n ( abc_xmemfl_n ),
  122. .abc_xmemw800_n ( abc_xmemw800_n ),
  123. .abc_xmemw80_n ( abc_xmemw80_n ),
  124. .abc_xinpstb_n ( abc_xinpstb_n ),
  125. .abc_xoutpstb_n ( abc_xoutpstb_n ),
  126. .abc_rdy_x ( abc_rdy_x ),
  127. .abc_resin_x ( abc_resin_x ),
  128. .abc_int80_x ( abc_int80_x ),
  129. .abc_int800_x ( abc_int800_x ),
  130. .abc_nmi_x ( abc_nmi_x ),
  131. .abc_xm_x ( abc_xm_x ),
  132. .abc_host ( abc_host ),
  133. .abc_a_oe ( abc_a_oe ),
  134. .exth_ha ( exth_ha ),
  135. .exth_hb ( exth_hb ),
  136. .exth_hc ( exth_hc ),
  137. .exth_hd ( exth_hd ),
  138. .exth_he ( exth_he ),
  139. .exth_hf ( exth_hf ),
  140. .exth_hg ( exth_hg ),
  141. .exth_hh ( exth_hh ),
  142. .sr_clk ( sr_clk ),
  143. .sr_ba ( sr_ba ),
  144. .sr_a ( sr_a ),
  145. .sr_dq ( sr_dq ),
  146. .sr_dqm ( sr_dqm ),
  147. .sr_cs_n ( sr_cs_n ),
  148. .sr_we_n ( sr_we_n ),
  149. .sr_cas_n ( sr_cas_n ),
  150. .sr_ras_n ( sr_ras_n ),
  151. .sd_cd_n ( sd_cd_n ),
  152. .sd_cs_n ( sd_cs_n ),
  153. .sd_clk ( sd_clk ),
  154. .sd_di ( sd_di ),
  155. .sd_do ( sd_do ),
  156. .tty_txd ( gpio[0] ),
  157. .tty_rxd ( gpio[2] ),
  158. .tty_rts ( 1'b0 ),
  159. .tty_cts ( ),
  160. .tty_dtr ( gpio[4] ),
  161. .flash_cs_n ( flash_cs_n ),
  162. .flash_sck ( flash_sck ),
  163. .flash_io ( flash_io ),
  164. .spi_clk ( spi_clk ),
  165. .spi_miso ( spi_miso ),
  166. .spi_mosi ( spi_mosi ),
  167. .spi_cs_esp_n ( spi_cs_esp_n ),
  168. .spi_cs_flash_n ( spi_cs_flash_n ),
  169. .esp_io0 ( esp_io0 ),
  170. .esp_int ( esp_int ),
  171. .i2c_scl ( i2c_scl ),
  172. .i2c_sda ( i2c_sda ),
  173. .rtc_32khz ( rtc_32khz ),
  174. .rtc_int_n ( rtc_int_n ),
  175. .led ( led ),
  176. .usb_dp ( usb_dp ),
  177. .usb_dn ( usb_dn ),
  178. .usb_rx ( usb_rx ),
  179. .usb_rx_ok ( 1'b1 ),
  180. .usb_pu ( usb_pu ),
  181. .hdmi_d ( hdmi_d ),
  182. .hdmi_clk ( hdmi_clk ),
  183. .hdmi_scl ( hdmi_scl ),
  184. .hdmi_sda ( hdmi_sda ),
  185. .hdmi_hpd ( hdmi_hpd ),
  186. .rngio ( rngio )
  187. );
  188. endmodule // v2