max80_fw/fpga/ip/pll2_16.qip

set_global_assignment -name IP_TOOL_NAME "ALTPLL"
set_global_assignment -name IP_TOOL_VERSION "21.1"
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone IV E}"
set_global_assignment -name VERILOG_FILE [file join $::quartus(qip_path) "pll2_16.v"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll2_16_bb.v"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "pll2_16.ppf"]