max80_fw/output_files/max80.fit.eqn

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--EB1_dataout[0] is ddio_out:sr_clk_out|altddio_out:ALTDDIO_OUT_component|ddio_out_rnj:auto_generated|dataout[0] at DDIOOUTCELL_X30_Y29_N18
EB1_dataout[0] = DDIO_OUT(.DATAINHI(VCC), .DATAINLO(GND), , , , );


--G1_dram_a[0] is sdram:sdram|dram_a[0] at FF_X12_Y3_N17
--register power-up is low

G1_dram_a[0] = DFFEAS(G1L11, GLOBAL(V1L23), GLOBAL(A1L424),  ,  , A1L29,  , G1_WideOr0, G1L24);


--G1_dram_a[1] is sdram:sdram|dram_a[1] at FF_X12_Y3_N3
--register power-up is low

G1_dram_a[1] = DFFEAS(G1L14, GLOBAL(V1L23), GLOBAL(A1L424),  ,  , A1L31,  , G1_WideOr0, G1L24);


--A1L398Q is led_ctr[26]~_Duplicate_1 at FF_X29_Y27_N23
--register power-up is low

A1L398Q = DFFEAS(A1L396, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--A1L402Q is led_ctr[27]~_Duplicate_1 at FF_X29_Y27_N25
--register power-up is low

A1L402Q = DFFEAS(A1L400, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--A1L406Q is led_ctr[28]~_Duplicate_1 at FF_X29_Y27_N27
--register power-up is low

A1L406Q = DFFEAS(A1L404, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--P1_wire_ddio_outa_dataout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[0] at DDIOOUTCELL_X41_Y3_N11
P1_wire_ddio_outa_dataout[0] = DDIO_OUT(.DATAINHI(S1_shift_reg[0]), .DATAINLO(S2_shift_reg[0]), , , , );


--P1_wire_ddio_outa_dataout[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[1] at DDIOOUTCELL_X41_Y5_N4
P1_wire_ddio_outa_dataout[1] = DDIO_OUT(.DATAINHI(S3_shift_reg[0]), .DATAINLO(S4_shift_reg[0]), , , , );


--P1_wire_ddio_outa_dataout[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out:ddio_out|wire_ddio_outa_dataout[2] at DDIOOUTCELL_X41_Y13_N25
P1_wire_ddio_outa_dataout[2] = DDIO_OUT(.DATAINHI(S5_shift_reg[0]), .DATAINLO(S6_shift_reg[0]), , , , );


--R1_wire_ddio_outa_dataout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_ddio_out1:outclock_ddio|wire_ddio_outa_dataout[0] at DDIOOUTCELL_X41_Y13_N11
R1_wire_ddio_outa_dataout[0] = DDIO_OUT(.DATAINHI(Q1_shift_reg[0]), .DATAINLO(Q2_shift_reg[0]), , , , );


--V1_wire_pll1_locked is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_locked at PLL_1
V1_wire_pll1_locked = EQUATION NOT SUPPORTED;

--V1_wire_pll1_fbout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_fbout at PLL_1
V1_wire_pll1_fbout = EQUATION NOT SUPPORTED;

--V1_wire_pll1_clk[0] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0] at PLL_1
V1_wire_pll1_clk[0] = EQUATION NOT SUPPORTED;

--V1_wire_pll1_clk[1] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1] at PLL_1
V1_wire_pll1_clk[1] = EQUATION NOT SUPPORTED;

--V1_wire_pll1_clk[2] is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2] at PLL_1
V1_wire_pll1_clk[2] = EQUATION NOT SUPPORTED;


--G1L11 is sdram:sdram|dram_a[0]~0 at LCCOMB_X12_Y3_N16
G1L11 = (G1_state.st_idle & ((G1L3))) # (!G1_state.st_idle & (G1_state.st_init_mrd));


--G1L14 is sdram:sdram|dram_a[1]~1 at LCCOMB_X12_Y3_N2
G1L14 = (G1_state.st_idle & (G1L2)) # (!G1_state.st_idle & ((G1_state.st_init_mrd)));


--G1_init_ctr[15] is sdram:sdram|init_ctr[15] at FF_X16_Y2_N31
--register power-up is low

G1_init_ctr[15] = DFFEAS(G1L140, GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7,  ,  ,  ,  );


--G1_rfsh_ctr[8] is sdram:sdram|rfsh_ctr[8] at FF_X16_Y2_N17
--register power-up is low

G1_rfsh_ctr[8] = DFFEAS(G1L192, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[9] is sdram:sdram|rfsh_ctr[9] at FF_X16_Y2_N19
--register power-up is low

G1_rfsh_ctr[9] = DFFEAS(G1L195, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--led_ctr[25] is led_ctr[25] at FF_X29_Y27_N21
--register power-up is low

led_ctr[25] = DFFEAS(A1L393, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[24] is led_ctr[24] at FF_X29_Y27_N19
--register power-up is low

led_ctr[24] = DFFEAS(A1L390, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[23] is led_ctr[23] at FF_X29_Y27_N17
--register power-up is low

led_ctr[23] = DFFEAS(A1L387, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[22] is led_ctr[22] at FF_X29_Y27_N15
--register power-up is low

led_ctr[22] = DFFEAS(A1L384, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[21] is led_ctr[21] at FF_X29_Y27_N13
--register power-up is low

led_ctr[21] = DFFEAS(A1L381, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[20] is led_ctr[20] at FF_X29_Y27_N11
--register power-up is low

led_ctr[20] = DFFEAS(A1L378, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[19] is led_ctr[19] at FF_X29_Y27_N9
--register power-up is low

led_ctr[19] = DFFEAS(A1L375, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[18] is led_ctr[18] at FF_X29_Y27_N7
--register power-up is low

led_ctr[18] = DFFEAS(A1L372, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[17] is led_ctr[17] at FF_X29_Y27_N5
--register power-up is low

led_ctr[17] = DFFEAS(A1L369, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[16] is led_ctr[16] at FF_X29_Y27_N3
--register power-up is low

led_ctr[16] = DFFEAS(A1L366, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[15] is led_ctr[15] at FF_X29_Y27_N1
--register power-up is low

led_ctr[15] = DFFEAS(A1L363, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[14] is led_ctr[14] at FF_X29_Y28_N31
--register power-up is low

led_ctr[14] = DFFEAS(A1L360, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[13] is led_ctr[13] at FF_X29_Y28_N29
--register power-up is low

led_ctr[13] = DFFEAS(A1L357, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[12] is led_ctr[12] at FF_X29_Y28_N27
--register power-up is low

led_ctr[12] = DFFEAS(A1L354, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[11] is led_ctr[11] at FF_X29_Y28_N25
--register power-up is low

led_ctr[11] = DFFEAS(A1L351, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[10] is led_ctr[10] at FF_X29_Y28_N23
--register power-up is low

led_ctr[10] = DFFEAS(A1L348, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[9] is led_ctr[9] at FF_X29_Y28_N21
--register power-up is low

led_ctr[9] = DFFEAS(A1L345, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[8] is led_ctr[8] at FF_X29_Y28_N19
--register power-up is low

led_ctr[8] = DFFEAS(A1L342, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[7] is led_ctr[7] at FF_X29_Y28_N17
--register power-up is low

led_ctr[7] = DFFEAS(A1L339, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[6] is led_ctr[6] at FF_X29_Y28_N15
--register power-up is low

led_ctr[6] = DFFEAS(A1L336, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[5] is led_ctr[5] at FF_X29_Y28_N13
--register power-up is low

led_ctr[5] = DFFEAS(A1L333, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[4] is led_ctr[4] at FF_X29_Y28_N11
--register power-up is low

led_ctr[4] = DFFEAS(A1L330, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[3] is led_ctr[3] at FF_X29_Y28_N9
--register power-up is low

led_ctr[3] = DFFEAS(A1L327, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[2] is led_ctr[2] at FF_X29_Y28_N7
--register power-up is low

led_ctr[2] = DFFEAS(A1L324, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[1] is led_ctr[1] at FF_X29_Y28_N5
--register power-up is low

led_ctr[1] = DFFEAS(A1L321, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--A1L321 is led_ctr[1]~28 at LCCOMB_X29_Y28_N4
A1L321 = (led_ctr[1] & (led_ctr[0] $ (VCC))) # (!led_ctr[1] & (led_ctr[0] & VCC));

--A1L322 is led_ctr[1]~29 at LCCOMB_X29_Y28_N4
A1L322 = CARRY((led_ctr[1] & led_ctr[0]));


--A1L324 is led_ctr[2]~30 at LCCOMB_X29_Y28_N6
A1L324 = (led_ctr[2] & (!A1L322)) # (!led_ctr[2] & ((A1L322) # (GND)));

--A1L325 is led_ctr[2]~31 at LCCOMB_X29_Y28_N6
A1L325 = CARRY((!A1L322) # (!led_ctr[2]));


--A1L327 is led_ctr[3]~32 at LCCOMB_X29_Y28_N8
A1L327 = (led_ctr[3] & (A1L325 $ (GND))) # (!led_ctr[3] & (!A1L325 & VCC));

--A1L328 is led_ctr[3]~33 at LCCOMB_X29_Y28_N8
A1L328 = CARRY((led_ctr[3] & !A1L325));


--A1L330 is led_ctr[4]~34 at LCCOMB_X29_Y28_N10
A1L330 = (led_ctr[4] & (!A1L328)) # (!led_ctr[4] & ((A1L328) # (GND)));

--A1L331 is led_ctr[4]~35 at LCCOMB_X29_Y28_N10
A1L331 = CARRY((!A1L328) # (!led_ctr[4]));


--A1L333 is led_ctr[5]~36 at LCCOMB_X29_Y28_N12
A1L333 = (led_ctr[5] & (A1L331 $ (GND))) # (!led_ctr[5] & (!A1L331 & VCC));

--A1L334 is led_ctr[5]~37 at LCCOMB_X29_Y28_N12
A1L334 = CARRY((led_ctr[5] & !A1L331));


--A1L336 is led_ctr[6]~38 at LCCOMB_X29_Y28_N14
A1L336 = (led_ctr[6] & (!A1L334)) # (!led_ctr[6] & ((A1L334) # (GND)));

--A1L337 is led_ctr[6]~39 at LCCOMB_X29_Y28_N14
A1L337 = CARRY((!A1L334) # (!led_ctr[6]));


--A1L339 is led_ctr[7]~40 at LCCOMB_X29_Y28_N16
A1L339 = (led_ctr[7] & (A1L337 $ (GND))) # (!led_ctr[7] & (!A1L337 & VCC));

--A1L340 is led_ctr[7]~41 at LCCOMB_X29_Y28_N16
A1L340 = CARRY((led_ctr[7] & !A1L337));


--A1L342 is led_ctr[8]~42 at LCCOMB_X29_Y28_N18
A1L342 = (led_ctr[8] & (!A1L340)) # (!led_ctr[8] & ((A1L340) # (GND)));

--A1L343 is led_ctr[8]~43 at LCCOMB_X29_Y28_N18
A1L343 = CARRY((!A1L340) # (!led_ctr[8]));


--A1L345 is led_ctr[9]~44 at LCCOMB_X29_Y28_N20
A1L345 = (led_ctr[9] & (A1L343 $ (GND))) # (!led_ctr[9] & (!A1L343 & VCC));

--A1L346 is led_ctr[9]~45 at LCCOMB_X29_Y28_N20
A1L346 = CARRY((led_ctr[9] & !A1L343));


--A1L348 is led_ctr[10]~46 at LCCOMB_X29_Y28_N22
A1L348 = (led_ctr[10] & (!A1L346)) # (!led_ctr[10] & ((A1L346) # (GND)));

--A1L349 is led_ctr[10]~47 at LCCOMB_X29_Y28_N22
A1L349 = CARRY((!A1L346) # (!led_ctr[10]));


--A1L351 is led_ctr[11]~48 at LCCOMB_X29_Y28_N24
A1L351 = (led_ctr[11] & (A1L349 $ (GND))) # (!led_ctr[11] & (!A1L349 & VCC));

--A1L352 is led_ctr[11]~49 at LCCOMB_X29_Y28_N24
A1L352 = CARRY((led_ctr[11] & !A1L349));


--A1L354 is led_ctr[12]~50 at LCCOMB_X29_Y28_N26
A1L354 = (led_ctr[12] & (!A1L352)) # (!led_ctr[12] & ((A1L352) # (GND)));

--A1L355 is led_ctr[12]~51 at LCCOMB_X29_Y28_N26
A1L355 = CARRY((!A1L352) # (!led_ctr[12]));


--A1L357 is led_ctr[13]~52 at LCCOMB_X29_Y28_N28
A1L357 = (led_ctr[13] & (A1L355 $ (GND))) # (!led_ctr[13] & (!A1L355 & VCC));

--A1L358 is led_ctr[13]~53 at LCCOMB_X29_Y28_N28
A1L358 = CARRY((led_ctr[13] & !A1L355));


--A1L360 is led_ctr[14]~54 at LCCOMB_X29_Y28_N30
A1L360 = (led_ctr[14] & (!A1L358)) # (!led_ctr[14] & ((A1L358) # (GND)));

--A1L361 is led_ctr[14]~55 at LCCOMB_X29_Y28_N30
A1L361 = CARRY((!A1L358) # (!led_ctr[14]));


--A1L363 is led_ctr[15]~56 at LCCOMB_X29_Y27_N0
A1L363 = (led_ctr[15] & (A1L361 $ (GND))) # (!led_ctr[15] & (!A1L361 & VCC));

--A1L364 is led_ctr[15]~57 at LCCOMB_X29_Y27_N0
A1L364 = CARRY((led_ctr[15] & !A1L361));


--A1L366 is led_ctr[16]~58 at LCCOMB_X29_Y27_N2
A1L366 = (led_ctr[16] & (!A1L364)) # (!led_ctr[16] & ((A1L364) # (GND)));

--A1L367 is led_ctr[16]~59 at LCCOMB_X29_Y27_N2
A1L367 = CARRY((!A1L364) # (!led_ctr[16]));


--A1L369 is led_ctr[17]~60 at LCCOMB_X29_Y27_N4
A1L369 = (led_ctr[17] & (A1L367 $ (GND))) # (!led_ctr[17] & (!A1L367 & VCC));

--A1L370 is led_ctr[17]~61 at LCCOMB_X29_Y27_N4
A1L370 = CARRY((led_ctr[17] & !A1L367));


--A1L372 is led_ctr[18]~62 at LCCOMB_X29_Y27_N6
A1L372 = (led_ctr[18] & (!A1L370)) # (!led_ctr[18] & ((A1L370) # (GND)));

--A1L373 is led_ctr[18]~63 at LCCOMB_X29_Y27_N6
A1L373 = CARRY((!A1L370) # (!led_ctr[18]));


--A1L375 is led_ctr[19]~64 at LCCOMB_X29_Y27_N8
A1L375 = (led_ctr[19] & (A1L373 $ (GND))) # (!led_ctr[19] & (!A1L373 & VCC));

--A1L376 is led_ctr[19]~65 at LCCOMB_X29_Y27_N8
A1L376 = CARRY((led_ctr[19] & !A1L373));


--A1L378 is led_ctr[20]~66 at LCCOMB_X29_Y27_N10
A1L378 = (led_ctr[20] & (!A1L376)) # (!led_ctr[20] & ((A1L376) # (GND)));

--A1L379 is led_ctr[20]~67 at LCCOMB_X29_Y27_N10
A1L379 = CARRY((!A1L376) # (!led_ctr[20]));


--A1L381 is led_ctr[21]~68 at LCCOMB_X29_Y27_N12
A1L381 = (led_ctr[21] & (A1L379 $ (GND))) # (!led_ctr[21] & (!A1L379 & VCC));

--A1L382 is led_ctr[21]~69 at LCCOMB_X29_Y27_N12
A1L382 = CARRY((led_ctr[21] & !A1L379));


--A1L384 is led_ctr[22]~70 at LCCOMB_X29_Y27_N14
A1L384 = (led_ctr[22] & (!A1L382)) # (!led_ctr[22] & ((A1L382) # (GND)));

--A1L385 is led_ctr[22]~71 at LCCOMB_X29_Y27_N14
A1L385 = CARRY((!A1L382) # (!led_ctr[22]));


--A1L387 is led_ctr[23]~72 at LCCOMB_X29_Y27_N16
A1L387 = (led_ctr[23] & (A1L385 $ (GND))) # (!led_ctr[23] & (!A1L385 & VCC));

--A1L388 is led_ctr[23]~73 at LCCOMB_X29_Y27_N16
A1L388 = CARRY((led_ctr[23] & !A1L385));


--A1L390 is led_ctr[24]~74 at LCCOMB_X29_Y27_N18
A1L390 = (led_ctr[24] & (!A1L388)) # (!led_ctr[24] & ((A1L388) # (GND)));

--A1L391 is led_ctr[24]~75 at LCCOMB_X29_Y27_N18
A1L391 = CARRY((!A1L388) # (!led_ctr[24]));


--A1L393 is led_ctr[25]~76 at LCCOMB_X29_Y27_N20
A1L393 = (led_ctr[25] & (A1L391 $ (GND))) # (!led_ctr[25] & (!A1L391 & VCC));

--A1L394 is led_ctr[25]~77 at LCCOMB_X29_Y27_N20
A1L394 = CARRY((led_ctr[25] & !A1L391));


--A1L396 is led_ctr[26]~78 at LCCOMB_X29_Y27_N22
A1L396 = (A1L398Q & (!A1L394)) # (!A1L398Q & ((A1L394) # (GND)));

--A1L397 is led_ctr[26]~79 at LCCOMB_X29_Y27_N22
A1L397 = CARRY((!A1L394) # (!A1L398Q));


--A1L400 is led_ctr[27]~80 at LCCOMB_X29_Y27_N24
A1L400 = (A1L402Q & (A1L397 $ (GND))) # (!A1L402Q & (!A1L397 & VCC));

--A1L401 is led_ctr[27]~81 at LCCOMB_X29_Y27_N24
A1L401 = CARRY((A1L402Q & !A1L397));


--A1L404 is led_ctr[28]~82 at LCCOMB_X29_Y27_N26
A1L404 = A1L406Q $ (A1L401);


--L1_wire_lvds_tx_pll_fbout is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_fbout at PLL_2
L1_wire_lvds_tx_pll_fbout = EQUATION NOT SUPPORTED;

--L1_fast_clock is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock at PLL_2
L1_fast_clock = EQUATION NOT SUPPORTED;

--L1_wire_lvds_tx_pll_clk[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_clk[1] at PLL_2
L1_wire_lvds_tx_pll_clk[1] = EQUATION NOT SUPPORTED;


--W1_wire_le_comb8_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le:altpll_dyn_phase_le2|wire_le_comb8_combout at LCCOMB_X1_Y1_N16
W1_wire_le_comb8_combout = (V1_remap_decoy_le3a_2) # ((V1_remap_decoy_le3a_0 & !V1_remap_decoy_le3a_1));


--X1_wire_le_comb9_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le1:altpll_dyn_phase_le4|wire_le_comb9_combout at LCCOMB_X1_Y1_N10
X1_wire_le_comb9_combout = (V1_remap_decoy_le3a_2) # ((!V1_remap_decoy_le3a_0 & V1_remap_decoy_le3a_1));


--Y1_wire_le_comb10_combout is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|pll_altpll_dyn_phase_le12:altpll_dyn_phase_le5|wire_le_comb10_combout at LCCOMB_X1_Y1_N4
Y1_wire_le_comb10_combout = (V1_remap_decoy_le3a_0 & ((V1_remap_decoy_le3a_1) # (V1_remap_decoy_le3a_2))) # (!V1_remap_decoy_le3a_0 & (V1_remap_decoy_le3a_1 & V1_remap_decoy_le3a_2));


--A1L1 is Add0~0 at LCCOMB_X14_Y1_N4
A1L1 = (rst_ctr[1] & (rst_ctr[0] $ (VCC))) # (!rst_ctr[1] & (rst_ctr[0] & VCC));

--A1L2 is Add0~1 at LCCOMB_X14_Y1_N4
A1L2 = CARRY((rst_ctr[1] & rst_ctr[0]));


--A1L3 is Add0~2 at LCCOMB_X14_Y1_N6
A1L3 = (rst_ctr[2] & (!A1L2)) # (!rst_ctr[2] & ((A1L2) # (GND)));

--A1L4 is Add0~3 at LCCOMB_X14_Y1_N6
A1L4 = CARRY((!A1L2) # (!rst_ctr[2]));


--A1L5 is Add0~4 at LCCOMB_X14_Y1_N8
A1L5 = (rst_ctr[3] & (A1L4 $ (GND))) # (!rst_ctr[3] & (!A1L4 & VCC));

--A1L6 is Add0~5 at LCCOMB_X14_Y1_N8
A1L6 = CARRY((rst_ctr[3] & !A1L4));


--A1L7 is Add0~6 at LCCOMB_X14_Y1_N10
A1L7 = (rst_ctr[4] & (!A1L6)) # (!rst_ctr[4] & ((A1L6) # (GND)));

--A1L8 is Add0~7 at LCCOMB_X14_Y1_N10
A1L8 = CARRY((!A1L6) # (!rst_ctr[4]));


--A1L9 is Add0~8 at LCCOMB_X14_Y1_N12
A1L9 = (rst_ctr[5] & (A1L8 $ (GND))) # (!rst_ctr[5] & (!A1L8 & VCC));

--A1L10 is Add0~9 at LCCOMB_X14_Y1_N12
A1L10 = CARRY((rst_ctr[5] & !A1L8));


--A1L11 is Add0~10 at LCCOMB_X14_Y1_N14
A1L11 = (rst_ctr[6] & (!A1L10)) # (!rst_ctr[6] & ((A1L10) # (GND)));

--A1L12 is Add0~11 at LCCOMB_X14_Y1_N14
A1L12 = CARRY((!A1L10) # (!rst_ctr[6]));


--A1L13 is Add0~12 at LCCOMB_X14_Y1_N16
A1L13 = (rst_ctr[7] & (A1L12 $ (GND))) # (!rst_ctr[7] & (!A1L12 & VCC));

--A1L14 is Add0~13 at LCCOMB_X14_Y1_N16
A1L14 = CARRY((rst_ctr[7] & !A1L12));


--A1L15 is Add0~14 at LCCOMB_X14_Y1_N18
A1L15 = (rst_ctr[8] & (!A1L14)) # (!rst_ctr[8] & ((A1L14) # (GND)));

--A1L16 is Add0~15 at LCCOMB_X14_Y1_N18
A1L16 = CARRY((!A1L14) # (!rst_ctr[8]));


--A1L17 is Add0~16 at LCCOMB_X14_Y1_N20
A1L17 = (rst_ctr[9] & (A1L16 $ (GND))) # (!rst_ctr[9] & (!A1L16 & VCC));

--A1L18 is Add0~17 at LCCOMB_X14_Y1_N20
A1L18 = CARRY((rst_ctr[9] & !A1L16));


--A1L19 is Add0~18 at LCCOMB_X14_Y1_N22
A1L19 = (rst_ctr[10] & (!A1L18)) # (!rst_ctr[10] & ((A1L18) # (GND)));

--A1L20 is Add0~19 at LCCOMB_X14_Y1_N22
A1L20 = CARRY((!A1L18) # (!rst_ctr[10]));


--A1L21 is Add0~20 at LCCOMB_X14_Y1_N24
A1L21 = (rst_ctr[11] & (A1L20 $ (GND))) # (!rst_ctr[11] & (!A1L20 & VCC));

--A1L22 is Add0~21 at LCCOMB_X14_Y1_N24
A1L22 = CARRY((rst_ctr[11] & !A1L20));


--A1L23 is Add0~22 at LCCOMB_X14_Y1_N26
A1L23 = A1L22;


--G1_init_ctr[14] is sdram:sdram|init_ctr[14] at FF_X16_Y2_N29
--register power-up is low

G1_init_ctr[14] = DFFEAS(G1L137, GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7,  ,  ,  ,  );


--G1_init_ctr[13] is sdram:sdram|init_ctr[13] at FF_X16_Y2_N27
--register power-up is low

G1_init_ctr[13] = DFFEAS(G1L134, GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7,  ,  ,  ,  );


--G1_init_ctr[12] is sdram:sdram|init_ctr[12] at FF_X16_Y2_N25
--register power-up is low

G1_init_ctr[12] = DFFEAS(G1L131, GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7,  ,  ,  ,  );


--G1_init_ctr[11] is sdram:sdram|init_ctr[11] at FF_X16_Y2_N23
--register power-up is low

G1_init_ctr[11] = DFFEAS(G1L128, GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7,  ,  ,  ,  );


--G1L128 is sdram:sdram|init_ctr[11]~5 at LCCOMB_X16_Y2_N22
G1L128 = (G1_init_ctr[11] & (G1_init_ctr[10] $ (VCC))) # (!G1_init_ctr[11] & (G1_init_ctr[10] & VCC));

--G1L129 is sdram:sdram|init_ctr[11]~6 at LCCOMB_X16_Y2_N22
G1L129 = CARRY((G1_init_ctr[11] & G1_init_ctr[10]));


--G1L131 is sdram:sdram|init_ctr[12]~7 at LCCOMB_X16_Y2_N24
G1L131 = (G1_init_ctr[12] & (!G1L129)) # (!G1_init_ctr[12] & ((G1L129) # (GND)));

--G1L132 is sdram:sdram|init_ctr[12]~8 at LCCOMB_X16_Y2_N24
G1L132 = CARRY((!G1L129) # (!G1_init_ctr[12]));


--G1L134 is sdram:sdram|init_ctr[13]~9 at LCCOMB_X16_Y2_N26
G1L134 = (G1_init_ctr[13] & (G1L132 $ (GND))) # (!G1_init_ctr[13] & (!G1L132 & VCC));

--G1L135 is sdram:sdram|init_ctr[13]~10 at LCCOMB_X16_Y2_N26
G1L135 = CARRY((G1_init_ctr[13] & !G1L132));


--G1L137 is sdram:sdram|init_ctr[14]~11 at LCCOMB_X16_Y2_N28
G1L137 = (G1_init_ctr[14] & (!G1L135)) # (!G1_init_ctr[14] & ((G1L135) # (GND)));

--G1L138 is sdram:sdram|init_ctr[14]~12 at LCCOMB_X16_Y2_N28
G1L138 = CARRY((!G1L135) # (!G1_init_ctr[14]));


--G1L140 is sdram:sdram|init_ctr[15]~13 at LCCOMB_X16_Y2_N30
G1L140 = G1_init_ctr[15] $ (!G1L138);


--G1_rfsh_ctr[7] is sdram:sdram|rfsh_ctr[7] at FF_X16_Y2_N15
--register power-up is low

G1_rfsh_ctr[7] = DFFEAS(G1L189, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[6] is sdram:sdram|rfsh_ctr[6] at FF_X16_Y2_N13
--register power-up is low

G1_rfsh_ctr[6] = DFFEAS(G1L186, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[5] is sdram:sdram|rfsh_ctr[5] at FF_X16_Y2_N11
--register power-up is low

G1_rfsh_ctr[5] = DFFEAS(G1L183, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[4] is sdram:sdram|rfsh_ctr[4] at FF_X16_Y2_N9
--register power-up is low

G1_rfsh_ctr[4] = DFFEAS(G1L180, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[3] is sdram:sdram|rfsh_ctr[3] at FF_X16_Y2_N7
--register power-up is low

G1_rfsh_ctr[3] = DFFEAS(G1L177, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[2] is sdram:sdram|rfsh_ctr[2] at FF_X16_Y2_N5
--register power-up is low

G1_rfsh_ctr[2] = DFFEAS(G1L174, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[1] is sdram:sdram|rfsh_ctr[1] at FF_X16_Y2_N3
--register power-up is low

G1_rfsh_ctr[1] = DFFEAS(G1L171, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1_rfsh_ctr[0] is sdram:sdram|rfsh_ctr[0] at FF_X16_Y2_N1
--register power-up is low

G1_rfsh_ctr[0] = DFFEAS(G1L168, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  , G1_is_rfsh,  );


--G1L168 is sdram:sdram|rfsh_ctr[0]~10 at LCCOMB_X16_Y2_N0
G1L168 = G1_rfsh_ctr[0] $ (VCC);

--G1L169 is sdram:sdram|rfsh_ctr[0]~11 at LCCOMB_X16_Y2_N0
G1L169 = CARRY(G1_rfsh_ctr[0]);


--G1L171 is sdram:sdram|rfsh_ctr[1]~12 at LCCOMB_X16_Y2_N2
G1L171 = (G1_rfsh_ctr[1] & (!G1L169)) # (!G1_rfsh_ctr[1] & ((G1L169) # (GND)));

--G1L172 is sdram:sdram|rfsh_ctr[1]~13 at LCCOMB_X16_Y2_N2
G1L172 = CARRY((!G1L169) # (!G1_rfsh_ctr[1]));


--G1L174 is sdram:sdram|rfsh_ctr[2]~14 at LCCOMB_X16_Y2_N4
G1L174 = (G1_rfsh_ctr[2] & (G1L172 $ (GND))) # (!G1_rfsh_ctr[2] & (!G1L172 & VCC));

--G1L175 is sdram:sdram|rfsh_ctr[2]~15 at LCCOMB_X16_Y2_N4
G1L175 = CARRY((G1_rfsh_ctr[2] & !G1L172));


--G1L177 is sdram:sdram|rfsh_ctr[3]~16 at LCCOMB_X16_Y2_N6
G1L177 = (G1_rfsh_ctr[3] & (!G1L175)) # (!G1_rfsh_ctr[3] & ((G1L175) # (GND)));

--G1L178 is sdram:sdram|rfsh_ctr[3]~17 at LCCOMB_X16_Y2_N6
G1L178 = CARRY((!G1L175) # (!G1_rfsh_ctr[3]));


--G1L180 is sdram:sdram|rfsh_ctr[4]~18 at LCCOMB_X16_Y2_N8
G1L180 = (G1_rfsh_ctr[4] & (G1L178 $ (GND))) # (!G1_rfsh_ctr[4] & (!G1L178 & VCC));

--G1L181 is sdram:sdram|rfsh_ctr[4]~19 at LCCOMB_X16_Y2_N8
G1L181 = CARRY((G1_rfsh_ctr[4] & !G1L178));


--G1L183 is sdram:sdram|rfsh_ctr[5]~20 at LCCOMB_X16_Y2_N10
G1L183 = (G1_rfsh_ctr[5] & (!G1L181)) # (!G1_rfsh_ctr[5] & ((G1L181) # (GND)));

--G1L184 is sdram:sdram|rfsh_ctr[5]~21 at LCCOMB_X16_Y2_N10
G1L184 = CARRY((!G1L181) # (!G1_rfsh_ctr[5]));


--G1L186 is sdram:sdram|rfsh_ctr[6]~22 at LCCOMB_X16_Y2_N12
G1L186 = (G1_rfsh_ctr[6] & (G1L184 $ (GND))) # (!G1_rfsh_ctr[6] & (!G1L184 & VCC));

--G1L187 is sdram:sdram|rfsh_ctr[6]~23 at LCCOMB_X16_Y2_N12
G1L187 = CARRY((G1_rfsh_ctr[6] & !G1L184));


--G1L189 is sdram:sdram|rfsh_ctr[7]~24 at LCCOMB_X16_Y2_N14
G1L189 = (G1_rfsh_ctr[7] & (!G1L187)) # (!G1_rfsh_ctr[7] & ((G1L187) # (GND)));

--G1L190 is sdram:sdram|rfsh_ctr[7]~25 at LCCOMB_X16_Y2_N14
G1L190 = CARRY((!G1L187) # (!G1_rfsh_ctr[7]));


--G1L192 is sdram:sdram|rfsh_ctr[8]~26 at LCCOMB_X16_Y2_N16
G1L192 = (G1_rfsh_ctr[8] & (G1L190 $ (GND))) # (!G1_rfsh_ctr[8] & (!G1L190 & VCC));

--G1L193 is sdram:sdram|rfsh_ctr[8]~27 at LCCOMB_X16_Y2_N16
G1L193 = CARRY((G1_rfsh_ctr[8] & !G1L190));


--G1L195 is sdram:sdram|rfsh_ctr[9]~28 at LCCOMB_X16_Y2_N18
G1L195 = G1_rfsh_ctr[9] $ (G1L193);


--C1_qreg[6] is tmdsenc:hdmitmds[0].enc|qreg[6] at FF_X37_Y9_N25
--register power-up is low

C1_qreg[6] = DFFEAS(C1L58, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C2_qreg[0] is tmdsenc:hdmitmds[1].enc|qreg[0] at FF_X36_Y9_N1
--register power-up is low

C2_qreg[0] = DFFEAS(C2L61, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3_qreg[0] is tmdsenc:hdmitmds[2].enc|qreg[0] at FF_X36_Y10_N17
--register power-up is low

C3_qreg[0] = DFFEAS(C3L62, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[3] is tmdsenc:hdmitmds[2].enc|disparity[3] at FF_X36_Y8_N25
--register power-up is low

C3_disparity[3] = DFFEAS(C3L42, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[0] is tmdsenc:hdmitmds[2].enc|disparity[0] at FF_X36_Y8_N19
--register power-up is low

C3_disparity[0] = DFFEAS(C3L33, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[1] is tmdsenc:hdmitmds[2].enc|disparity[1] at FF_X36_Y8_N21
--register power-up is low

C3_disparity[1] = DFFEAS(C3L36, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3_disparity[2] is tmdsenc:hdmitmds[2].enc|disparity[2] at FF_X36_Y8_N23
--register power-up is low

C3_disparity[2] = DFFEAS(C3L39, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[3] is tmdsenc:hdmitmds[0].enc|disparity[3] at FF_X37_Y10_N27
--register power-up is low

C1_disparity[3] = DFFEAS(C1L44, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[0] is tmdsenc:hdmitmds[0].enc|disparity[0] at FF_X37_Y10_N21
--register power-up is low

C1_disparity[0] = DFFEAS(C1L35, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[1] is tmdsenc:hdmitmds[0].enc|disparity[1] at FF_X37_Y10_N23
--register power-up is low

C1_disparity[1] = DFFEAS(C1L38, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C1_disparity[2] is tmdsenc:hdmitmds[0].enc|disparity[2] at FF_X37_Y10_N25
--register power-up is low

C1_disparity[2] = DFFEAS(C1L41, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C2_qreg[4] is tmdsenc:hdmitmds[1].enc|qreg[4] at FF_X37_Y9_N11
--register power-up is low

C2_qreg[4] = DFFEAS(C2L53, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C2_disparity[3] is tmdsenc:hdmitmds[1].enc|disparity[3] at FF_X35_Y9_N17
--register power-up is low

C2_disparity[3] = DFFEAS(C2L42, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[0] is tmdsenc:hdmitmds[1].enc|disparity[0] at FF_X35_Y9_N11
--register power-up is low

C2_disparity[0] = DFFEAS(C2L33, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[1] is tmdsenc:hdmitmds[1].enc|disparity[1] at FF_X35_Y9_N13
--register power-up is low

C2_disparity[1] = DFFEAS(C2L36, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C2_disparity[2] is tmdsenc:hdmitmds[1].enc|disparity[2] at FF_X35_Y9_N15
--register power-up is low

C2_disparity[2] = DFFEAS(C2L39, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3_qreg[4] is tmdsenc:hdmitmds[2].enc|qreg[4] at FF_X37_Y9_N5
--register power-up is low

C3_qreg[4] = DFFEAS(C3L53, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[1] is tmdsenc:hdmitmds[2].enc|qreg[1] at FF_X36_Y10_N3
--register power-up is low

C3_qreg[1] = DFFEAS(C3L64, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C1_qreg[0] is tmdsenc:hdmitmds[0].enc|qreg[0] at FF_X38_Y10_N25
--register power-up is low

C1_qreg[0] = DFFEAS(C1L66, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C3L32 is tmdsenc:hdmitmds[2].enc|disparity[0]~5 at LCCOMB_X36_Y8_N16
C3L32 = CARRY(C3L26);


--C3L33 is tmdsenc:hdmitmds[2].enc|disparity[0]~6 at LCCOMB_X36_Y8_N18
C3L33 = (C3L25 & ((C3_disparity[0] & (C3L32 & VCC)) # (!C3_disparity[0] & (!C3L32)))) # (!C3L25 & ((C3_disparity[0] & (!C3L32)) # (!C3_disparity[0] & ((C3L32) # (GND)))));

--C3L34 is tmdsenc:hdmitmds[2].enc|disparity[0]~7 at LCCOMB_X36_Y8_N18
C3L34 = CARRY((C3L25 & (!C3_disparity[0] & !C3L32)) # (!C3L25 & ((!C3L32) # (!C3_disparity[0]))));


--C3L36 is tmdsenc:hdmitmds[2].enc|disparity[1]~8 at LCCOMB_X36_Y8_N20
C3L36 = ((C3L24 $ (C3_disparity[1] $ (!C3L34)))) # (GND);

--C3L37 is tmdsenc:hdmitmds[2].enc|disparity[1]~9 at LCCOMB_X36_Y8_N20
C3L37 = CARRY((C3L24 & ((C3_disparity[1]) # (!C3L34))) # (!C3L24 & (C3_disparity[1] & !C3L34)));


--C3L39 is tmdsenc:hdmitmds[2].enc|disparity[2]~10 at LCCOMB_X36_Y8_N22
C3L39 = (C3_disparity[2] & ((C3L22 & (C3L37 & VCC)) # (!C3L22 & (!C3L37)))) # (!C3_disparity[2] & ((C3L22 & (!C3L37)) # (!C3L22 & ((C3L37) # (GND)))));

--C3L40 is tmdsenc:hdmitmds[2].enc|disparity[2]~11 at LCCOMB_X36_Y8_N22
C3L40 = CARRY((C3_disparity[2] & (!C3L22 & !C3L37)) # (!C3_disparity[2] & ((!C3L37) # (!C3L22))));


--C3L42 is tmdsenc:hdmitmds[2].enc|disparity[3]~12 at LCCOMB_X36_Y8_N24
C3L42 = C3_disparity[3] $ (C3L40 $ (!C3L20));


--N2_wire_counter_comb_bita_0combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_0combout[0] at LCCOMB_X32_Y11_N2
N2_wire_counter_comb_bita_0combout[0] = N2_counter_reg_bit[0] $ (((VCC) # (!L1_sync_dffe12a)));

--N2_wire_counter_comb_bita_0cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_0cout[0] at LCCOMB_X32_Y11_N2
N2_wire_counter_comb_bita_0cout[0] = CARRY(L1_sync_dffe12a $ (!N2_counter_reg_bit[0]));


--N2_wire_counter_comb_bita_1combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_1combout[0] at LCCOMB_X32_Y11_N4
N2_wire_counter_comb_bita_1combout[0] = (N2_wire_counter_comb_bita_0cout[0] & (N2_counter_reg_bit[1] $ (((L1_sync_dffe12a) # (VCC))))) # (!N2_wire_counter_comb_bita_0cout[0] & ((N2_counter_reg_bit[1]) # ((GND))));

--N2_wire_counter_comb_bita_1cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_1cout[0] at LCCOMB_X32_Y11_N4
N2_wire_counter_comb_bita_1cout[0] = CARRY((N2_counter_reg_bit[1] $ (L1_sync_dffe12a)) # (!N2_wire_counter_comb_bita_0cout[0]));


--N2_wire_counter_comb_bita_2combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2combout[0] at LCCOMB_X32_Y11_N6
N2_wire_counter_comb_bita_2combout[0] = (N2_wire_counter_comb_bita_1cout[0] & (((N2_counter_reg_bit[2] & VCC)))) # (!N2_wire_counter_comb_bita_1cout[0] & (N2_counter_reg_bit[2] $ (((VCC) # (!L1_sync_dffe12a)))));

--N2_wire_counter_comb_bita_2cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2cout[0] at LCCOMB_X32_Y11_N6
N2_wire_counter_comb_bita_2cout[0] = CARRY((!N2_wire_counter_comb_bita_1cout[0] & (L1_sync_dffe12a $ (!N2_counter_reg_bit[2]))));


--N2L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|wire_counter_comb_bita_2cout[0]~0 at LCCOMB_X32_Y11_N8
N2L25 = N2_wire_counter_comb_bita_2cout[0];


--C1L34 is tmdsenc:hdmitmds[0].enc|disparity[0]~5 at LCCOMB_X37_Y10_N18
C1L34 = CARRY(C1L26);


--C1L35 is tmdsenc:hdmitmds[0].enc|disparity[0]~6 at LCCOMB_X37_Y10_N20
C1L35 = (C1L25 & ((C1_disparity[0] & (C1L34 & VCC)) # (!C1_disparity[0] & (!C1L34)))) # (!C1L25 & ((C1_disparity[0] & (!C1L34)) # (!C1_disparity[0] & ((C1L34) # (GND)))));

--C1L36 is tmdsenc:hdmitmds[0].enc|disparity[0]~7 at LCCOMB_X37_Y10_N20
C1L36 = CARRY((C1L25 & (!C1_disparity[0] & !C1L34)) # (!C1L25 & ((!C1L34) # (!C1_disparity[0]))));


--C1L38 is tmdsenc:hdmitmds[0].enc|disparity[1]~8 at LCCOMB_X37_Y10_N22
C1L38 = ((C1_disparity[1] $ (C1L24 $ (!C1L36)))) # (GND);

--C1L39 is tmdsenc:hdmitmds[0].enc|disparity[1]~9 at LCCOMB_X37_Y10_N22
C1L39 = CARRY((C1_disparity[1] & ((C1L24) # (!C1L36))) # (!C1_disparity[1] & (C1L24 & !C1L36)));


--C1L41 is tmdsenc:hdmitmds[0].enc|disparity[2]~10 at LCCOMB_X37_Y10_N24
C1L41 = (C1_disparity[2] & ((C1L22 & (C1L39 & VCC)) # (!C1L22 & (!C1L39)))) # (!C1_disparity[2] & ((C1L22 & (!C1L39)) # (!C1L22 & ((C1L39) # (GND)))));

--C1L42 is tmdsenc:hdmitmds[0].enc|disparity[2]~11 at LCCOMB_X37_Y10_N24
C1L42 = CARRY((C1_disparity[2] & (!C1L22 & !C1L39)) # (!C1_disparity[2] & ((!C1L39) # (!C1L22))));


--C1L44 is tmdsenc:hdmitmds[0].enc|disparity[3]~12 at LCCOMB_X37_Y10_N26
C1L44 = C1_disparity[3] $ (C1L42 $ (!C1L20));


--C2L32 is tmdsenc:hdmitmds[1].enc|disparity[0]~5 at LCCOMB_X35_Y9_N8
C2L32 = CARRY(C2L26);


--C2L33 is tmdsenc:hdmitmds[1].enc|disparity[0]~6 at LCCOMB_X35_Y9_N10
C2L33 = (C2L25 & ((C2_disparity[0] & (C2L32 & VCC)) # (!C2_disparity[0] & (!C2L32)))) # (!C2L25 & ((C2_disparity[0] & (!C2L32)) # (!C2_disparity[0] & ((C2L32) # (GND)))));

--C2L34 is tmdsenc:hdmitmds[1].enc|disparity[0]~7 at LCCOMB_X35_Y9_N10
C2L34 = CARRY((C2L25 & (!C2_disparity[0] & !C2L32)) # (!C2L25 & ((!C2L32) # (!C2_disparity[0]))));


--C2L36 is tmdsenc:hdmitmds[1].enc|disparity[1]~8 at LCCOMB_X35_Y9_N12
C2L36 = ((C2L24 $ (C2_disparity[1] $ (!C2L34)))) # (GND);

--C2L37 is tmdsenc:hdmitmds[1].enc|disparity[1]~9 at LCCOMB_X35_Y9_N12
C2L37 = CARRY((C2L24 & ((C2_disparity[1]) # (!C2L34))) # (!C2L24 & (C2_disparity[1] & !C2L34)));


--C2L39 is tmdsenc:hdmitmds[1].enc|disparity[2]~10 at LCCOMB_X35_Y9_N14
C2L39 = (C2L22 & ((C2_disparity[2] & (C2L37 & VCC)) # (!C2_disparity[2] & (!C2L37)))) # (!C2L22 & ((C2_disparity[2] & (!C2L37)) # (!C2_disparity[2] & ((C2L37) # (GND)))));

--C2L40 is tmdsenc:hdmitmds[1].enc|disparity[2]~11 at LCCOMB_X35_Y9_N14
C2L40 = CARRY((C2L22 & (!C2_disparity[2] & !C2L37)) # (!C2L22 & ((!C2L37) # (!C2_disparity[2]))));


--C2L42 is tmdsenc:hdmitmds[1].enc|disparity[3]~12 at LCCOMB_X35_Y9_N16
C2L42 = C2_disparity[3] $ (C2L40 $ (!C2L20));


--C1_qreg[4] is tmdsenc:hdmitmds[0].enc|qreg[4] at FF_X37_Y9_N7
--register power-up is low

C1_qreg[4] = DFFEAS(C1L55, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C1_qreg[1] is tmdsenc:hdmitmds[0].enc|qreg[1] at FF_X38_Y10_N11
--register power-up is low

C1_qreg[1] = DFFEAS(C1L68, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--C2_qreg[1] is tmdsenc:hdmitmds[1].enc|qreg[1] at FF_X35_Y9_N1
--register power-up is low

C2_qreg[1] = DFFEAS(C2L66, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  , !C1_denreg,  );


--N1_wire_counter_comb_bita_0combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_0combout[0] at LCCOMB_X32_Y11_N10
N1_wire_counter_comb_bita_0combout[0] = N1_counter_reg_bit[0] $ (((VCC) # (!L1_sync_dffe12a)));

--N1_wire_counter_comb_bita_0cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_0cout[0] at LCCOMB_X32_Y11_N10
N1_wire_counter_comb_bita_0cout[0] = CARRY(L1_sync_dffe12a $ (!N1_counter_reg_bit[0]));


--N1_wire_counter_comb_bita_1combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_1combout[0] at LCCOMB_X32_Y11_N12
N1_wire_counter_comb_bita_1combout[0] = (N1_wire_counter_comb_bita_0cout[0] & (N1_counter_reg_bit[1] $ (((L1_sync_dffe12a) # (VCC))))) # (!N1_wire_counter_comb_bita_0cout[0] & (((N1_counter_reg_bit[1]) # (GND))));

--N1_wire_counter_comb_bita_1cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_1cout[0] at LCCOMB_X32_Y11_N12
N1_wire_counter_comb_bita_1cout[0] = CARRY((L1_sync_dffe12a $ (N1_counter_reg_bit[1])) # (!N1_wire_counter_comb_bita_0cout[0]));


--N1_wire_counter_comb_bita_2combout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2combout[0] at LCCOMB_X32_Y11_N14
N1_wire_counter_comb_bita_2combout[0] = (N1_wire_counter_comb_bita_1cout[0] & (((N1_counter_reg_bit[2] & VCC)))) # (!N1_wire_counter_comb_bita_1cout[0] & (N1_counter_reg_bit[2] $ (((VCC) # (!L1_sync_dffe12a)))));

--N1_wire_counter_comb_bita_2cout[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2cout[0] at LCCOMB_X32_Y11_N14
N1_wire_counter_comb_bita_2cout[0] = CARRY((!N1_wire_counter_comb_bita_1cout[0] & (L1_sync_dffe12a $ (!N1_counter_reg_bit[2]))));


--N1L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|wire_counter_comb_bita_2cout[0]~0 at LCCOMB_X32_Y11_N16
N1L25 = N1_wire_counter_comb_bita_2cout[0];


--C2_qreg[2] is tmdsenc:hdmitmds[1].enc|qreg[2] at FF_X37_Y9_N1
--register power-up is low

C2_qreg[2] = DFFEAS(C2L50, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[2] is tmdsenc:hdmitmds[2].enc|qreg[2] at FF_X37_Y9_N3
--register power-up is low

C3_qreg[2] = DFFEAS(C3L50, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C2_qreg[6] is tmdsenc:hdmitmds[1].enc|qreg[6] at FF_X37_Y9_N13
--register power-up is low

C2_qreg[6] = DFFEAS(C2L56, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C3_qreg[6] is tmdsenc:hdmitmds[2].enc|qreg[6] at FF_X37_Y9_N23
--register power-up is low

C3_qreg[6] = DFFEAS(C3L56, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--C1_qreg[2] is tmdsenc:hdmitmds[0].enc|qreg[2] at FF_X37_Y9_N9
--register power-up is low

C1_qreg[2] = DFFEAS(C1L52, GLOBAL(V1L27), GLOBAL(A1L424),  ,  , VCC,  ,  , !C1_denreg);


--A1L128 is abc_rdy_x~output at IOOBUF_X0_Y21_N23
A1L128 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L130 is abc_resin_x~output at IOOBUF_X5_Y29_N23
A1L130 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L109 is abc_int80_x~output at IOOBUF_X0_Y11_N9
A1L109 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L111 is abc_int800_x~output at IOOBUF_X41_Y18_N23
A1L111 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L115 is abc_nmi_x~output at IOOBUF_X1_Y29_N2
A1L115 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L140 is abc_xm_x~output at IOOBUF_X26_Y29_N23
A1L140 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L298 is hdmi_sda~output at IOOBUF_X9_Y29_N9
A1L298 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L67 is abc_d[0]~output at IOOBUF_X26_Y0_N23
A1L67 = OUTPUT_BUFFER.O(.I(abc_do[0]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L70 is abc_d[1]~output at IOOBUF_X28_Y0_N23
A1L70 = OUTPUT_BUFFER.O(.I(abc_do[1]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L73 is abc_d[2]~output at IOOBUF_X14_Y0_N16
A1L73 = OUTPUT_BUFFER.O(.I(abc_do[2]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L76 is abc_d[3]~output at IOOBUF_X7_Y0_N23
A1L76 = OUTPUT_BUFFER.O(.I(abc_do[3]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L79 is abc_d[4]~output at IOOBUF_X26_Y0_N16
A1L79 = OUTPUT_BUFFER.O(.I(abc_do[4]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L82 is abc_d[5]~output at IOOBUF_X19_Y0_N9
A1L82 = OUTPUT_BUFFER.O(.I(abc_do[5]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L85 is abc_d[6]~output at IOOBUF_X26_Y0_N2
A1L85 = OUTPUT_BUFFER.O(.I(abc_do[6]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L88 is abc_d[7]~output at IOOBUF_X23_Y0_N30
A1L88 = OUTPUT_BUFFER.O(.I(abc_do[7]), .OE(!A1L145), , , , , , , , , , , , , , , , );


--A1L199 is exth_ha~output at IOOBUF_X37_Y29_N16
A1L199 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L202 is exth_hb~output at IOOBUF_X26_Y29_N16
A1L202 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L207 is exth_hd~output at IOOBUF_X37_Y0_N2
A1L207 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L210 is exth_he~output at IOOBUF_X41_Y24_N2
A1L210 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L213 is exth_hf~output at IOOBUF_X41_Y18_N16
A1L213 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L216 is exth_hg~output at IOOBUF_X35_Y0_N9
A1L216 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L506 is sr_dq[0]~output at IOOBUF_X3_Y0_N16
A1L506 = OUTPUT_BUFFER.O(.I(G1_dram_d[0]), .OE(!G1_dram_d_en), , , , , , , , , , , , , , , , );


--A1L509 is sr_dq[1]~output at IOOBUF_X30_Y0_N9
A1L509 = OUTPUT_BUFFER.O(.I(G1_dram_d[1]), .OE(!G1L74Q), , , , , , , , , , , , , , , , );


--A1L512 is sr_dq[2]~output at IOOBUF_X16_Y0_N23
A1L512 = OUTPUT_BUFFER.O(.I(G1_dram_d[2]), .OE(!G1L75Q), , , , , , , , , , , , , , , , );


--A1L515 is sr_dq[3]~output at IOOBUF_X23_Y0_N23
A1L515 = OUTPUT_BUFFER.O(.I(G1_dram_d[3]), .OE(!G1L76Q), , , , , , , , , , , , , , , , );


--A1L518 is sr_dq[4]~output at IOOBUF_X26_Y0_N30
A1L518 = OUTPUT_BUFFER.O(.I(G1_dram_d[4]), .OE(!G1L77Q), , , , , , , , , , , , , , , , );


--A1L521 is sr_dq[5]~output at IOOBUF_X23_Y0_N9
A1L521 = OUTPUT_BUFFER.O(.I(G1_dram_d[5]), .OE(!G1L78Q), , , , , , , , , , , , , , , , );


--A1L524 is sr_dq[6]~output at IOOBUF_X30_Y0_N16
A1L524 = OUTPUT_BUFFER.O(.I(G1_dram_d[6]), .OE(!G1L79Q), , , , , , , , , , , , , , , , );


--A1L527 is sr_dq[7]~output at IOOBUF_X16_Y0_N9
A1L527 = OUTPUT_BUFFER.O(.I(G1_dram_d[7]), .OE(!G1L80Q), , , , , , , , , , , , , , , , );


--A1L530 is sr_dq[8]~output at IOOBUF_X26_Y0_N9
A1L530 = OUTPUT_BUFFER.O(.I(G1_dram_d[8]), .OE(!G1L81Q), , , , , , , , , , , , , , , , );


--A1L533 is sr_dq[9]~output at IOOBUF_X30_Y0_N2
A1L533 = OUTPUT_BUFFER.O(.I(G1_dram_d[9]), .OE(!G1L82Q), , , , , , , , , , , , , , , , );


--A1L536 is sr_dq[10]~output at IOOBUF_X16_Y0_N16
A1L536 = OUTPUT_BUFFER.O(.I(G1_dram_d[10]), .OE(!G1L83Q), , , , , , , , , , , , , , , , );


--A1L539 is sr_dq[11]~output at IOOBUF_X23_Y0_N16
A1L539 = OUTPUT_BUFFER.O(.I(G1_dram_d[11]), .OE(!G1L84Q), , , , , , , , , , , , , , , , );


--A1L542 is sr_dq[12]~output at IOOBUF_X3_Y0_N30
A1L542 = OUTPUT_BUFFER.O(.I(G1_dram_d[12]), .OE(!G1L85Q), , , , , , , , , , , , , , , , );


--A1L545 is sr_dq[13]~output at IOOBUF_X19_Y0_N30
A1L545 = OUTPUT_BUFFER.O(.I(G1_dram_d[13]), .OE(!G1L86Q), , , , , , , , , , , , , , , , );


--A1L548 is sr_dq[14]~output at IOOBUF_X28_Y0_N16
A1L548 = OUTPUT_BUFFER.O(.I(G1_dram_d[14]), .OE(!G1L87Q), , , , , , , , , , , , , , , , );


--A1L551 is sr_dq[15]~output at IOOBUF_X5_Y0_N9
A1L551 = OUTPUT_BUFFER.O(.I(G1_dram_d[15]), .OE(!G1L88Q), , , , , , , , , , , , , , , , );


--A1L436 is sd_dat[0]~output at IOOBUF_X3_Y29_N30
A1L436 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L439 is sd_dat[1]~output at IOOBUF_X37_Y0_N9
A1L439 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L442 is sd_dat[2]~output at IOOBUF_X41_Y19_N9
A1L442 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L445 is sd_dat[3]~output at IOOBUF_X3_Y29_N2
A1L445 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L449 is spi_clk~output at IOOBUF_X26_Y29_N30
A1L449 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L458 is spi_miso~output at IOOBUF_X3_Y29_N9
A1L458 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L461 is spi_mosi~output at IOOBUF_X14_Y29_N2
A1L461 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L452 is spi_cs_esp_n~output at IOOBUF_X41_Y27_N23
A1L452 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L455 is spi_cs_flash_n~output at IOOBUF_X3_Y29_N23
A1L455 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L196 is esp_io0~output at IOOBUF_X5_Y29_N16
A1L196 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L193 is esp_int~output at IOOBUF_X11_Y29_N2
A1L193 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L306 is i2c_scl~output at IOOBUF_X0_Y9_N2
A1L306 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L309 is i2c_sda~output at IOOBUF_X35_Y29_N2
A1L309 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L230 is gpio[0]~output at IOOBUF_X32_Y29_N2
A1L230 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L233 is gpio[1]~output at IOOBUF_X11_Y29_N9
A1L233 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L236 is gpio[2]~output at IOOBUF_X0_Y12_N23
A1L236 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L239 is gpio[3]~output at IOOBUF_X35_Y0_N2
A1L239 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L242 is gpio[4]~output at IOOBUF_X35_Y29_N9
A1L242 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L245 is gpio[5]~output at IOOBUF_X0_Y10_N23
A1L245 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L295 is hdmi_scl~output at IOOBUF_X41_Y27_N16
A1L295 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--A1L292 is hdmi_hpd~output at IOOBUF_X0_Y24_N16
A1L292 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--G1_dram_cke is sdram:sdram|dram_cke at DDIOOUTCELL_X32_Y29_N11
--register power-up is low

G1_dram_cke = DFFEAS(VCC, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_ba[0] is sdram:sdram|dram_ba[0] at DDIOOUTCELL_X7_Y0_N32
--register power-up is low

G1_dram_ba[0] = DFFEAS(G1L39, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_ba[1] is sdram:sdram|dram_ba[1] at DDIOOUTCELL_X14_Y0_N11
--register power-up is low

G1_dram_ba[1] = DFFEAS(G1L40, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[2] is sdram:sdram|dram_a[2] at DDIOOUTCELL_X19_Y0_N4
--register power-up is low

G1_dram_a[2] = DFFEAS(G1L26, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[3] is sdram:sdram|dram_a[3] at DDIOOUTCELL_X14_Y0_N4
--register power-up is low

G1_dram_a[3] = DFFEAS(G1L28, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[4] is sdram:sdram|dram_a[4] at DDIOOUTCELL_X0_Y4_N25
--register power-up is low

G1_dram_a[4] = DFFEAS(G1L29, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[5] is sdram:sdram|dram_a[5] at DDIOOUTCELL_X16_Y0_N4
--register power-up is low

G1_dram_a[5] = DFFEAS(G1L30, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[6] is sdram:sdram|dram_a[6] at DDIOOUTCELL_X21_Y0_N32
--register power-up is low

G1_dram_a[6] = DFFEAS(G1L32, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[7] is sdram:sdram|dram_a[7] at DDIOOUTCELL_X14_Y0_N25
--register power-up is low

G1_dram_a[7] = DFFEAS(G1L33, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[8] is sdram:sdram|dram_a[8] at DDIOOUTCELL_X37_Y0_N32
--register power-up is low

G1_dram_a[8] = DFFEAS(G1L34, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_a[10] is sdram:sdram|dram_a[10] at DDIOOUTCELL_X35_Y0_N25
--register power-up is low

G1_dram_a[10] = DFFEAS(G1L31, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_dqm[0] is sdram:sdram|dram_dqm[0] at DDIOOUTCELL_X16_Y0_N32
--register power-up is low

G1_dram_dqm[0] = DFFEAS(G1L93, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_dqm[1] is sdram:sdram|dram_dqm[1] at DDIOOUTCELL_X1_Y0_N4
--register power-up is low

G1_dram_dqm[1] = DFFEAS(G1L94, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_cmd[3] is sdram:sdram|dram_cmd[3] at DDIOOUTCELL_X0_Y3_N4
--register power-up is high

G1_dram_cmd[3] = DFFEAS(!G1L47, GLOBAL(V1L23),  ,  ,  , VCC, !GLOBAL(A1L424),  ,  );


--G1_dram_cmd[0] is sdram:sdram|dram_cmd[0] at DDIOOUTCELL_X7_Y0_N11
--register power-up is high

G1_dram_cmd[0] = DFFEAS(!G1L49, GLOBAL(V1L23),  ,  ,  , VCC, !GLOBAL(A1L424),  ,  );


--G1_dram_cmd[1] is sdram:sdram|dram_cmd[1] at DDIOOUTCELL_X0_Y3_N11
--register power-up is high

G1_dram_cmd[1] = DFFEAS(!G1L52, GLOBAL(V1L23),  ,  ,  , VCC, !GLOBAL(A1L424),  ,  );


--G1_dram_cmd[2] is sdram:sdram|dram_cmd[2] at DDIOOUTCELL_X30_Y0_N32
--register power-up is high

G1_dram_cmd[2] = DFFEAS(!G1L53, GLOBAL(V1L23),  ,  ,  , VCC, !GLOBAL(A1L424),  ,  );


--rst_n is rst_n at FF_X14_Y1_N1
--register power-up is low

rst_n = DFFEAS(A1L423, GLOBAL(V1L25), V1_wire_pll1_locked,  ,  ,  ,  ,  ,  );


--G1_state.st_p0_wr_cmd is sdram:sdram|state.st_p0_wr_cmd at FF_X19_Y3_N9
--register power-up is low

G1_state.st_p0_wr_cmd = DFFEAS(G1L217, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_state.st_idle is sdram:sdram|state.st_idle at FF_X12_Y3_N29
--register power-up is low

G1_state.st_idle = DFFEAS(G1L219, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--abc_rrq is abc_rrq at FF_X14_Y3_N17
--register power-up is low

abc_rrq = DFFEAS(A1L132, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--abc_wrq is abc_wrq at FF_X14_Y3_N11
--register power-up is low

abc_wrq = DFFEAS(A1L136, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L38 is sdram:sdram|dram_ba~0 at LCCOMB_X17_Y3_N8
G1L38 = (G1_state.st_p0_wr_cmd) # ((G1_state.st_idle & ((abc_rrq) # (abc_wrq))));


--G1_state.st_p0_rd_cmd is sdram:sdram|state.st_p0_rd_cmd at FF_X19_Y3_N3
--register power-up is low

G1_state.st_p0_rd_cmd = DFFEAS(G1L221, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_state.st_p0_rd_pre is sdram:sdram|state.st_p0_rd_pre at FF_X16_Y3_N25
--register power-up is low

G1_state.st_p0_rd_pre = DFFEAS(G1L222, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L72 is sdram:sdram|dram_d_en~0 at LCCOMB_X16_Y3_N2
G1L72 = (!G1_state.st_p0_rd_cmd & !G1_state.st_p0_rd_pre);


--G1_nop_ctr[3] is sdram:sdram|nop_ctr[3] at FF_X15_Y3_N25
--register power-up is low

G1_nop_ctr[3] = DFFEAS(G1L150, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_nop_ctr[2] is sdram:sdram|nop_ctr[2] at FF_X15_Y3_N11
--register power-up is low

G1_nop_ctr[2] = DFFEAS(G1L151, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_nop_ctr[1] is sdram:sdram|nop_ctr[1] at FF_X15_Y3_N5
--register power-up is low

G1_nop_ctr[1] = DFFEAS(G1L154, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_nop_ctr[0] is sdram:sdram|nop_ctr[0] at FF_X15_Y3_N7
--register power-up is low

G1_nop_ctr[0] = DFFEAS(G1L156, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_WideOr0 is sdram:sdram|WideOr0 at LCCOMB_X15_Y3_N0
G1_WideOr0 = (G1_nop_ctr[2]) # ((G1_nop_ctr[3]) # ((G1_nop_ctr[1]) # (G1_nop_ctr[0])));


--G1L39 is sdram:sdram|dram_ba~1 at LCCOMB_X17_Y3_N2
G1L39 = (A1L47 & (!G1_WideOr0 & ((G1L38) # (!G1L72))));


--G1L40 is sdram:sdram|dram_ba~2 at LCCOMB_X16_Y1_N24
G1L40 = (A1L49 & (!G1_WideOr0 & ((G1L38) # (!G1L72))));


--G1_state.st_init_mrd is sdram:sdram|state.st_init_mrd at FF_X12_Y3_N7
--register power-up is low

G1_state.st_init_mrd = DFFEAS(G1L223, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L3 is sdram:sdram|Selector11~0 at LCCOMB_X12_Y3_N0
G1L3 = (A1L51 & ((abc_wrq) # (abc_rrq)));


--G1L24 is sdram:sdram|dram_a~8 at LCCOMB_X19_Y3_N28
G1L24 = (G1_state.st_p0_wr_cmd) # (G1_state.st_p0_rd_cmd);


--G1L2 is sdram:sdram|Selector10~0 at LCCOMB_X12_Y3_N10
G1L2 = (A1L53 & ((abc_wrq) # (abc_rrq)));


--G1L8 is sdram:sdram|always1~0 at LCCOMB_X14_Y3_N12
G1L8 = (abc_rrq) # (abc_wrq);


--G1L25 is sdram:sdram|dram_a~9 at LCCOMB_X19_Y3_N6
G1L25 = (A1L55 & (!G1L24 & (G1_state.st_idle & G1L8)));


--G1L26 is sdram:sdram|dram_a~10 at LCCOMB_X19_Y3_N24
G1L26 = (!G1_WideOr0 & ((G1L25) # ((A1L33 & G1L24))));


--G1L27 is sdram:sdram|dram_a~11 at LCCOMB_X19_Y3_N26
G1L27 = (A1L57 & (!G1L24 & (G1_state.st_idle & G1L8)));


--G1L28 is sdram:sdram|dram_a~12 at LCCOMB_X19_Y3_N4
G1L28 = (!G1_WideOr0 & ((G1L27) # ((A1L35 & G1L24))));


--G1L29 is sdram:sdram|dram_a~13 at LCCOMB_X1_Y4_N16
G1L29 = (!G1_WideOr0 & ((G1L24 & ((A1L37))) # (!G1L24 & (G1_state.st_init_mrd))));


--G1L30 is sdram:sdram|dram_a~14 at LCCOMB_X17_Y3_N12
G1L30 = (!G1_WideOr0 & ((G1L24 & ((A1L39))) # (!G1L24 & (G1_state.st_init_mrd))));


--G1_state.st_reset is sdram:sdram|state.st_reset at FF_X16_Y3_N13
--register power-up is low

G1_state.st_reset = DFFEAS(G1L215, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L31 is sdram:sdram|dram_a~15 at LCCOMB_X16_Y3_N30
G1L31 = (!G1_state.st_reset & (!G1_WideOr0 & G1_init_ctr[15]));


--G1_state.st_p0_wr_pre is sdram:sdram|state.st_p0_wr_pre at FF_X16_Y3_N17
--register power-up is low

G1_state.st_p0_wr_pre = DFFEAS(G1L224, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L93 is sdram:sdram|dram_dqm~0 at LCCOMB_X17_Y3_N6
G1L93 = (G1_state.st_p0_wr_cmd & ((G1_WideOr0 & ((G1_state.st_p0_wr_pre))) # (!G1_WideOr0 & (A1L27)))) # (!G1_state.st_p0_wr_cmd & (((G1_state.st_p0_wr_pre))));


--G1L94 is sdram:sdram|dram_dqm~1 at LCCOMB_X16_Y3_N18
G1L94 = (G1_WideOr0 & (G1_state.st_p0_wr_pre)) # (!G1_WideOr0 & ((G1_state.st_p0_wr_cmd & ((!A1L27))) # (!G1_state.st_p0_wr_cmd & (G1_state.st_p0_wr_pre))));


--G1L4 is sdram:sdram|Selector14~0 at LCCOMB_X15_Y3_N26
G1L4 = (!G1L8 & (!G1_rfsh_ctr[8] & (G1_state.st_idle & !G1_rfsh_ctr[9])));


--G1L47 is sdram:sdram|dram_cmd~0 at LCCOMB_X15_Y3_N28
G1L47 = (G1_WideOr0) # ((!G1L4 & ((G1_init_ctr[15]) # (G1_state.st_reset))));


--G1L6 is sdram:sdram|WideOr12~0 at LCCOMB_X16_Y3_N20
G1L6 = (!G1_state.st_p0_wr_pre & (!G1_state.st_p0_wr_cmd & G1_state.st_reset));


--G1L48 is sdram:sdram|dram_cmd~1 at LCCOMB_X15_Y3_N22
G1L48 = (!G1_WideOr0 & ((G1_init_ctr[15]) # (G1_state.st_reset)));


--G1L49 is sdram:sdram|dram_cmd~2 at LCCOMB_X15_Y3_N8
G1L49 = (G1L48 & (((G1_state.st_init_mrd) # (G1_state.st_p0_rd_pre)) # (!G1L6)));


--G1_state.st_p0_rd_data is sdram:sdram|state.st_p0_rd_data at FF_X16_Y3_N15
--register power-up is low

G1_state.st_p0_rd_data = DFFEAS(G1L225, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L50 is sdram:sdram|dram_cmd~3 at LCCOMB_X16_Y3_N0
G1L50 = ((G1_state.st_p0_wr_pre) # ((G1_state.st_p0_rd_data) # (G1_state.st_p0_rd_pre))) # (!G1_state.st_reset);


--G1L51 is sdram:sdram|dram_cmd~4 at LCCOMB_X17_Y3_N24
G1L51 = (abc_wrq) # ((abc_rrq) # ((!G1_rfsh_ctr[8] & !G1_rfsh_ctr[9])));


--G1L52 is sdram:sdram|dram_cmd~5 at LCCOMB_X17_Y3_N10
G1L52 = (!G1_WideOr0 & (!G1L50 & ((!G1L51) # (!G1_state.st_idle))));


--G1L53 is sdram:sdram|dram_cmd~6 at LCCOMB_X15_Y3_N18
G1L53 = (!G1L4 & (!G1_state.st_p0_rd_data & (G1L48 & !G1L24)));


--led_ctr[0] is led_ctr[0] at FF_X29_Y28_N1
--register power-up is low

led_ctr[0] = DFFEAS(A1L319, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--S2_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[0] at FF_X37_Y7_N1
--register power-up is low

S2_shift_reg[0] = DFFEAS(S2L7, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S1_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[0] at FF_X37_Y7_N3
--register power-up is low

S1_shift_reg[0] = DFFEAS(S1L7, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S4_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[0] at FF_X37_Y11_N1
--register power-up is low

S4_shift_reg[0] = DFFEAS(S4L7, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S3_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[0] at FF_X37_Y11_N3
--register power-up is low

S3_shift_reg[0] = DFFEAS(S3L7, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S6_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[0] at FF_X36_Y11_N25
--register power-up is low

S6_shift_reg[0] = DFFEAS(S6L7, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S5_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[0] at FF_X38_Y9_N25
--register power-up is low

S5_shift_reg[0] = DFFEAS(S5L7, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[0] at FF_X40_Y10_N25
--register power-up is low

Q2_shift_reg[0] = DFFEAS(Q2L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1_shift_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[0] at FF_X40_Y10_N3
--register power-up is low

Q1_shift_reg[0] = DFFEAS(Q1L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--rst_ctr[11] is rst_ctr[11] at FF_X14_Y1_N25
--register power-up is low

rst_ctr[11] = DFFEAS(A1L21, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[10] is rst_ctr[10] at FF_X14_Y1_N23
--register power-up is low

rst_ctr[10] = DFFEAS(A1L19, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[9] is rst_ctr[9] at FF_X14_Y1_N21
--register power-up is low

rst_ctr[9] = DFFEAS(A1L17, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[8] is rst_ctr[8] at FF_X14_Y1_N19
--register power-up is low

rst_ctr[8] = DFFEAS(A1L15, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[7] is rst_ctr[7] at FF_X14_Y1_N17
--register power-up is low

rst_ctr[7] = DFFEAS(A1L13, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[6] is rst_ctr[6] at FF_X14_Y1_N15
--register power-up is low

rst_ctr[6] = DFFEAS(A1L11, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[5] is rst_ctr[5] at FF_X14_Y1_N13
--register power-up is low

rst_ctr[5] = DFFEAS(A1L9, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[4] is rst_ctr[4] at FF_X14_Y1_N11
--register power-up is low

rst_ctr[4] = DFFEAS(A1L7, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[3] is rst_ctr[3] at FF_X14_Y1_N9
--register power-up is low

rst_ctr[3] = DFFEAS(A1L5, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[2] is rst_ctr[2] at FF_X14_Y1_N7
--register power-up is low

rst_ctr[2] = DFFEAS(A1L3, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[0] is rst_ctr[0] at FF_X14_Y1_N3
--register power-up is low

rst_ctr[0] = DFFEAS(A1L410, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--rst_ctr[1] is rst_ctr[1] at FF_X14_Y1_N5
--register power-up is low

rst_ctr[1] = DFFEAS(A1L1, GLOBAL(V1L25), V1_wire_pll1_locked,  , !rst_n,  ,  ,  ,  );


--A1L423 is rst_n~0 at LCCOMB_X14_Y1_N0
A1L423 = (A1L23) # (rst_n);


--G1_state.st_init_rfsh1 is sdram:sdram|state.st_init_rfsh1 at FF_X15_Y3_N13
--register power-up is low

G1_state.st_init_rfsh1 = DFFEAS(G1L200, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_state.st_init_rfsh2 is sdram:sdram|state.st_init_rfsh2 at FF_X12_Y3_N5
--register power-up is low

G1_state.st_init_rfsh2 = DFFEAS(G1L226, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L208 is sdram:sdram|state.st_reset~2 at LCCOMB_X12_Y3_N30
G1L208 = (G1_state.st_init_mrd & (!G1_state.st_idle & (!G1_state.st_init_rfsh2 & !G1_state.st_init_rfsh1))) # (!G1_state.st_init_mrd & ((G1_state.st_idle & (!G1_state.st_init_rfsh2 & !G1_state.st_init_rfsh1)) # (!G1_state.st_idle & (G1_state.st_init_rfsh2 $ (G1_state.st_init_rfsh1)))));


--G1L209 is sdram:sdram|state.st_reset~3 at LCCOMB_X16_Y3_N10
G1L209 = (G1L208 & (G1L72 & (!G1_state.st_p0_rd_data & G1L6)));


--G1L210 is sdram:sdram|state.st_reset~4 at LCCOMB_X12_Y3_N24
G1L210 = (!G1_state.st_init_mrd & (!G1_state.st_init_rfsh2 & !G1_state.st_init_rfsh1));


--G1L211 is sdram:sdram|state.st_reset~5 at LCCOMB_X16_Y3_N4
G1L211 = (G1_state.st_reset & (!G1_state.st_p0_rd_data & (!G1_state.st_p0_wr_cmd & !G1_state.st_p0_wr_pre)));


--G1L212 is sdram:sdram|state.st_reset~6 at LCCOMB_X16_Y3_N22
G1L212 = (G1_state.st_reset & ((G1_state.st_p0_rd_data & (!G1_state.st_p0_wr_cmd & !G1_state.st_p0_wr_pre)) # (!G1_state.st_p0_rd_data & (G1_state.st_p0_wr_cmd $ (G1_state.st_p0_wr_pre))))) # (!G1_state.st_reset & (!G1_state.st_p0_rd_data & (!G1_state.st_p0_wr_cmd & !G1_state.st_p0_wr_pre)));


--G1L213 is sdram:sdram|state.st_reset~7 at LCCOMB_X16_Y3_N8
G1L213 = (G1_state.st_p0_rd_cmd & (((G1L211 & !G1_state.st_p0_rd_pre)))) # (!G1_state.st_p0_rd_cmd & ((G1_state.st_p0_rd_pre & ((G1L211))) # (!G1_state.st_p0_rd_pre & (G1L212))));


--G1L214 is sdram:sdram|state.st_reset~8 at LCCOMB_X16_Y3_N26
G1L214 = (G1L209) # ((!G1_state.st_idle & (G1L210 & G1L213)));


--G1L216 is sdram:sdram|state~38 at LCCOMB_X17_Y3_N20
G1L216 = (G1_WideOr0 & (((G1_state.st_p0_wr_cmd)))) # (!G1_WideOr0 & (abc_wrq & ((G1_state.st_idle))));


--G1L217 is sdram:sdram|state~39 at LCCOMB_X19_Y3_N8
G1L217 = (G1L216 & G1L214);


--G1L218 is sdram:sdram|state~40 at LCCOMB_X12_Y3_N26
G1L218 = (G1_state.st_init_mrd) # ((G1_state.st_p0_rd_data) # (G1_state.st_p0_wr_pre));


--G1L219 is sdram:sdram|state~41 at LCCOMB_X12_Y3_N28
G1L219 = (G1L214 & ((G1L227) # ((G1L218 & !G1_WideOr0))));


--abc_xmemrd_q is abc_xmemrd_q at FF_X0_Y5_N24
--register power-up is high

abc_xmemrd_q = DFFEAS(A1L145, GLOBAL(V1L23),  ,  ,  , VCC, !GLOBAL(A1L424),  ,  );


--abc_xmem_done is abc_xmem_done at FF_X14_Y3_N31
--register power-up is low

abc_xmem_done = DFFEAS(A1L143, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_rack0_q is sdram:sdram|rack0_q at FF_X14_Y3_N25
--register power-up is low

G1_rack0_q = DFFEAS(G1L106, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--A1L132 is abc_rrq~0 at LCCOMB_X14_Y3_N16
A1L132 = (!abc_xmem_done & (!abc_xmemrd_q & !G1_rack0_q));


--abc_xmemwr_q is abc_xmemwr_q at FF_X14_Y3_N19
--register power-up is low

abc_xmemwr_q = DFFEAS(A1L152, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_wack0_q is sdram:sdram|wack0_q at FF_X19_Y3_N31
--register power-up is low

G1_wack0_q = DFFEAS(G1L95, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--A1L136 is abc_wrq~0 at LCCOMB_X14_Y3_N10
A1L136 = (!abc_xmem_done & (abc_xmemwr_q & !G1_wack0_q));


--G1L220 is sdram:sdram|state~42 at LCCOMB_X12_Y3_N20
G1L220 = (!abc_wrq & (G1_state.st_idle & (!G1_WideOr0 & abc_rrq)));


--G1L221 is sdram:sdram|state~43 at LCCOMB_X19_Y3_N2
G1L221 = (G1L214 & ((G1L220) # ((G1_WideOr0 & G1_state.st_p0_rd_cmd))));


--G1L222 is sdram:sdram|state~44 at LCCOMB_X16_Y3_N24
G1L222 = (G1L214 & ((G1_WideOr0 & ((G1_state.st_p0_rd_pre))) # (!G1_WideOr0 & (G1_state.st_p0_rd_cmd))));


--G1L149 is sdram:sdram|nop_ctr~0 at LCCOMB_X15_Y3_N14
G1L149 = (G1_state.st_init_rfsh1) # ((G1_state.st_init_rfsh2) # ((!G1L51 & G1_state.st_idle)));


--G1L1 is sdram:sdram|Add2~0 at LCCOMB_X15_Y3_N16
G1L1 = (!G1_nop_ctr[1] & !G1_nop_ctr[0]);


--G1L150 is sdram:sdram|nop_ctr~1 at LCCOMB_X15_Y3_N24
G1L150 = (G1_nop_ctr[2] & (((G1_nop_ctr[3])))) # (!G1_nop_ctr[2] & ((G1_nop_ctr[3] & ((!G1L1))) # (!G1_nop_ctr[3] & (G1L149 & G1L1))));


--G1L151 is sdram:sdram|nop_ctr~2 at LCCOMB_X15_Y3_N10
G1L151 = (G1_WideOr0 & ((G1L1 $ (G1_nop_ctr[2])))) # (!G1_WideOr0 & (G1_state.st_p0_wr_pre));


--G1L152 is sdram:sdram|nop_ctr~3 at LCCOMB_X16_Y3_N28
G1L152 = (G1_state.st_p0_rd_pre) # ((G1_state.st_p0_rd_data) # ((G1_init_ctr[15] & !G1_state.st_reset)));


--G1L153 is sdram:sdram|nop_ctr~4 at LCCOMB_X15_Y3_N2
G1L153 = (!G1_WideOr0 & ((G1L152) # ((G1L8 & G1_state.st_idle))));


--G1L154 is sdram:sdram|nop_ctr~5 at LCCOMB_X15_Y3_N4
G1L154 = (G1L153) # ((G1_WideOr0 & (G1_nop_ctr[0] $ (!G1_nop_ctr[1]))));


--G1L155 is sdram:sdram|nop_ctr~6 at LCCOMB_X17_Y3_N22
G1L155 = ((G1_state.st_p0_wr_cmd) # ((!G1L51 & G1_state.st_idle))) # (!G1L210);


--G1L156 is sdram:sdram|nop_ctr~7 at LCCOMB_X15_Y3_N6
G1L156 = (G1_WideOr0 & (!G1_nop_ctr[0])) # (!G1_WideOr0 & ((G1L155)));


--G1L223 is sdram:sdram|state~45 at LCCOMB_X12_Y3_N6
G1L223 = (G1L214 & ((G1_WideOr0 & ((G1_state.st_init_mrd))) # (!G1_WideOr0 & (G1_state.st_init_rfsh2))));


--G1_init_ctr[10] is sdram:sdram|init_ctr[10] at FF_X16_Y2_N21
--register power-up is low

G1_init_ctr[10] = DFFEAS(G1L126, GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7,  ,  ,  ,  );


--G1_init_ctr[9] is sdram:sdram|init_ctr[9] at FF_X15_Y3_N21
--register power-up is low

G1_init_ctr[9] = DFFEAS( , GLOBAL(V1L23), GLOBAL(A1L424),  , G1L7, G1_rfsh_ctr[9],  ,  , VCC);


--G1L7 is sdram:sdram|always0~0 at LCCOMB_X15_Y3_N20
G1L7 = G1_rfsh_ctr[9] $ (G1_init_ctr[9]);


--G1L224 is sdram:sdram|state~46 at LCCOMB_X16_Y3_N16
G1L224 = (G1L214 & ((G1_WideOr0 & ((G1_state.st_p0_wr_pre))) # (!G1_WideOr0 & (G1_state.st_p0_wr_cmd))));


--G1_is_rfsh is sdram:sdram|is_rfsh at FF_X17_Y3_N17
--register power-up is low

G1_is_rfsh = DFFEAS(G1L143, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L225 is sdram:sdram|state~47 at LCCOMB_X16_Y3_N14
G1L225 = (G1L214 & ((G1_WideOr0 & ((G1_state.st_p0_rd_data))) # (!G1_WideOr0 & (G1_state.st_p0_rd_pre))));


--L1_tx_reg[8] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8] at FF_X36_Y11_N11
--register power-up is low

L1_tx_reg[8] = DFFEAS(L1L115, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S2_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[1] at FF_X37_Y7_N21
--register power-up is low

S2_shift_reg[1] = DFFEAS(S2L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--L1_dffe11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11 at FF_X35_Y11_N9
--register power-up is low

L1_dffe11 = DFFEAS(L1L48, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S2L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~0 at LCCOMB_X37_Y7_N0
S2L7 = (L1_dffe11 & ((L1_tx_reg[8]))) # (!L1_dffe11 & (S2_shift_reg[1]));


--L1_tx_reg[9] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9] at FF_X37_Y9_N27
--register power-up is low

L1_tx_reg[9] = DFFEAS(L1L117, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S1_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[1] at FF_X37_Y7_N15
--register power-up is low

S1_shift_reg[1] = DFFEAS(S1L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S1L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~0 at LCCOMB_X37_Y7_N2
S1L7 = (L1_dffe11 & ((L1_tx_reg[9]))) # (!L1_dffe11 & (S1_shift_reg[1]));


--L1_tx_reg[18] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18] at FF_X37_Y11_N13
--register power-up is low

L1_tx_reg[18] = DFFEAS(L1L134, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S4_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[1] at FF_X37_Y11_N7
--register power-up is low

S4_shift_reg[1] = DFFEAS(S4L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S4L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~0 at LCCOMB_X37_Y11_N0
S4L7 = (L1_dffe11 & ((L1_tx_reg[18]))) # (!L1_dffe11 & (S4_shift_reg[1]));


--L1_tx_reg[19] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19] at FF_X37_Y11_N9
--register power-up is low

L1_tx_reg[19] = DFFEAS(L1L136, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S3_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[1] at FF_X37_Y11_N19
--register power-up is low

S3_shift_reg[1] = DFFEAS(S3L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S3L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~0 at LCCOMB_X37_Y11_N2
S3L7 = (L1_dffe11 & ((L1_tx_reg[19]))) # (!L1_dffe11 & (S3_shift_reg[1]));


--L1_tx_reg[28] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[28] at FF_X36_Y11_N21
--register power-up is low

L1_tx_reg[28] = DFFEAS( , GLOBAL(L1L155),  ,  ,  , C2_qreg[0],  ,  , VCC);


--S6_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[1] at FF_X36_Y11_N15
--register power-up is low

S6_shift_reg[1] = DFFEAS(S6L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S6L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~0 at LCCOMB_X36_Y11_N24
S6L7 = (L1_dffe11 & (L1_tx_reg[28])) # (!L1_dffe11 & ((S6_shift_reg[1])));


--L1_tx_reg[29] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[29] at FF_X38_Y9_N3
--register power-up is low

L1_tx_reg[29] = DFFEAS( , GLOBAL(L1L155),  ,  ,  , C3_qreg[0],  ,  , VCC);


--S5_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[1] at FF_X38_Y9_N5
--register power-up is low

S5_shift_reg[1] = DFFEAS(S5L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S5L7 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~0 at LCCOMB_X38_Y9_N24
S5L7 = (L1_dffe11 & ((L1_tx_reg[29]))) # (!L1_dffe11 & (S5_shift_reg[1]));


--L1_dffe22 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22 at FF_X31_Y11_N17
--register power-up is low

L1_dffe22 = DFFEAS(L1L71, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[1] at FF_X40_Y10_N5
--register power-up is low

Q2_shift_reg[1] = DFFEAS(Q2L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~0 at LCCOMB_X40_Y10_N24
Q2L9 = (L1_dffe22) # (Q2_shift_reg[1]);


--Q1_shift_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[1] at FF_X40_Y10_N23
--register power-up is low

Q1_shift_reg[1] = DFFEAS(Q1L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~0 at LCCOMB_X40_Y10_N2
Q1L9 = (L1_dffe22) # (Q1_shift_reg[1]);


--abc_do[0] is abc_do[0] at DDIOOUTCELL_X26_Y0_N25
--register power-up is low

abc_do[0] = DFFEAS(G1L158, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[1] is abc_do[1] at DDIOOUTCELL_X28_Y0_N25
--register power-up is low

abc_do[1] = DFFEAS(G1L159, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[2] is abc_do[2] at DDIOOUTCELL_X14_Y0_N18
--register power-up is low

abc_do[2] = DFFEAS(G1L160, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[3] is abc_do[3] at DDIOOUTCELL_X7_Y0_N25
--register power-up is low

abc_do[3] = DFFEAS(G1L161, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[4] is abc_do[4] at DDIOOUTCELL_X26_Y0_N18
--register power-up is low

abc_do[4] = DFFEAS(G1L162, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[5] is abc_do[5] at DDIOOUTCELL_X19_Y0_N11
--register power-up is low

abc_do[5] = DFFEAS(G1L163, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[6] is abc_do[6] at DDIOOUTCELL_X26_Y0_N4
--register power-up is low

abc_do[6] = DFFEAS(G1L164, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--abc_do[7] is abc_do[7] at DDIOOUTCELL_X23_Y0_N32
--register power-up is low

abc_do[7] = DFFEAS(G1L165, GLOBAL(V1L23),  ,  , A1L95,  ,  ,  ,  );


--G1_dram_d[0] is sdram:sdram|dram_d[0] at DDIOOUTCELL_X3_Y0_N18
--register power-up is low

G1_dram_d[0] = DFFEAS(G1L96, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L89Q is sdram:sdram|dram_d_en~_Duplicate_16 at FF_X16_Y3_N7
--register power-up is low

G1L89Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[1] is sdram:sdram|dram_d[1] at DDIOOUTCELL_X30_Y0_N11
--register power-up is low

G1_dram_d[1] = DFFEAS(G1L97, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[2] is sdram:sdram|dram_d[2] at DDIOOUTCELL_X16_Y0_N25
--register power-up is low

G1_dram_d[2] = DFFEAS(G1L98, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[3] is sdram:sdram|dram_d[3] at DDIOOUTCELL_X23_Y0_N25
--register power-up is low

G1_dram_d[3] = DFFEAS(G1L99, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[4] is sdram:sdram|dram_d[4] at DDIOOUTCELL_X26_Y0_N32
--register power-up is low

G1_dram_d[4] = DFFEAS(G1L100, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[5] is sdram:sdram|dram_d[5] at DDIOOUTCELL_X23_Y0_N11
--register power-up is low

G1_dram_d[5] = DFFEAS(G1L101, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[6] is sdram:sdram|dram_d[6] at DDIOOUTCELL_X30_Y0_N18
--register power-up is low

G1_dram_d[6] = DFFEAS(G1L102, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[7] is sdram:sdram|dram_d[7] at DDIOOUTCELL_X16_Y0_N11
--register power-up is low

G1_dram_d[7] = DFFEAS(G1L103, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[8] is sdram:sdram|dram_d[8] at DDIOOUTCELL_X26_Y0_N11
--register power-up is low

G1_dram_d[8] = DFFEAS(G1L96, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[9] is sdram:sdram|dram_d[9] at DDIOOUTCELL_X30_Y0_N4
--register power-up is low

G1_dram_d[9] = DFFEAS(G1L97, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[10] is sdram:sdram|dram_d[10] at DDIOOUTCELL_X16_Y0_N18
--register power-up is low

G1_dram_d[10] = DFFEAS(G1L98, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[11] is sdram:sdram|dram_d[11] at DDIOOUTCELL_X23_Y0_N18
--register power-up is low

G1_dram_d[11] = DFFEAS(G1L99, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[12] is sdram:sdram|dram_d[12] at DDIOOUTCELL_X3_Y0_N32
--register power-up is low

G1_dram_d[12] = DFFEAS(G1L100, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[13] is sdram:sdram|dram_d[13] at DDIOOUTCELL_X19_Y0_N32
--register power-up is low

G1_dram_d[13] = DFFEAS(G1L101, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[14] is sdram:sdram|dram_d[14] at DDIOOUTCELL_X28_Y0_N18
--register power-up is low

G1_dram_d[14] = DFFEAS(G1L102, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1_dram_d[15] is sdram:sdram|dram_d[15] at DDIOOUTCELL_X5_Y0_N11
--register power-up is low

G1_dram_d[15] = DFFEAS(G1L103, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L200 is sdram:sdram|state.st_init_rfsh1~0 at LCCOMB_X15_Y3_N12
G1L200 = (G1L214 & ((G1L48 & ((!G1_state.st_reset))) # (!G1L48 & (G1_state.st_init_rfsh1))));


--G1L226 is sdram:sdram|state~48 at LCCOMB_X12_Y3_N4
G1L226 = (G1L214 & ((G1_WideOr0 & ((G1_state.st_init_rfsh2))) # (!G1_WideOr0 & (G1_state.st_init_rfsh1))));


--A1L142 is abc_xmem_done~0 at LCCOMB_X14_Y3_N28
A1L142 = (!abc_xmemrd_q & ((abc_xmem_done) # (G1_rack0_q)));


--A1L143 is abc_xmem_done~1 at LCCOMB_X14_Y3_N30
A1L143 = (A1L142) # ((abc_xmemwr_q & ((G1_wack0_q) # (abc_xmem_done))));


--G1L106 is sdram:sdram|dram_q[0]~0 at LCCOMB_X14_Y3_N24
G1L106 = (!G1_WideOr0 & G1_state.st_p0_rd_data);


--A1L152 is abc_xmemwr~0 at LCCOMB_X14_Y3_N18
A1L152 = (A1L154 & (!A1L150)) # (!A1L154 & ((A1L138 & (!A1L150)) # (!A1L138 & ((!A1L148)))));


--G1L95 is sdram:sdram|dram_d~0 at LCCOMB_X19_Y3_N30
G1L95 = (G1_state.st_p0_wr_cmd & !G1_WideOr0);


--G1L143 is sdram:sdram|is_rfsh~0 at LCCOMB_X17_Y3_N16
G1L143 = (!G1_WideOr0 & (!G1L51 & G1_state.st_idle));


--C3_qreg[7] is tmdsenc:hdmitmds[2].enc|qreg[7] at FF_X36_Y10_N13
--register power-up is low

C3_qreg[7] = DFFEAS(C3L61, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6] at FF_X37_Y7_N17
--register power-up is low

L1_tx_reg[6] = DFFEAS(L1L111, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S2_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[2] at FF_X37_Y7_N11
--register power-up is low

S2_shift_reg[2] = DFFEAS(S2L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S2L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~1 at LCCOMB_X37_Y7_N20
S2L8 = (L1_dffe11 & ((L1_tx_reg[6]))) # (!L1_dffe11 & (S2_shift_reg[2]));


--L1_dffe7a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[2] at FF_X35_Y13_N1
--register power-up is low

L1_dffe7a[2] = DFFEAS(L1L38, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe3a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[0] at FF_X35_Y13_N11
--register power-up is low

L1_dffe3a[0] = DFFEAS(L1L9, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe7a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[0] at FF_X35_Y13_N29
--register power-up is low

L1_dffe7a[0] = DFFEAS( , GLOBAL(L1L73),  ,  , !L1_sync_dffe12a, L1_dffe5a[0],  ,  , VCC);


--L1_dffe3a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[2] at FF_X35_Y13_N23
--register power-up is low

L1_dffe3a[2] = DFFEAS(L1L13, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--L1L44 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~0 at LCCOMB_X35_Y13_N28
L1L44 = (L1_dffe3a[2] & (L1_dffe7a[2] & (L1_dffe7a[0] $ (!L1_dffe3a[0])))) # (!L1_dffe3a[2] & (!L1_dffe7a[2] & (L1_dffe7a[0] $ (!L1_dffe3a[0]))));


--L1_dffe8a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[2] at FF_X35_Y13_N17
--register power-up is low

L1_dffe8a[2] = DFFEAS( , GLOBAL(L1L73),  ,  , L1_sync_dffe12a, L1_dffe6a[2],  ,  , VCC);


--L1_dffe8a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[0] at FF_X35_Y13_N27
--register power-up is low

L1_dffe8a[0] = DFFEAS( , GLOBAL(L1L73),  ,  , L1_sync_dffe12a, L1_dffe6a[0],  ,  , VCC);


--L1_dffe4a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[0] at FF_X35_Y13_N13
--register power-up is low

L1_dffe4a[0] = DFFEAS(L1L16, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe4a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[2] at FF_X35_Y13_N7
--register power-up is low

L1_dffe4a[2] = DFFEAS(L1L20, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1L45 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~1 at LCCOMB_X35_Y13_N16
L1L45 = (L1_dffe4a[0] & (L1_dffe8a[0] & (L1_dffe8a[2] $ (!L1_dffe4a[2])))) # (!L1_dffe4a[0] & (!L1_dffe8a[0] & (L1_dffe8a[2] $ (!L1_dffe4a[2]))));


--L1_dffe8a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe8a[1] at FF_X30_Y11_N5
--register power-up is low

L1_dffe8a[1] = DFFEAS( , GLOBAL(L1L73),  ,  , L1_sync_dffe12a, L1_dffe6a[1],  ,  , VCC);


--L1_dffe4a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[1] at FF_X30_Y11_N25
--register power-up is low

L1_dffe4a[1] = DFFEAS(L1L18, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_sync_dffe12a is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a at FF_X32_Y11_N25
--register power-up is low

L1_sync_dffe12a = DFFEAS( , GLOBAL(L1L155),  ,  ,  , L1L97,  ,  , VCC);


--L1L46 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~2 at LCCOMB_X30_Y11_N4
L1L46 = (!L1_sync_dffe12a & (L1_dffe4a[1] $ (!L1_dffe8a[1])));


--L1_dffe7a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[1] at FF_X30_Y11_N1
--register power-up is low

L1_dffe7a[1] = DFFEAS( , GLOBAL(L1L73),  ,  , !L1_sync_dffe12a, L1_dffe5a[1],  ,  , VCC);


--L1_dffe3a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[1] at FF_X30_Y11_N13
--register power-up is low

L1_dffe3a[1] = DFFEAS(L1L11, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--L1L47 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~3 at LCCOMB_X30_Y11_N0
L1L47 = (L1_sync_dffe12a & (L1_dffe3a[1] $ (!L1_dffe7a[1])));


--L1L48 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe11~4 at LCCOMB_X35_Y11_N8
L1L48 = (L1L46 & ((L1L45) # ((L1L47 & L1L44)))) # (!L1L46 & (((L1L47 & L1L44))));


--L1_tx_reg[7] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7] at FF_X35_Y9_N19
--register power-up is low

L1_tx_reg[7] = DFFEAS(L1L113, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S1_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[2] at FF_X37_Y7_N5
--register power-up is low

S1_shift_reg[2] = DFFEAS(S1L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S1L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~1 at LCCOMB_X37_Y7_N14
S1L8 = (L1_dffe11 & (L1_tx_reg[7])) # (!L1_dffe11 & ((S1_shift_reg[2])));


--C1_qreg[3] is tmdsenc:hdmitmds[0].enc|qreg[3] at FF_X38_Y10_N13
--register power-up is low

C1_qreg[3] = DFFEAS(C1L63, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[16] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16] at FF_X37_Y9_N29
--register power-up is low

L1_tx_reg[16] = DFFEAS(L1L131, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S4_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[2] at FF_X37_Y11_N29
--register power-up is low

S4_shift_reg[2] = DFFEAS(S4L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S4L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~1 at LCCOMB_X37_Y11_N6
S4L8 = (L1_dffe11 & (L1_tx_reg[16])) # (!L1_dffe11 & ((S4_shift_reg[2])));


--C2_qreg[3] is tmdsenc:hdmitmds[1].enc|qreg[3] at FF_X35_Y9_N21
--register power-up is low

C2_qreg[3] = DFFEAS(C2L60, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[17] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[17] at FF_X37_Y11_N15
--register power-up is low

L1_tx_reg[17] = DFFEAS( , GLOBAL(L1L155),  ,  ,  , C3_qreg[4],  ,  , VCC);


--S3_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[2] at FF_X37_Y11_N25
--register power-up is low

S3_shift_reg[2] = DFFEAS(S3L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S3L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~1 at LCCOMB_X37_Y11_N18
S3L8 = (L1_dffe11 & ((L1_tx_reg[17]))) # (!L1_dffe11 & (S3_shift_reg[2]));


--L1_tx_reg[26] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[26] at FF_X36_Y11_N1
--register power-up is low

L1_tx_reg[26] = DFFEAS( , GLOBAL(L1L155),  ,  ,  , C3_qreg[1],  ,  , VCC);


--S6_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[2] at FF_X36_Y11_N27
--register power-up is low

S6_shift_reg[2] = DFFEAS(S6L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S6L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~1 at LCCOMB_X36_Y11_N14
S6L8 = (L1_dffe11 & (L1_tx_reg[26])) # (!L1_dffe11 & ((S6_shift_reg[2])));


--L1_tx_reg[27] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27] at FF_X38_Y9_N7
--register power-up is low

L1_tx_reg[27] = DFFEAS(L1L150, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S5_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[2] at FF_X38_Y9_N9
--register power-up is low

S5_shift_reg[2] = DFFEAS(S5L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S5L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~1 at LCCOMB_X38_Y9_N4
S5L8 = (L1_dffe11 & (L1_tx_reg[27])) # (!L1_dffe11 & ((S5_shift_reg[2])));


--L1_dffe18a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[2] at FF_X30_Y11_N15
--register power-up is low

L1_dffe18a[2] = DFFEAS( , GLOBAL(L1L73),  ,  , !L1_sync_dffe12a, L1_dffe16a[2],  ,  , VCC);


--L1_dffe14a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[0] at FF_X30_Y11_N21
--register power-up is low

L1_dffe14a[0] = DFFEAS(L1L51, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe18a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[0] at FF_X30_Y11_N19
--register power-up is low

L1_dffe18a[0] = DFFEAS(L1L65, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe14a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[2] at FF_X30_Y11_N11
--register power-up is low

L1_dffe14a[2] = DFFEAS(L1L55, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--L1L70 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22~0 at LCCOMB_X30_Y11_N14
L1L70 = (L1_dffe14a[2] & (L1_dffe18a[2] & (L1_dffe14a[0] $ (!L1_dffe18a[0])))) # (!L1_dffe14a[2] & (!L1_dffe18a[2] & (L1_dffe14a[0] $ (!L1_dffe18a[0]))));


--L1_dffe18a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[1] at FF_X35_Y13_N25
--register power-up is low

L1_dffe18a[1] = DFFEAS(L1L67, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe14a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[1] at FF_X31_Y11_N11
--register power-up is low

L1_dffe14a[1] = DFFEAS(L1L53, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--L1L71 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe22~1 at LCCOMB_X31_Y11_N16
L1L71 = (L1_sync_dffe12a & (L1L70 & (L1_dffe14a[1] $ (!L1_dffe18a[1]))));


--Q2_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[2] at FF_X40_Y10_N9
--register power-up is low

Q2_shift_reg[2] = DFFEAS(Q2L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~1 at LCCOMB_X40_Y10_N4
Q2L10 = (L1_dffe22) # (Q2_shift_reg[2]);


--Q1_shift_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[2] at FF_X40_Y10_N27
--register power-up is low

Q1_shift_reg[2] = DFFEAS(Q1L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~1 at LCCOMB_X40_Y10_N22
Q1L10 = (L1_dffe22) # (Q1_shift_reg[2]);


--G1_dram_q[8] is sdram:sdram|dram_q[8] at FF_X26_Y0_N10
--register power-up is low

G1_dram_q[8] = DFFEAS(A1L529, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[0] is sdram:sdram|dram_q[0] at FF_X3_Y0_N17
--register power-up is low

G1_dram_q[0] = DFFEAS(A1L505, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L158 is sdram:sdram|rd0[0]~0 at LCCOMB_X26_Y1_N24
G1L158 = (A1L27 & (G1_dram_q[8])) # (!A1L27 & ((G1_dram_q[0])));


--A1L95 is abc_do[0]~0 at LCCOMB_X14_Y3_N6
A1L95 = (rst_n & G1_rack0_q);


--G1_dram_q[9] is sdram:sdram|dram_q[9] at FF_X30_Y0_N3
--register power-up is low

G1_dram_q[9] = DFFEAS(A1L532, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[1] is sdram:sdram|dram_q[1] at FF_X30_Y0_N10
--register power-up is low

G1_dram_q[1] = DFFEAS(A1L508, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L159 is sdram:sdram|rd0[1]~1 at LCCOMB_X28_Y1_N24
G1L159 = (A1L27 & ((G1_dram_q[9]))) # (!A1L27 & (G1_dram_q[1]));


--G1_dram_q[10] is sdram:sdram|dram_q[10] at FF_X16_Y0_N17
--register power-up is low

G1_dram_q[10] = DFFEAS(A1L535, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[2] is sdram:sdram|dram_q[2] at FF_X16_Y0_N24
--register power-up is low

G1_dram_q[2] = DFFEAS(A1L511, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L160 is sdram:sdram|rd0[2]~2 at LCCOMB_X16_Y1_N26
G1L160 = (A1L27 & (G1_dram_q[10])) # (!A1L27 & ((G1_dram_q[2])));


--G1_dram_q[11] is sdram:sdram|dram_q[11] at FF_X23_Y0_N17
--register power-up is low

G1_dram_q[11] = DFFEAS(A1L538, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[3] is sdram:sdram|dram_q[3] at FF_X23_Y0_N24
--register power-up is low

G1_dram_q[3] = DFFEAS(A1L514, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L161 is sdram:sdram|rd0[3]~3 at LCCOMB_X22_Y1_N16
G1L161 = (A1L27 & (G1_dram_q[11])) # (!A1L27 & ((G1_dram_q[3])));


--G1_dram_q[12] is sdram:sdram|dram_q[12] at FF_X3_Y0_N31
--register power-up is low

G1_dram_q[12] = DFFEAS(A1L541, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[4] is sdram:sdram|dram_q[4] at FF_X26_Y0_N31
--register power-up is low

G1_dram_q[4] = DFFEAS(A1L517, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L162 is sdram:sdram|rd0[4]~4 at LCCOMB_X26_Y1_N26
G1L162 = (A1L27 & ((G1_dram_q[12]))) # (!A1L27 & (G1_dram_q[4]));


--G1_dram_q[13] is sdram:sdram|dram_q[13] at FF_X19_Y0_N31
--register power-up is low

G1_dram_q[13] = DFFEAS(A1L544, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[5] is sdram:sdram|dram_q[5] at FF_X23_Y0_N10
--register power-up is low

G1_dram_q[5] = DFFEAS(A1L520, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L163 is sdram:sdram|rd0[5]~5 at LCCOMB_X19_Y1_N24
G1L163 = (A1L27 & (G1_dram_q[13])) # (!A1L27 & ((G1_dram_q[5])));


--G1_dram_q[14] is sdram:sdram|dram_q[14] at FF_X28_Y0_N17
--register power-up is low

G1_dram_q[14] = DFFEAS(A1L547, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[6] is sdram:sdram|dram_q[6] at FF_X30_Y0_N17
--register power-up is low

G1_dram_q[6] = DFFEAS(A1L523, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L164 is sdram:sdram|rd0[6]~6 at LCCOMB_X31_Y1_N8
G1L164 = (A1L27 & ((G1_dram_q[14]))) # (!A1L27 & (G1_dram_q[6]));


--G1_dram_q[15] is sdram:sdram|dram_q[15] at FF_X5_Y0_N10
--register power-up is low

G1_dram_q[15] = DFFEAS(A1L550, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1_dram_q[7] is sdram:sdram|dram_q[7] at FF_X16_Y0_N10
--register power-up is low

G1_dram_q[7] = DFFEAS(A1L526, GLOBAL(V1L23),  ,  , G1L107,  ,  ,  ,  );


--G1L165 is sdram:sdram|rd0[7]~7 at LCCOMB_X22_Y1_N26
G1L165 = (A1L27 & (G1_dram_q[15])) # (!A1L27 & ((G1_dram_q[7])));


--G1L96 is sdram:sdram|dram_d~1 at LCCOMB_X19_Y3_N16
G1L96 = (A1L66 & (G1_state.st_p0_wr_cmd & !G1_WideOr0));


--G1L73 is sdram:sdram|dram_d_en~1 at LCCOMB_X16_Y3_N6
G1L73 = (G1_WideOr0 & (((G1L89Q)))) # (!G1_WideOr0 & ((G1_state.st_p0_rd_data) # ((!G1L72))));


--G1L97 is sdram:sdram|dram_d~2 at LCCOMB_X32_Y3_N24
G1L97 = (G1_state.st_p0_wr_cmd & (!G1_WideOr0 & A1L69));


--G1L98 is sdram:sdram|dram_d~3 at LCCOMB_X17_Y3_N26
G1L98 = (A1L72 & (G1_state.st_p0_wr_cmd & !G1_WideOr0));


--G1L99 is sdram:sdram|dram_d~4 at LCCOMB_X19_Y3_N10
G1L99 = (!G1_WideOr0 & (G1_state.st_p0_wr_cmd & A1L75));


--G1L100 is sdram:sdram|dram_d~5 at LCCOMB_X20_Y3_N24
G1L100 = (A1L78 & (!G1_WideOr0 & G1_state.st_p0_wr_cmd));


--G1L101 is sdram:sdram|dram_d~6 at LCCOMB_X19_Y1_N26
G1L101 = (!G1_WideOr0 & (A1L81 & G1_state.st_p0_wr_cmd));


--G1L102 is sdram:sdram|dram_d~7 at LCCOMB_X15_Y3_N30
G1L102 = (!G1_WideOr0 & (G1_state.st_p0_wr_cmd & A1L84));


--G1L103 is sdram:sdram|dram_d~8 at LCCOMB_X14_Y3_N8
G1L103 = (A1L87 & (!G1_WideOr0 & G1_state.st_p0_wr_cmd));


--C1_denreg is tmdsenc:hdmitmds[0].enc|denreg at FF_X37_Y9_N15
--register power-up is low

C1_denreg = DFFEAS(C1L30, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--dummydata[0] is dummydata[0] at FF_X35_Y10_N21
--register power-up is low

dummydata[0] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[23],  ,  , VCC);


--dummydata[23] is dummydata[23] at FF_X35_Y10_N9
--register power-up is low

dummydata[23] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[22],  ,  , VCC);


--dummydata[21] is dummydata[21] at FF_X35_Y10_N1
--register power-up is low

dummydata[21] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[20],  ,  , VCC);


--dummydata[22] is dummydata[22] at FF_X35_Y10_N25
--register power-up is low

dummydata[22] = DFFEAS(A1L189, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[19] is dummydata[19] at FF_X35_Y12_N9
--register power-up is low

dummydata[19] = DFFEAS(A1L184, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[20] is dummydata[20] at FF_X35_Y10_N27
--register power-up is low

dummydata[20] = DFFEAS(A1L186, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[17] is dummydata[17] at FF_X35_Y10_N17
--register power-up is low

dummydata[17] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[16],  ,  , VCC);


--dummydata[18] is dummydata[18] at FF_X35_Y10_N19
--register power-up is low

dummydata[18] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[17],  ,  , VCC);


--C3L4 is tmdsenc:hdmitmds[2].enc|Add4~2 at LCCOMB_X35_Y10_N2
C3L4 = dummydata[17] $ (dummydata[19] $ (dummydata[20] $ (!dummydata[18])));


--C3L5 is tmdsenc:hdmitmds[2].enc|Add4~3 at LCCOMB_X35_Y10_N22
C3L5 = dummydata[23] $ (dummydata[22] $ (dummydata[21] $ (C3L4)));


--C3L27 is tmdsenc:hdmitmds[2].enc|Equal0~0 at LCCOMB_X36_Y8_N8
C3L27 = (!C3_disparity[1] & (!C3_disparity[0] & (!C3_disparity[2] & !C3_disparity[3])));


--C3L1 is tmdsenc:hdmitmds[2].enc|Add2~0 at LCCOMB_X35_Y10_N0
C3L1 = dummydata[23] $ (dummydata[22] $ (dummydata[21] $ (!dummydata[0])));


--C3L6 is tmdsenc:hdmitmds[2].enc|Add4~4 at LCCOMB_X35_Y10_N16
C3L6 = dummydata[17] $ (dummydata[18]);


--C3L12 is tmdsenc:hdmitmds[2].enc|Add6~0 at LCCOMB_X35_Y10_N12
C3L12 = (C3L1 & (dummydata[20] $ (dummydata[19] $ (!C3L6))));


--C3L10 is tmdsenc:hdmitmds[2].enc|Add5~0 at LCCOMB_X35_Y10_N10
C3L10 = (dummydata[20] & ((dummydata[19] & ((dummydata[17]) # (dummydata[18]))) # (!dummydata[19] & ((!dummydata[18]) # (!dummydata[17]))))) # (!dummydata[20] & ((dummydata[19] & (dummydata[17] & dummydata[18])) # (!dummydata[19] & ((dummydata[17]) # (dummydata[18])))));


--C3L2 is tmdsenc:hdmitmds[2].enc|Add2~1 at LCCOMB_X35_Y10_N8
C3L2 = (dummydata[0] & ((dummydata[21] & ((!dummydata[22]) # (!dummydata[23]))) # (!dummydata[21] & (!dummydata[23] & !dummydata[22])))) # (!dummydata[0] & ((dummydata[21] & ((dummydata[23]) # (dummydata[22]))) # (!dummydata[21] & ((!dummydata[22]) # (!dummydata[23])))));


--C3L11 is tmdsenc:hdmitmds[2].enc|Add5~1 at LCCOMB_X35_Y10_N18
C3L11 = (dummydata[20] & (!dummydata[19] & (dummydata[18] & dummydata[17])));


--C3L3 is tmdsenc:hdmitmds[2].enc|Add2~2 at LCCOMB_X35_Y10_N20
C3L3 = (!dummydata[23] & (dummydata[21] & (!dummydata[0] & !dummydata[22])));


--C3L13 is tmdsenc:hdmitmds[2].enc|Add6~1 at LCCOMB_X35_Y10_N28
C3L13 = C3L11 $ (C3L3);


--C3L14 is tmdsenc:hdmitmds[2].enc|Add6~2 at LCCOMB_X35_Y10_N6
C3L14 = C3L13 $ (((C3L10 & ((C3L2) # (C3L12))) # (!C3L10 & (C3L2 & C3L12))));


--C3L15 is tmdsenc:hdmitmds[2].enc|Add6~3 at LCCOMB_X35_Y10_N4
C3L15 = dummydata[20] $ (dummydata[19] $ (C3L6 $ (!C3L1)));


--C3L16 is tmdsenc:hdmitmds[2].enc|Add6~4 at LCCOMB_X35_Y10_N30
C3L16 = C3L10 $ (C3L12 $ (C3L2));


--C3L28 is tmdsenc:hdmitmds[2].enc|always1~0 at LCCOMB_X36_Y8_N2
C3L28 = (C3L27) # ((C3L14 & (!C3L16 & !C3L15)));


--C3L44 is tmdsenc:hdmitmds[2].enc|dx[8]~0 at LCCOMB_X36_Y8_N12
C3L44 = (dummydata[17] & (C3L14 & ((C3L16) # (C3L15)))) # (!dummydata[17] & (((C3L14) # (!C3L15)) # (!C3L16)));


--C3L7 is tmdsenc:hdmitmds[2].enc|Add4~5 at LCCOMB_X36_Y10_N14
C3L7 = C3L14 $ (C3_disparity[3]);


--C3L60 is tmdsenc:hdmitmds[2].enc|qreg~0 at LCCOMB_X36_Y10_N24
C3L60 = C3L5 $ (((!C3L28 & (C3L44 $ (!C3L7)))));


--C3L61 is tmdsenc:hdmitmds[2].enc|qreg~1 at LCCOMB_X36_Y10_N12
C3L61 = (dummydata[0] $ (C3L60)) # (!C1_denreg);


--C1_qreg[7] is tmdsenc:hdmitmds[0].enc|qreg[7] at FF_X38_Y10_N23
--register power-up is low

C1_qreg[7] = DFFEAS(C1L65, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4] at FF_X33_Y7_N25
--register power-up is low

L1_tx_reg[4] = DFFEAS(L1L108, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S2_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[3] at FF_X37_Y7_N23
--register power-up is low

S2_shift_reg[3] = DFFEAS(S2L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~2 at LCCOMB_X37_Y7_N10
S2L9 = (L1_dffe11 & ((L1_tx_reg[4]))) # (!L1_dffe11 & (S2_shift_reg[3]));


--L1_dffe5a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[2] at FF_X35_Y13_N19
--register power-up is low

L1_dffe5a[2] = DFFEAS( , GLOBAL(L1L73),  ,  , L1_sync_dffe12a, L1_dffe3a[2],  ,  , VCC);


--N2_counter_reg_bit[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[0] at FF_X32_Y11_N27
--register power-up is low

N2_counter_reg_bit[0] = DFFEAS(N2L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--L1_dffe5a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[0] at FF_X35_Y13_N5
--register power-up is low

L1_dffe5a[0] = DFFEAS(L1L23, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--N2_counter_reg_bit[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[2] at FF_X32_Y11_N21
--register power-up is low

N2_counter_reg_bit[2] = DFFEAS(N2L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--L1_dffe6a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[2] at FF_X35_Y13_N31
--register power-up is low

L1_dffe6a[2] = DFFEAS(L1L33, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe6a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[0] at FF_X35_Y13_N9
--register power-up is low

L1_dffe6a[0] = DFFEAS(L1L29, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--L1_dffe6a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[1] at FF_X30_Y11_N23
--register power-up is low

L1_dffe6a[1] = DFFEAS(L1L31, GLOBAL(L1L73),  ,  , !L1_sync_dffe12a,  ,  ,  ,  );


--N2_counter_reg_bit[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit[1] at FF_X32_Y11_N23
--register power-up is low

N2_counter_reg_bit[1] = DFFEAS(N2L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--L1_dffe5a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[1] at FF_X30_Y11_N9
--register power-up is low

L1_dffe5a[1] = DFFEAS(L1L25, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--dummydata[7] is dummydata[7] at FF_X39_Y10_N23
--register power-up is low

dummydata[7] = DFFEAS(A1L168, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[8] is dummydata[8] at FF_X39_Y10_N19
--register power-up is low

dummydata[8] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[7],  ,  , VCC);


--dummydata[5] is dummydata[5] at FF_X39_Y10_N15
--register power-up is low

dummydata[5] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[4],  ,  , VCC);


--dummydata[6] is dummydata[6] at FF_X39_Y10_N11
--register power-up is low

dummydata[6] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[5],  ,  , VCC);


--C1L1 is tmdsenc:hdmitmds[0].enc|Add2~0 at LCCOMB_X39_Y10_N10
C1L1 = dummydata[7] $ (dummydata[5] $ (dummydata[6] $ (dummydata[8])));


--dummydata[3] is dummydata[3] at FF_X39_Y10_N5
--register power-up is low

dummydata[3] = DFFEAS(A1L163, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[4] is dummydata[4] at FF_X39_Y10_N31
--register power-up is low

dummydata[4] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[3],  ,  , VCC);


--dummydata[1] is dummydata[1] at FF_X39_Y10_N9
--register power-up is low

dummydata[1] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[0],  ,  , VCC);


--dummydata[2] is dummydata[2] at FF_X39_Y10_N29
--register power-up is low

dummydata[2] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[1],  ,  , VCC);


--C1L4 is tmdsenc:hdmitmds[0].enc|Add4~2 at LCCOMB_X39_Y10_N8
C1L4 = dummydata[1] $ (dummydata[2]);


--C1L12 is tmdsenc:hdmitmds[0].enc|Add6~0 at LCCOMB_X39_Y10_N30
C1L12 = (C1L1 & (dummydata[3] $ (dummydata[4] $ (C1L4))));


--C1L10 is tmdsenc:hdmitmds[0].enc|Add5~0 at LCCOMB_X39_Y10_N12
C1L10 = (dummydata[2] & ((dummydata[3] & ((dummydata[4]) # (!dummydata[1]))) # (!dummydata[3] & (dummydata[4] & !dummydata[1])))) # (!dummydata[2] & ((dummydata[3] & ((dummydata[1]) # (!dummydata[4]))) # (!dummydata[3] & ((dummydata[4]) # (!dummydata[1])))));


--C1L2 is tmdsenc:hdmitmds[0].enc|Add2~1 at LCCOMB_X39_Y10_N14
C1L2 = (dummydata[7] & ((dummydata[8] & (dummydata[5] & dummydata[6])) # (!dummydata[8] & ((dummydata[5]) # (dummydata[6]))))) # (!dummydata[7] & ((dummydata[8] & ((dummydata[5]) # (dummydata[6]))) # (!dummydata[8] & ((!dummydata[6]) # (!dummydata[5])))));


--C1L11 is tmdsenc:hdmitmds[0].enc|Add5~1 at LCCOMB_X39_Y10_N28
C1L11 = (!dummydata[1] & (dummydata[4] & (!dummydata[2] & dummydata[3])));


--C1L3 is tmdsenc:hdmitmds[0].enc|Add2~2 at LCCOMB_X39_Y10_N18
C1L3 = (!dummydata[7] & (dummydata[5] & (!dummydata[8] & dummydata[6])));


--C1L13 is tmdsenc:hdmitmds[0].enc|Add6~1 at LCCOMB_X38_Y11_N8
C1L13 = C1L11 $ (C1L3);


--C1L14 is tmdsenc:hdmitmds[0].enc|Add6~2 at LCCOMB_X39_Y10_N20
C1L14 = C1L13 $ (((C1L10 & ((C1L2) # (C1L12))) # (!C1L10 & (C1L2 & C1L12))));


--C1L15 is tmdsenc:hdmitmds[0].enc|Add6~3 at LCCOMB_X39_Y10_N0
C1L15 = C1L1 $ (dummydata[3] $ (dummydata[4] $ (C1L4)));


--C1L16 is tmdsenc:hdmitmds[0].enc|Add6~4 at LCCOMB_X39_Y10_N2
C1L16 = C1L2 $ (C1L12 $ (C1L10));


--C1L46 is tmdsenc:hdmitmds[0].enc|dx[8]~0 at LCCOMB_X37_Y10_N8
C1L46 = (C1L14 & ((C1L16) # ((C1L15) # (dummydata[1])))) # (!C1L14 & (dummydata[1] & ((!C1L15) # (!C1L16))));


--C1L27 is tmdsenc:hdmitmds[0].enc|Equal0~0 at LCCOMB_X37_Y10_N10
C1L27 = (!C1_disparity[1] & (!C1_disparity[2] & (!C1_disparity[3] & !C1_disparity[0])));


--C1L28 is tmdsenc:hdmitmds[0].enc|always1~0 at LCCOMB_X37_Y10_N12
C1L28 = (C1L27) # ((!C1L15 & (!C1L16 & C1L14)));


--C1L5 is tmdsenc:hdmitmds[0].enc|Add4~3 at LCCOMB_X39_Y10_N26
C1L5 = dummydata[2] $ (dummydata[3] $ (dummydata[4] $ (dummydata[1])));


--C1L6 is tmdsenc:hdmitmds[0].enc|Add4~4 at LCCOMB_X39_Y10_N6
C1L6 = dummydata[6] $ (dummydata[5] $ (C1L5 $ (!dummydata[7])));


--C1L7 is tmdsenc:hdmitmds[0].enc|Add4~5 at LCCOMB_X37_Y10_N6
C1L7 = C1L14 $ (C1_disparity[3]);


--C1L62 is tmdsenc:hdmitmds[0].enc|qreg~0 at LCCOMB_X38_Y10_N16
C1L62 = C1L6 $ (((C1L28 & ((!C1L46))) # (!C1L28 & (C1L7))));


--C2_qreg[7] is tmdsenc:hdmitmds[1].enc|qreg[7] at FF_X35_Y9_N7
--register power-up is low

C2_qreg[7] = DFFEAS(C2L63, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[5] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[5] at FF_X37_Y7_N25
--register power-up is low

L1_tx_reg[5] = DFFEAS( , GLOBAL(L1L155),  ,  ,  , C3_qreg[8],  ,  , VCC);


--S1_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[3] at FF_X37_Y7_N27
--register power-up is low

S1_shift_reg[3] = DFFEAS(S1L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~2 at LCCOMB_X37_Y7_N4
S1L9 = (L1_dffe11 & (L1_tx_reg[5])) # (!L1_dffe11 & ((S1_shift_reg[3])));


--C1L63 is tmdsenc:hdmitmds[0].enc|qreg~1 at LCCOMB_X38_Y10_N12
C1L63 = (C1L5 $ (((C1L28) # (C1L9)))) # (!C1_denreg);


--L1_tx_reg[14] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14] at FF_X37_Y11_N27
--register power-up is low

L1_tx_reg[14] = DFFEAS(L1L127, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S4_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[3] at FF_X37_Y11_N21
--register power-up is low

S4_shift_reg[3] = DFFEAS(S4L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S4L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~2 at LCCOMB_X37_Y11_N28
S4L9 = (L1_dffe11 & ((L1_tx_reg[14]))) # (!L1_dffe11 & (S4_shift_reg[3]));


--dummydata[11] is dummydata[11] at FF_X33_Y9_N31
--register power-up is low

dummydata[11] = DFFEAS(A1L174, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[12] is dummydata[12] at FF_X33_Y9_N9
--register power-up is low

dummydata[12] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[11],  ,  , VCC);


--dummydata[9] is dummydata[9] at FF_X33_Y9_N27
--register power-up is low

dummydata[9] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[8],  ,  , VCC);


--dummydata[10] is dummydata[10] at FF_X33_Y9_N13
--register power-up is low

dummydata[10] = DFFEAS(A1L172, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--C2L4 is tmdsenc:hdmitmds[1].enc|Add4~2 at LCCOMB_X33_Y9_N16
C2L4 = dummydata[10] $ (dummydata[11] $ (dummydata[12] $ (!dummydata[9])));


--C2L27 is tmdsenc:hdmitmds[1].enc|Equal0~0 at LCCOMB_X36_Y9_N18
C2L27 = (!C2_disparity[1] & (!C2_disparity[2] & (!C2_disparity[3] & !C2_disparity[0])));


--dummydata[15] is dummydata[15] at FF_X33_Y9_N11
--register power-up is low

dummydata[15] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[14],  ,  , VCC);


--dummydata[16] is dummydata[16] at FF_X35_Y8_N1
--register power-up is low

dummydata[16] = DFFEAS(A1L180, GLOBAL(V1L27),  ,  ,  ,  ,  ,  ,  );


--dummydata[13] is dummydata[13] at FF_X33_Y9_N5
--register power-up is low

dummydata[13] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[12],  ,  , VCC);


--dummydata[14] is dummydata[14] at FF_X33_Y9_N23
--register power-up is low

dummydata[14] = DFFEAS( , GLOBAL(V1L27),  ,  ,  , dummydata[13],  ,  , VCC);


--C2L1 is tmdsenc:hdmitmds[1].enc|Add2~0 at LCCOMB_X33_Y9_N22
C2L1 = dummydata[13] $ (dummydata[16] $ (dummydata[14] $ (!dummydata[15])));


--C2L5 is tmdsenc:hdmitmds[1].enc|Add4~3 at LCCOMB_X33_Y9_N28
C2L5 = dummydata[10] $ (!dummydata[9]);


--C2L12 is tmdsenc:hdmitmds[1].enc|Add6~0 at LCCOMB_X33_Y9_N18
C2L12 = (C2L1 & (dummydata[11] $ (dummydata[12] $ (C2L5))));


--C2L10 is tmdsenc:hdmitmds[1].enc|Add5~0 at LCCOMB_X33_Y9_N8
C2L10 = (dummydata[11] & ((dummydata[10] & ((!dummydata[9]) # (!dummydata[12]))) # (!dummydata[10] & (!dummydata[12] & !dummydata[9])))) # (!dummydata[11] & ((dummydata[10] & ((dummydata[12]) # (dummydata[9]))) # (!dummydata[10] & ((!dummydata[9]) # (!dummydata[12])))));


--C2L2 is tmdsenc:hdmitmds[1].enc|Add2~1 at LCCOMB_X33_Y9_N4
C2L2 = (dummydata[15] & ((dummydata[16] & ((!dummydata[14]) # (!dummydata[13]))) # (!dummydata[16] & (!dummydata[13] & !dummydata[14])))) # (!dummydata[15] & ((dummydata[16] & ((dummydata[13]) # (dummydata[14]))) # (!dummydata[16] & ((!dummydata[14]) # (!dummydata[13])))));


--C2L11 is tmdsenc:hdmitmds[1].enc|Add5~1 at LCCOMB_X33_Y9_N26
C2L11 = (dummydata[10] & (!dummydata[12] & (!dummydata[9] & !dummydata[11])));


--C2L3 is tmdsenc:hdmitmds[1].enc|Add2~2 at LCCOMB_X33_Y9_N10
C2L3 = (!dummydata[14] & (dummydata[16] & (!dummydata[15] & !dummydata[13])));


--C2L13 is tmdsenc:hdmitmds[1].enc|Add6~1 at LCCOMB_X33_Y9_N14
C2L13 = C2L11 $ (C2L3);


--C2L14 is tmdsenc:hdmitmds[1].enc|Add6~2 at LCCOMB_X33_Y9_N24
C2L14 = C2L13 $ (((C2L10 & ((C2L2) # (C2L12))) # (!C2L10 & (C2L2 & C2L12))));


--C2L15 is tmdsenc:hdmitmds[1].enc|Add6~3 at LCCOMB_X33_Y9_N2
C2L15 = C2L1 $ (dummydata[11] $ (dummydata[12] $ (C2L5)));


--C2L16 is tmdsenc:hdmitmds[1].enc|Add6~4 at LCCOMB_X33_Y9_N6
C2L16 = C2L2 $ (C2L10 $ (C2L12));


--C2L28 is tmdsenc:hdmitmds[1].enc|always1~0 at LCCOMB_X36_Y9_N4
C2L28 = (C2L27) # ((C2L14 & (!C2L16 & !C2L15)));


--C2L44 is tmdsenc:hdmitmds[1].enc|dx[8]~0 at LCCOMB_X36_Y9_N22
C2L44 = (dummydata[9] & (((C2L14) # (!C2L15)) # (!C2L16))) # (!dummydata[9] & (C2L14 & ((C2L16) # (C2L15))));


--C2L6 is tmdsenc:hdmitmds[1].enc|Add4~4 at LCCOMB_X35_Y9_N2
C2L6 = C2_disparity[3] $ (C2L14);


--C2L60 is tmdsenc:hdmitmds[1].enc|qreg~0 at LCCOMB_X35_Y9_N20
C2L60 = (C2L4 $ (((C2L9) # (C2L28)))) # (!C1_denreg);


--L1_tx_reg[15] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15] at FF_X37_Y9_N17
--register power-up is low

L1_tx_reg[15] = DFFEAS(L1L129, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S3_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[3] at FF_X37_Y11_N23
--register power-up is low

S3_shift_reg[3] = DFFEAS(S3L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S3L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~2 at LCCOMB_X37_Y11_N24
S3L9 = (L1_dffe11 & (L1_tx_reg[15])) # (!L1_dffe11 & ((S3_shift_reg[3])));


--C2L61 is tmdsenc:hdmitmds[1].enc|qreg~1 at LCCOMB_X36_Y9_N0
C2L61 = dummydata[9] $ (((C2L28 & ((C2L44))) # (!C2L28 & (!C2L6))));


--L1_tx_reg[24] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24] at FF_X36_Y11_N29
--register power-up is low

L1_tx_reg[24] = DFFEAS(L1L146, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S6_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[3] at FF_X36_Y11_N23
--register power-up is low

S6_shift_reg[3] = DFFEAS(S6L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S6L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~2 at LCCOMB_X36_Y11_N26
S6L9 = (L1_dffe11 & (L1_tx_reg[24])) # (!L1_dffe11 & ((S6_shift_reg[3])));


--C3L62 is tmdsenc:hdmitmds[2].enc|qreg~2 at LCCOMB_X36_Y10_N16
C3L62 = dummydata[17] $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--L1_tx_reg[25] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[25] at FF_X38_Y9_N27
--register power-up is low

L1_tx_reg[25] = DFFEAS( , GLOBAL(L1L155),  ,  ,  , C2_qreg[1],  ,  , VCC);


--S5_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[3] at FF_X38_Y9_N29
--register power-up is low

S5_shift_reg[3] = DFFEAS(S5L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S5L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~2 at LCCOMB_X38_Y9_N8
S5L9 = (L1_dffe11 & (L1_tx_reg[25])) # (!L1_dffe11 & ((S5_shift_reg[3])));


--L1_dffe16a[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[2] at FF_X30_Y11_N27
--register power-up is low

L1_dffe16a[2] = DFFEAS(L1L62, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--N1_counter_reg_bit[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[0] at FF_X32_Y11_N1
--register power-up is low

N1_counter_reg_bit[0] = DFFEAS(N1L9, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--L1_dffe16a[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[0] at FF_X30_Y11_N29
--register power-up is low

L1_dffe16a[0] = DFFEAS(L1L58, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--N1_counter_reg_bit[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[2] at FF_X32_Y11_N19
--register power-up is low

N1_counter_reg_bit[2] = DFFEAS(N1L10, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--L1_dffe16a[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[1] at FF_X31_Y11_N5
--register power-up is low

L1_dffe16a[1] = DFFEAS(L1L60, GLOBAL(L1L73),  ,  , L1_sync_dffe12a,  ,  ,  ,  );


--N1_counter_reg_bit[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit[1] at FF_X32_Y11_N29
--register power-up is low

N1_counter_reg_bit[1] = DFFEAS(N1L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[3] at FF_X40_Y10_N21
--register power-up is low

Q2_shift_reg[3] = DFFEAS(Q2L12, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~2 at LCCOMB_X40_Y10_N8
Q2L11 = (!L1_dffe22 & Q2_shift_reg[3]);


--Q1_shift_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[3] at FF_X40_Y10_N31
--register power-up is low

Q1_shift_reg[3] = DFFEAS(Q1L12, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~2 at LCCOMB_X40_Y10_N26
Q1L11 = (L1_dffe22) # (Q1_shift_reg[3]);


--G1L107 is sdram:sdram|dram_q[0]~1 at LCCOMB_X14_Y3_N2
G1L107 = (rst_n & (!G1_WideOr0 & G1_state.st_p0_rd_data));


--C3L17 is tmdsenc:hdmitmds[2].enc|Add8~4 at LCCOMB_X36_Y8_N6
C3L17 = (!dummydata[17] & (!C3L16 & !C3L15));


--C3L18 is tmdsenc:hdmitmds[2].enc|Add8~5 at LCCOMB_X36_Y8_N0
C3L18 = (C3L16 & (((C3L14) # (C3L15)) # (!dummydata[17])));


--C3L19 is tmdsenc:hdmitmds[2].enc|Add8~6 at LCCOMB_X36_Y8_N26
C3L19 = (C3_disparity[3]) # ((C3L14 & (C3L17)) # (!C3L14 & ((C3L18))));


--C3L20 is tmdsenc:hdmitmds[2].enc|Add8~7 at LCCOMB_X36_Y10_N10
C3L20 = C3L14 $ (((C3L28 & ((C3L44))) # (!C3L28 & (C3L19))));


--C3L21 is tmdsenc:hdmitmds[2].enc|Add8~8 at LCCOMB_X36_Y8_N28
C3L21 = (!C3L28 & ((C3L17) # ((!C3L7 & !C3L18))));


--C3L22 is tmdsenc:hdmitmds[2].enc|Add8~9 at LCCOMB_X36_Y8_N14
C3L22 = C3L14 $ (((C3L21) # ((C3L44 & C3L28))));


--C3L23 is tmdsenc:hdmitmds[2].enc|Add8~10 at LCCOMB_X36_Y8_N10
C3L23 = (C3L28) # ((!C3L15 & (C3_disparity[3] $ (C3L14))));


--C3L24 is tmdsenc:hdmitmds[2].enc|Add8~11 at LCCOMB_X36_Y8_N4
C3L24 = C3L16 $ (((C3L23 & ((!C3L44))) # (!C3L23 & ((C3L15) # (C3L44)))));


--C1L64 is tmdsenc:hdmitmds[0].enc|qreg~2 at LCCOMB_X38_Y10_N18
C1L64 = C1L6 $ (((!C1L28 & (C1L7 $ (!C1L46)))));


--C1L65 is tmdsenc:hdmitmds[0].enc|qreg~3 at LCCOMB_X38_Y10_N22
C1L65 = (C1L64 $ (dummydata[8])) # (!C1_denreg);


--C2_qreg[8] is tmdsenc:hdmitmds[1].enc|qreg[8] at FF_X35_Y9_N5
--register power-up is low

C2_qreg[8] = DFFEAS(C2L65, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[2] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2] at FF_X37_Y7_N29
--register power-up is low

L1_tx_reg[2] = DFFEAS(L1L104, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S2_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg[4] at FF_X37_Y7_N31
--register power-up is low

S2_shift_reg[4] = DFFEAS(S2L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~3 at LCCOMB_X37_Y7_N22
S2L10 = (L1_dffe11 & (L1_tx_reg[2])) # (!L1_dffe11 & ((S2_shift_reg[4])));


--N2L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|cout_actual~0 at LCCOMB_X32_Y11_N24
N2L12 = (!N2_counter_reg_bit[1] & (N2_counter_reg_bit[2] & (L1_sync_dffe12a & !N2_counter_reg_bit[0])));


--N2L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~0 at LCCOMB_X32_Y11_N26
N2L9 = (!N2L12 & (!N2L25 & N2_wire_counter_comb_bita_0combout[0]));


--N2L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~1 at LCCOMB_X32_Y11_N20
N2L10 = (N2L25 & (!L1_sync_dffe12a)) # (!N2L25 & (((!N2L12 & N2_wire_counter_comb_bita_2combout[0]))));


--N2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr2|counter_reg_bit~2 at LCCOMB_X32_Y11_N22
N2L11 = (!N2L25 & (N2_wire_counter_comb_bita_1combout[0] & !N2L12));


--C1L17 is tmdsenc:hdmitmds[0].enc|Add8~4 at LCCOMB_X37_Y10_N16
C1L17 = (!C1L16 & (!C1L15 & dummydata[1]));


--C1L18 is tmdsenc:hdmitmds[0].enc|Add8~5 at LCCOMB_X37_Y10_N2
C1L18 = (C1L16 & ((C1L14) # ((C1L15) # (dummydata[1]))));


--C1L19 is tmdsenc:hdmitmds[0].enc|Add8~6 at LCCOMB_X37_Y10_N28
C1L19 = (C1_disparity[3]) # ((C1L14 & ((C1L17))) # (!C1L14 & (C1L18)));


--C1L20 is tmdsenc:hdmitmds[0].enc|Add8~7 at LCCOMB_X38_Y10_N28
C1L20 = C1L14 $ (((C1L28 & (C1L46)) # (!C1L28 & ((C1L19)))));


--C1L21 is tmdsenc:hdmitmds[0].enc|Add8~8 at LCCOMB_X38_Y10_N30
C1L21 = (!C1L28 & ((C1L17) # ((!C1L18 & !C1L7))));


--C1L22 is tmdsenc:hdmitmds[0].enc|Add8~9 at LCCOMB_X38_Y10_N0
C1L22 = C1L14 $ (((C1L21) # ((C1L46 & C1L28))));


--C1L23 is tmdsenc:hdmitmds[0].enc|Add8~10 at LCCOMB_X37_Y10_N14
C1L23 = (C1L28) # ((!C1L15 & (C1_disparity[3] $ (C1L14))));


--C1L24 is tmdsenc:hdmitmds[0].enc|Add8~11 at LCCOMB_X37_Y10_N0
C1L24 = C1L16 $ (((C1L46 & ((!C1L23))) # (!C1L46 & ((C1L15) # (C1L23)))));


--C2L7 is tmdsenc:hdmitmds[1].enc|Add4~5 at LCCOMB_X33_Y9_N0
C2L7 = dummydata[15] $ (dummydata[13] $ (dummydata[14] $ (!C2L4)));


--C2L62 is tmdsenc:hdmitmds[1].enc|qreg~2 at LCCOMB_X35_Y9_N22
C2L62 = C2L7 $ (((!C2L28 & (C2L6 $ (!C2L44)))));


--C2L63 is tmdsenc:hdmitmds[1].enc|qreg~3 at LCCOMB_X35_Y9_N6
C2L63 = (dummydata[16] $ (!C2L62)) # (!C1_denreg);


--C3_qreg[8] is tmdsenc:hdmitmds[2].enc|qreg[8] at FF_X36_Y10_N5
--register power-up is low

C3_qreg[8] = DFFEAS(C3L65, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[3] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3] at FF_X37_Y7_N9
--register power-up is low

L1_tx_reg[3] = DFFEAS(L1L106, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S1_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg[4] at FF_X37_Y7_N19
--register power-up is low

S1_shift_reg[4] = DFFEAS(S1L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~3 at LCCOMB_X37_Y7_N26
S1L10 = (L1_dffe11 & ((L1_tx_reg[3]))) # (!L1_dffe11 & (S1_shift_reg[4]));


--C2L45 is tmdsenc:hdmitmds[1].enc|dx~1 at LCCOMB_X32_Y9_N0
C2L45 = dummydata[13] $ (!C2L4);


--C2L64 is tmdsenc:hdmitmds[1].enc|qreg~4 at LCCOMB_X35_Y9_N24
C2L64 = C2L45 $ (((C2L28 & ((!C2L44))) # (!C2L28 & (C2L6))));


--C3_qreg[5] is tmdsenc:hdmitmds[2].enc|qreg[5] at FF_X36_Y10_N23
--register power-up is low

C3_qreg[5] = DFFEAS(C3L67, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[12] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12] at FF_X37_Y11_N17
--register power-up is low

L1_tx_reg[12] = DFFEAS(L1L123, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S4_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg[4] at FF_X37_Y11_N11
--register power-up is low

S4_shift_reg[4] = DFFEAS(S4L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S4L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~3 at LCCOMB_X37_Y11_N20
S4L10 = (L1_dffe11 & ((L1_tx_reg[12]))) # (!L1_dffe11 & (S4_shift_reg[4]));


--C2L17 is tmdsenc:hdmitmds[1].enc|Add8~4 at LCCOMB_X36_Y9_N16
C2L17 = (dummydata[9] & (!C2L15 & !C2L16));


--C2L18 is tmdsenc:hdmitmds[1].enc|Add8~5 at LCCOMB_X36_Y9_N26
C2L18 = (C2L16 & ((dummydata[9]) # ((C2L15) # (C2L14))));


--C2L19 is tmdsenc:hdmitmds[1].enc|Add8~6 at LCCOMB_X36_Y9_N12
C2L19 = (C2_disparity[3]) # ((C2L14 & ((C2L17))) # (!C2L14 & (C2L18)));


--C2L20 is tmdsenc:hdmitmds[1].enc|Add8~7 at LCCOMB_X36_Y9_N6
C2L20 = C2L14 $ (((C2L28 & (C2L44)) # (!C2L28 & ((C2L19)))));


--C2L21 is tmdsenc:hdmitmds[1].enc|Add8~8 at LCCOMB_X36_Y9_N24
C2L21 = (!C2L28 & ((C2L17) # ((!C2L18 & !C2L6))));


--C2L22 is tmdsenc:hdmitmds[1].enc|Add8~9 at LCCOMB_X35_Y9_N26
C2L22 = C2L14 $ (((C2L21) # ((C2L28 & C2L44))));


--C2L23 is tmdsenc:hdmitmds[1].enc|Add8~10 at LCCOMB_X35_Y9_N28
C2L23 = (C2L28) # ((!C2L15 & (C2L14 $ (C2_disparity[3]))));


--C2L24 is tmdsenc:hdmitmds[1].enc|Add8~11 at LCCOMB_X36_Y9_N2
C2L24 = C2L16 $ (((C2L44 & ((!C2L23))) # (!C2L44 & ((C2L15) # (C2L23)))));


--C3L45 is tmdsenc:hdmitmds[2].enc|dx~1 at LCCOMB_X36_Y10_N8
C3L45 = dummydata[21] $ (C3L4);


--C3L63 is tmdsenc:hdmitmds[2].enc|qreg~3 at LCCOMB_X36_Y10_N18
C3L63 = C3L45 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--L1_tx_reg[13] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13] at FF_X37_Y11_N5
--register power-up is low

L1_tx_reg[13] = DFFEAS(L1L125, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S3_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg[4] at FF_X37_Y11_N31
--register power-up is low

S3_shift_reg[4] = DFFEAS(S3L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S3L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~3 at LCCOMB_X37_Y11_N22
S3L10 = (L1_dffe11 & (L1_tx_reg[13])) # (!L1_dffe11 & ((S3_shift_reg[4])));


--C3L64 is tmdsenc:hdmitmds[2].enc|qreg~4 at LCCOMB_X36_Y10_N2
C3L64 = C3L6 $ (((!C3L28 & (C3L44 $ (!C3L7)))));


--L1_tx_reg[22] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22] at FF_X36_Y11_N17
--register power-up is low

L1_tx_reg[22] = DFFEAS(L1L142, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S6_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg[4] at FF_X36_Y11_N19
--register power-up is low

S6_shift_reg[4] = DFFEAS(S6L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S6L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~3 at LCCOMB_X36_Y11_N22
S6L10 = (L1_dffe11 & ((L1_tx_reg[22]))) # (!L1_dffe11 & (S6_shift_reg[4]));


--C1L66 is tmdsenc:hdmitmds[0].enc|qreg~4 at LCCOMB_X38_Y10_N24
C1L66 = dummydata[1] $ (((C1L28 & ((C1L46))) # (!C1L28 & (!C1L7))));


--L1_tx_reg[23] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23] at FF_X37_Y9_N19
--register power-up is low

L1_tx_reg[23] = DFFEAS(L1L144, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S5_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg[4] at FF_X38_Y9_N23
--register power-up is low

S5_shift_reg[4] = DFFEAS(S5L11, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--S5L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~3 at LCCOMB_X38_Y9_N28
S5L10 = (L1_dffe11 & (L1_tx_reg[23])) # (!L1_dffe11 & ((S5_shift_reg[4])));


--N1L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|cout_actual~0 at LCCOMB_X32_Y11_N30
N1L12 = (!N1_counter_reg_bit[1] & (N1_counter_reg_bit[2] & (L1_sync_dffe12a & !N1_counter_reg_bit[0])));


--N1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~0 at LCCOMB_X32_Y11_N0
N1L9 = (!N1L12 & (!N1L25 & N1_wire_counter_comb_bita_0combout[0]));


--N1L10 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~1 at LCCOMB_X32_Y11_N18
N1L10 = (N1L25 & (!L1_sync_dffe12a)) # (!N1L25 & (((N1_wire_counter_comb_bita_2combout[0] & !N1L12))));


--N1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_cntr:cntr13|counter_reg_bit~2 at LCCOMB_X32_Y11_N28
N1L11 = (!N1L12 & (!N1L25 & N1_wire_counter_comb_bita_1combout[0]));


--Q2_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[4] at FF_X40_Y10_N17
--register power-up is low

Q2_shift_reg[4] = DFFEAS(Q2L13, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~3 at LCCOMB_X40_Y10_N20
Q2L12 = (!L1_dffe22 & Q2_shift_reg[4]);


--Q1_shift_reg[4] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[4] at FF_X40_Y10_N19
--register power-up is low

Q1_shift_reg[4] = DFFEAS(Q1L13, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1L12 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~3 at LCCOMB_X40_Y10_N30
Q1L12 = (!L1_dffe22 & Q1_shift_reg[4]);


--C2L65 is tmdsenc:hdmitmds[1].enc|qreg~5 at LCCOMB_X35_Y9_N4
C2L65 = (C2L44) # (!C1_denreg);


--C3_qreg[9] is tmdsenc:hdmitmds[2].enc|qreg[9] at FF_X36_Y10_N29
--register power-up is low

C3_qreg[9] = DFFEAS(C3L68, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[0] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0] at FF_X37_Y7_N13
--register power-up is low

L1_tx_reg[0] = DFFEAS(L1L100, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S2L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg24|shift_reg~4 at LCCOMB_X37_Y7_N30
S2L11 = (L1_dffe11 & L1_tx_reg[0]);


--C3L65 is tmdsenc:hdmitmds[2].enc|qreg~5 at LCCOMB_X36_Y10_N4
C3L65 = (C3L44) # (!C1_denreg);


--C1_qreg[8] is tmdsenc:hdmitmds[0].enc|qreg[8] at FF_X38_Y10_N3
--register power-up is low

C1_qreg[8] = DFFEAS(C1L69, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[1] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1] at FF_X37_Y7_N7
--register power-up is low

L1_tx_reg[1] = DFFEAS(L1L102, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg23|shift_reg~4 at LCCOMB_X37_Y7_N18
S1L11 = (L1_dffe11 & L1_tx_reg[1]);


--C3L66 is tmdsenc:hdmitmds[2].enc|qreg~6 at LCCOMB_X35_Y10_N14
C3L66 = dummydata[22] $ (dummydata[21] $ (!C3L4));


--C3L67 is tmdsenc:hdmitmds[2].enc|qreg~7 at LCCOMB_X36_Y10_N22
C3L67 = (C3L66 $ (((C3L28) # (C3L9)))) # (!C1_denreg);


--C1_qreg[5] is tmdsenc:hdmitmds[0].enc|qreg[5] at FF_X38_Y10_N21
--register power-up is low

C1_qreg[5] = DFFEAS(C1L71, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[10] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10] at FF_X37_Y9_N21
--register power-up is low

L1_tx_reg[10] = DFFEAS(L1L119, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S4L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg26|shift_reg~4 at LCCOMB_X37_Y11_N10
S4L11 = (L1_dffe11 & L1_tx_reg[10]);


--C1L47 is tmdsenc:hdmitmds[0].enc|dx~1 at LCCOMB_X38_Y10_N14
C1L47 = dummydata[5] $ (C1L5);


--C1L67 is tmdsenc:hdmitmds[0].enc|qreg~5 at LCCOMB_X38_Y10_N8
C1L67 = C1L47 $ (((C1L28 & ((!C1L46))) # (!C1L28 & (C1L7))));


--C2_qreg[5] is tmdsenc:hdmitmds[1].enc|qreg[5] at FF_X36_Y9_N21
--register power-up is low

C2_qreg[5] = DFFEAS(C2L68, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1_tx_reg[11] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11] at FF_X37_Y9_N31
--register power-up is low

L1_tx_reg[11] = DFFEAS(L1L121, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S3L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg25|shift_reg~4 at LCCOMB_X37_Y11_N30
S3L11 = (L1_dffe11 & L1_tx_reg[11]);


--C1L68 is tmdsenc:hdmitmds[0].enc|qreg~6 at LCCOMB_X38_Y10_N10
C1L68 = C1L4 $ (((!C1L28 & (C1L7 $ (!C1L46)))));


--L1_tx_reg[20] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20] at FF_X36_Y11_N5
--register power-up is low

L1_tx_reg[20] = DFFEAS(L1L138, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S6L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg28|shift_reg~4 at LCCOMB_X36_Y11_N18
S6L11 = (L1_dffe11 & L1_tx_reg[20]);


--C2L66 is tmdsenc:hdmitmds[1].enc|qreg~6 at LCCOMB_X35_Y9_N0
C2L66 = C2L5 $ (((!C2L28 & (C2L6 $ (!C2L44)))));


--L1_tx_reg[21] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21] at FF_X38_Y9_N1
--register power-up is low

L1_tx_reg[21] = DFFEAS(L1L140, GLOBAL(L1L155),  ,  ,  ,  ,  ,  ,  );


--S5L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg1:shift_reg27|shift_reg~4 at LCCOMB_X38_Y9_N22
S5L11 = (L1_dffe11 & L1_tx_reg[21]);


--Q1_shift_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[6] at FF_X40_Y10_N29
--register power-up is low

Q1_shift_reg[6] = DFFEAS(Q1L14, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q2L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg~4 at LCCOMB_X40_Y10_N16
Q2L13 = (!L1_dffe22 & Q1_shift_reg[6]);


--Q1_shift_reg[5] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg[5] at FF_X40_Y10_N15
--register power-up is low

Q1_shift_reg[5] = DFFEAS(Q1L15, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~4 at LCCOMB_X40_Y10_N18
Q1L13 = (!L1_dffe22 & Q1_shift_reg[5]);


--C3L68 is tmdsenc:hdmitmds[2].enc|qreg~8 at LCCOMB_X36_Y10_N28
C3L68 = (C1_denreg & ((C3L28 & (C3L44)) # (!C3L28 & ((!C3L7)))));


--C1_qreg[9] is tmdsenc:hdmitmds[0].enc|qreg[9] at FF_X37_Y10_N5
--register power-up is low

C1_qreg[9] = DFFEAS(C1L72, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--C1L69 is tmdsenc:hdmitmds[0].enc|qreg~7 at LCCOMB_X38_Y10_N2
C1L69 = (C1L46) # (!C1_denreg);


--C2_qreg[9] is tmdsenc:hdmitmds[1].enc|qreg[9] at FF_X36_Y9_N15
--register power-up is low

C2_qreg[9] = DFFEAS(C2L70, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--C1L70 is tmdsenc:hdmitmds[0].enc|qreg~8 at LCCOMB_X39_Y10_N16
C1L70 = dummydata[6] $ (dummydata[5] $ (C1L5));


--C1L71 is tmdsenc:hdmitmds[0].enc|qreg~9 at LCCOMB_X38_Y10_N20
C1L71 = (C1L70 $ (((C1L28) # (C1L9)))) # (!C1_denreg);


--C2L67 is tmdsenc:hdmitmds[1].enc|qreg~7 at LCCOMB_X32_Y9_N10
C2L67 = dummydata[14] $ (dummydata[13] $ (C2L4));


--C2L68 is tmdsenc:hdmitmds[1].enc|qreg~8 at LCCOMB_X36_Y9_N20
C2L68 = (C2L67 $ (((C2L28) # (C2L9)))) # (!C1_denreg);


--C2L8 is tmdsenc:hdmitmds[1].enc|Add4~6 at LCCOMB_X33_Y9_N20
C2L8 = dummydata[10] $ (dummydata[9] $ (dummydata[11]));


--C2L69 is tmdsenc:hdmitmds[1].enc|qreg~9 at LCCOMB_X36_Y9_N8
C2L69 = C2L8 $ (((C2L28 & ((!C2L44))) # (!C2L28 & (C2L6))));


--C3_qreg[3] is tmdsenc:hdmitmds[2].enc|qreg[3] at FF_X36_Y10_N31
--register power-up is low

C3_qreg[3] = DFFEAS(C3L71, GLOBAL(V1L27), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--C3L8 is tmdsenc:hdmitmds[2].enc|Add4~6 at LCCOMB_X35_Y12_N2
C3L8 = dummydata[17] $ (dummydata[18] $ (!dummydata[19]));


--C3L69 is tmdsenc:hdmitmds[2].enc|qreg~9 at LCCOMB_X36_Y10_N0
C3L69 = C3L8 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--Q2_shift_reg[6] is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6] at FF_X40_Y10_N1
--register power-up is low

Q2_shift_reg[6] = DFFEAS(Q2L8, GLOBAL(L1L73),  ,  ,  ,  ,  ,  ,  );


--Q1L14 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~5 at LCCOMB_X40_Y10_N28
Q1L14 = (L1_dffe22) # (Q2_shift_reg[6]);


--Q1L15 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_h|shift_reg~6 at LCCOMB_X40_Y10_N14
Q1L15 = (L1_dffe22) # (Q1_shift_reg[6]);


--C1L72 is tmdsenc:hdmitmds[0].enc|qreg~10 at LCCOMB_X37_Y10_N4
C1L72 = (C1_denreg & ((C1L28 & ((C1L46))) # (!C1L28 & (!C1L7))));


--C2L70 is tmdsenc:hdmitmds[1].enc|qreg~10 at LCCOMB_X36_Y9_N14
C2L70 = (C1_denreg & ((C2L28 & ((C2L44))) # (!C2L28 & (!C2L6))));


--C2L71 is tmdsenc:hdmitmds[1].enc|qreg~11 at LCCOMB_X36_Y9_N10
C2L71 = C2L7 $ (((C2L28 & ((!C2L44))) # (!C2L28 & (C2L6))));


--C3L70 is tmdsenc:hdmitmds[2].enc|qreg~10 at LCCOMB_X36_Y10_N26
C3L70 = C3L5 $ (((C3L28 & (!C3L44)) # (!C3L28 & ((C3L7)))));


--C3L71 is tmdsenc:hdmitmds[2].enc|qreg~11 at LCCOMB_X36_Y10_N30
C3L71 = (C3L4 $ (((C3L28) # (C3L9)))) # (!C1_denreg);


--C1L8 is tmdsenc:hdmitmds[0].enc|Add4~6 at LCCOMB_X39_Y10_N24
C1L8 = dummydata[1] $ (dummydata[3] $ (dummydata[2]));


--C1L73 is tmdsenc:hdmitmds[0].enc|qreg~11 at LCCOMB_X38_Y10_N26
C1L73 = C1L8 $ (((C1L28 & ((!C1L46))) # (!C1L28 & (C1L7))));


--G1L32 is sdram:sdram|dram_a~16 at LCCOMB_X20_Y3_N18
G1L32 = (A1L41 & (!G1_WideOr0 & ((G1_state.st_p0_rd_cmd) # (G1_state.st_p0_wr_cmd))));


--G1L33 is sdram:sdram|dram_a~17 at LCCOMB_X14_Y3_N4
G1L33 = (!G1_WideOr0 & (A1L43 & ((G1_state.st_p0_rd_cmd) # (G1_state.st_p0_wr_cmd))));


--G1L34 is sdram:sdram|dram_a~18 at LCCOMB_X37_Y1_N24
G1L34 = (A1L45 & (!G1_WideOr0 & ((G1_state.st_p0_wr_cmd) # (G1_state.st_p0_rd_cmd))));


--G1L227 is sdram:sdram|state~49 at LCCOMB_X12_Y3_N22
G1L227 = (G1_state.st_idle & ((G1_WideOr0) # ((!abc_wrq & !abc_rrq))));


--G1L215 is sdram:sdram|state.st_reset~9 at LCCOMB_X16_Y3_N12
G1L215 = (G1L214 & ((G1_state.st_reset) # ((!G1_WideOr0 & G1_init_ctr[15]))));


--C1L9 is tmdsenc:hdmitmds[0].enc|Add4~7 at LCCOMB_X38_Y10_N4
C1L9 = C1L46 $ (C1_disparity[3] $ (C1L14));


--C2L9 is tmdsenc:hdmitmds[1].enc|Add4~7 at LCCOMB_X36_Y9_N28
C2L9 = C2_disparity[3] $ (C2L44 $ (C2L14));


--C3L25 is tmdsenc:hdmitmds[2].enc|Add8~12 at LCCOMB_X36_Y8_N30
C3L25 = (C3L15 & ((C3L14) # ((!dummydata[17] & !C3L16)))) # (!C3L15 & (dummydata[17] & ((!C3L14) # (!C3L16))));


--C3L26 is tmdsenc:hdmitmds[2].enc|Add8~13 at LCCOMB_X36_Y10_N20
C3L26 = (C3L28 & (((!C3L44)))) # (!C3L28 & (C3_disparity[3] $ ((C3L14))));


--C1L25 is tmdsenc:hdmitmds[0].enc|Add8~12 at LCCOMB_X37_Y10_N30
C1L25 = (C1L15 & ((C1L14) # ((!C1L16 & dummydata[1])))) # (!C1L15 & (!dummydata[1] & ((!C1L16) # (!C1L14))));


--C1L26 is tmdsenc:hdmitmds[0].enc|Add8~13 at LCCOMB_X38_Y10_N6
C1L26 = (C1L28 & (((!C1L46)))) # (!C1L28 & (C1L14 $ ((C1_disparity[3]))));


--C2L25 is tmdsenc:hdmitmds[1].enc|Add8~12 at LCCOMB_X36_Y9_N30
C2L25 = (C2L15 & ((C2L14) # ((dummydata[9] & !C2L16)))) # (!C2L15 & (!dummydata[9] & ((!C2L14) # (!C2L16))));


--C2L26 is tmdsenc:hdmitmds[1].enc|Add8~13 at LCCOMB_X35_Y9_N30
C2L26 = (C2L28 & (((!C2L44)))) # (!C2L28 & (C2_disparity[3] $ ((C2L14))));


--C3L9 is tmdsenc:hdmitmds[2].enc|Add4~7 at LCCOMB_X36_Y10_N6
C3L9 = C3_disparity[3] $ (C3L14 $ (C3L44));


--A1L319 is led_ctr[0]~84 at LCCOMB_X29_Y28_N0
A1L319 = !led_ctr[0];


--A1L410 is rst_ctr[0]~0 at LCCOMB_X14_Y1_N2
A1L410 = !rst_ctr[0];


--G1L126 is sdram:sdram|init_ctr[10]~15 at LCCOMB_X16_Y2_N20
G1L126 = !G1_init_ctr[10];


--L1L115 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[8]~0 at LCCOMB_X36_Y11_N10
L1L115 = !C3_qreg[7];


--L1L134 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[18]~1 at LCCOMB_X37_Y11_N12
L1L134 = !C1_qreg[3];


--L1L136 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[19]~2 at LCCOMB_X37_Y11_N8
L1L136 = !C2_qreg[3];


--L1L111 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[6]~3 at LCCOMB_X37_Y7_N16
L1L111 = !C1_qreg[7];


--L1L97 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|sync_dffe12a~0 at LCCOMB_X30_Y11_N6
L1L97 = !L1_sync_dffe12a;


--L1L113 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[7]~4 at LCCOMB_X35_Y9_N18
L1L113 = !C2_qreg[7];


--A1L189 is dummydata[22]~0 at LCCOMB_X35_Y10_N24
A1L189 = !dummydata[21];


--A1L184 is dummydata[19]~1 at LCCOMB_X35_Y12_N8
A1L184 = !dummydata[18];


--A1L186 is dummydata[20]~2 at LCCOMB_X35_Y10_N26
A1L186 = !dummydata[19];


--A1L168 is dummydata[7]~3 at LCCOMB_X39_Y10_N22
A1L168 = !dummydata[6];


--A1L163 is dummydata[3]~4 at LCCOMB_X39_Y10_N4
A1L163 = !dummydata[2];


--L1L127 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[14]~5 at LCCOMB_X37_Y11_N26
L1L127 = !C3_qreg[5];


--A1L174 is dummydata[11]~5 at LCCOMB_X33_Y9_N30
A1L174 = !dummydata[10];


--A1L172 is dummydata[10]~6 at LCCOMB_X33_Y9_N12
A1L172 = !dummydata[9];


--A1L180 is dummydata[16]~7 at LCCOMB_X35_Y8_N0
A1L180 = !dummydata[15];


--L1L104 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[2]~6 at LCCOMB_X37_Y7_N28
L1L104 = !C3_qreg[9];


--L1L123 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[12]~7 at LCCOMB_X37_Y11_N16
L1L123 = !C1_qreg[5];


--L1L125 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[13]~8 at LCCOMB_X37_Y11_N4
L1L125 = !C2_qreg[5];


--L1L100 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[0]~9 at LCCOMB_X37_Y7_N12
L1L100 = !C1_qreg[9];


--L1L102 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[1]~10 at LCCOMB_X37_Y7_N6
L1L102 = !C2_qreg[9];


--L1L138 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[20]~11 at LCCOMB_X36_Y11_N4
L1L138 = !C3_qreg[3];


--V1_remap_decoy_le3a_0 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_0 at LCCOMB_X1_Y1_N6
V1_remap_decoy_le3a_0 = LCELL(GND);


--V1_remap_decoy_le3a_1 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_1 at LCCOMB_X1_Y1_N24
V1_remap_decoy_le3a_1 = LCELL(GND);


--V1_remap_decoy_le3a_2 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|remap_decoy_le3a_2 at LCCOMB_X1_Y1_N26
V1_remap_decoy_le3a_2 = LCELL(GND);


--A1L571 is ~GND at LCCOMB_X1_Y1_N12
A1L571 = GND;



--abc_clk is abc_clk at PIN_F2
abc_clk = INPUT();


--A1L92 is abc_d_oe~output at IOOBUF_X30_Y0_N23
A1L92 = OUTPUT_BUFFER.O(.I(!A1L145), , , , , , , , , , , , , , , , , );


--abc_d_oe is abc_d_oe at PIN_P9
abc_d_oe = OUTPUT();



--abc_rst_n is abc_rst_n at PIN_C14
abc_rst_n = INPUT();



--abc_cs_n is abc_cs_n at PIN_G11
abc_cs_n = INPUT();



--abc_out_n[0] is abc_out_n[0] at PIN_M11
abc_out_n[0] = INPUT();



--abc_out_n[1] is abc_out_n[1] at PIN_E6
abc_out_n[1] = INPUT();



--abc_out_n[2] is abc_out_n[2] at PIN_F1
abc_out_n[2] = INPUT();



--abc_out_n[3] is abc_out_n[3] at PIN_E8
abc_out_n[3] = INPUT();



--abc_out_n[4] is abc_out_n[4] at PIN_K6
abc_out_n[4] = INPUT();



--abc_inp_n[0] is abc_inp_n[0] at PIN_G5
abc_inp_n[0] = INPUT();



--abc_inp_n[1] is abc_inp_n[1] at PIN_B16
abc_inp_n[1] = INPUT();


--abc_rdy_x is abc_rdy_x at PIN_G1
abc_rdy_x = OUTPUT();


--abc_resin_x is abc_resin_x at PIN_D6
abc_resin_x = OUTPUT();


--abc_int80_x is abc_int80_x at PIN_L3
abc_int80_x = OUTPUT();


--abc_int800_x is abc_int800_x at PIN_G16
abc_int800_x = OUTPUT();


--abc_nmi_x is abc_nmi_x at PIN_B3
abc_nmi_x = OUTPUT();


--abc_xm_x is abc_xm_x at PIN_A10
abc_xm_x = OUTPUT();


--A1L113 is abc_master~output at IOOBUF_X41_Y24_N9
A1L113 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_master is abc_master at PIN_D16
abc_master = OUTPUT();


--A1L59 is abc_a_oe~output at IOOBUF_X0_Y13_N16
A1L59 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_a_oe is abc_a_oe at PIN_J2
abc_a_oe = OUTPUT();


--A1L90 is abc_d_ce_n~output at IOOBUF_X41_Y23_N2
A1L90 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--abc_d_ce_n is abc_d_ce_n at PIN_F14
abc_d_ce_n = OUTPUT();



--exth_hc is exth_hc at PIN_A2
exth_hc = INPUT();



--exth_hh is exth_hh at PIN_G2
exth_hh = INPUT();


--A1L500 is sr_clk~output at IOOBUF_X30_Y29_N16
A1L500 = OUTPUT_BUFFER.O(.I(EB1_dataout[0]), , , , , , , , , , , , , , , , , );


--sr_clk is sr_clk at PIN_A11
sr_clk = OUTPUT();


--A1L497 is sr_cke~output at IOOBUF_X32_Y29_N9
A1L497 = OUTPUT_BUFFER.O(.I(G1_dram_cke), , , , , , , , , , , , , , , , , );


--sr_cke is sr_cke at PIN_E10
sr_cke = OUTPUT();


--A1L491 is sr_ba[0]~output at IOOBUF_X7_Y0_N30
A1L491 = OUTPUT_BUFFER.O(.I(G1_dram_ba[0]), , , , , , , , , , , , , , , , , );


--sr_ba[0] is sr_ba[0] at PIN_T4
sr_ba[0] = OUTPUT();


--A1L493 is sr_ba[1]~output at IOOBUF_X14_Y0_N9
A1L493 = OUTPUT_BUFFER.O(.I(G1_dram_ba[1]), , , , , , , , , , , , , , , , , );


--sr_ba[1] is sr_ba[1] at PIN_R5
sr_ba[1] = OUTPUT();


--A1L464 is sr_a[0]~output at IOOBUF_X3_Y0_N9
A1L464 = OUTPUT_BUFFER.O(.I(G1_dram_a[0]), , , , , , , , , , , , , , , , , );


--sr_a[0] is sr_a[0] at PIN_T3
sr_a[0] = OUTPUT();


--A1L466 is sr_a[1]~output at IOOBUF_X7_Y0_N16
A1L466 = OUTPUT_BUFFER.O(.I(G1_dram_a[1]), , , , , , , , , , , , , , , , , );


--sr_a[1] is sr_a[1] at PIN_N6
sr_a[1] = OUTPUT();


--A1L468 is sr_a[2]~output at IOOBUF_X19_Y0_N2
A1L468 = OUTPUT_BUFFER.O(.I(G1_dram_a[2]), , , , , , , , , , , , , , , , , );


--sr_a[2] is sr_a[2] at PIN_N8
sr_a[2] = OUTPUT();


--A1L470 is sr_a[3]~output at IOOBUF_X14_Y0_N2
A1L470 = OUTPUT_BUFFER.O(.I(G1_dram_a[3]), , , , , , , , , , , , , , , , , );


--sr_a[3] is sr_a[3] at PIN_T5
sr_a[3] = OUTPUT();


--A1L472 is sr_a[4]~output at IOOBUF_X0_Y4_N23
A1L472 = OUTPUT_BUFFER.O(.I(G1_dram_a[4]), , , , , , , , , , , , , , , , , );


--sr_a[4] is sr_a[4] at PIN_R1
sr_a[4] = OUTPUT();


--A1L474 is sr_a[5]~output at IOOBUF_X16_Y0_N2
A1L474 = OUTPUT_BUFFER.O(.I(G1_dram_a[5]), , , , , , , , , , , , , , , , , );


--sr_a[5] is sr_a[5] at PIN_T7
sr_a[5] = OUTPUT();


--A1L476 is sr_a[6]~output at IOOBUF_X21_Y0_N30
A1L476 = OUTPUT_BUFFER.O(.I(G1_dram_a[6]), , , , , , , , , , , , , , , , , );


--sr_a[6] is sr_a[6] at PIN_P8
sr_a[6] = OUTPUT();


--A1L478 is sr_a[7]~output at IOOBUF_X14_Y0_N23
A1L478 = OUTPUT_BUFFER.O(.I(G1_dram_a[7]), , , , , , , , , , , , , , , , , );


--sr_a[7] is sr_a[7] at PIN_P6
sr_a[7] = OUTPUT();


--A1L480 is sr_a[8]~output at IOOBUF_X37_Y0_N30
A1L480 = OUTPUT_BUFFER.O(.I(G1_dram_a[8]), , , , , , , , , , , , , , , , , );


--sr_a[8] is sr_a[8] at PIN_P11
sr_a[8] = OUTPUT();


--A1L482 is sr_a[9]~output at IOOBUF_X0_Y26_N16
A1L482 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[9] is sr_a[9] at PIN_B1
sr_a[9] = OUTPUT();


--A1L484 is sr_a[10]~output at IOOBUF_X35_Y0_N23
A1L484 = OUTPUT_BUFFER.O(.I(G1_dram_a[10]), , , , , , , , , , , , , , , , , );


--sr_a[10] is sr_a[10] at PIN_M10
sr_a[10] = OUTPUT();


--A1L486 is sr_a[11]~output at IOOBUF_X41_Y19_N16
A1L486 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[11] is sr_a[11] at PIN_F16
sr_a[11] = OUTPUT();


--A1L488 is sr_a[12]~output at IOOBUF_X1_Y29_N30
A1L488 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--sr_a[12] is sr_a[12] at PIN_D3
sr_a[12] = OUTPUT();


--A1L554 is sr_dqm[0]~output at IOOBUF_X16_Y0_N30
A1L554 = OUTPUT_BUFFER.O(.I(G1_dram_dqm[0]), , , , , , , , , , , , , , , , , );


--sr_dqm[0] is sr_dqm[0] at PIN_R6
sr_dqm[0] = OUTPUT();


--A1L556 is sr_dqm[1]~output at IOOBUF_X1_Y0_N2
A1L556 = OUTPUT_BUFFER.O(.I(G1_dram_dqm[1]), , , , , , , , , , , , , , , , , );


--sr_dqm[1] is sr_dqm[1] at PIN_N3
sr_dqm[1] = OUTPUT();


--A1L502 is sr_cs_n~output at IOOBUF_X0_Y3_N2
A1L502 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[3]), , , , , , , , , , , , , , , , , );


--sr_cs_n is sr_cs_n at PIN_P2
sr_cs_n = OUTPUT();


--A1L560 is sr_we_n~output at IOOBUF_X7_Y0_N9
A1L560 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[0]), , , , , , , , , , , , , , , , , );


--sr_we_n is sr_we_n at PIN_M6
sr_we_n = OUTPUT();


--A1L495 is sr_cas_n~output at IOOBUF_X0_Y3_N9
A1L495 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[1]), , , , , , , , , , , , , , , , , );


--sr_cas_n is sr_cas_n at PIN_P1
sr_cas_n = OUTPUT();


--A1L558 is sr_ras_n~output at IOOBUF_X30_Y0_N30
A1L558 = OUTPUT_BUFFER.O(.I(G1_dram_cmd[2]), , , , , , , , , , , , , , , , , );


--sr_ras_n is sr_ras_n at PIN_L10
sr_ras_n = OUTPUT();


--A1L430 is sd_clk~output at IOOBUF_X30_Y29_N23
A1L430 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sd_clk is sd_clk at PIN_B11
sd_clk = OUTPUT();


--A1L432 is sd_cmd~output at IOOBUF_X0_Y25_N16
A1L432 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--sd_cmd is sd_cmd at PIN_F3
sd_cmd = OUTPUT();



--tty_txd is tty_txd at PIN_A5
tty_txd = INPUT();


--A1L568 is tty_rxd~output at IOOBUF_X0_Y13_N23
A1L568 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--tty_rxd is tty_rxd at PIN_J1
tty_rxd = OUTPUT();



--tty_rts is tty_rts at PIN_C3
tty_rts = INPUT();


--A1L562 is tty_cts~output at IOOBUF_X0_Y25_N2
A1L562 = OUTPUT_BUFFER.O(.I(VCC), , , , , , , , , , , , , , , , , );


--tty_cts is tty_cts at PIN_C2
tty_cts = OUTPUT();



--tty_dtr is tty_dtr at PIN_D11
tty_dtr = INPUT();


--A1L222 is flash_cs_n~output at IOOBUF_X41_Y18_N2
A1L222 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_cs_n is flash_cs_n at PIN_F13
flash_cs_n = OUTPUT();


--A1L220 is flash_clk~output at IOOBUF_X0_Y25_N9
A1L220 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_clk is flash_clk at PIN_C1
flash_clk = OUTPUT();


--A1L226 is flash_mosi~output at IOOBUF_X39_Y29_N9
A1L226 = OUTPUT_BUFFER.O(.I(GND), , , , , , , , , , , , , , , , , );


--flash_mosi is flash_mosi at PIN_D14
flash_mosi = OUTPUT();



--flash_miso is flash_miso at PIN_C6
flash_miso = INPUT();



--rtc_32khz is rtc_32khz at PIN_E7
rtc_32khz = INPUT();



--rtc_int_n is rtc_int_n at PIN_D12
rtc_int_n = INPUT();


--A1L312 is led[1]~output at IOOBUF_X32_Y29_N23
A1L312 = OUTPUT_BUFFER.O(.I(led_ctr[26]), , , , , , , , , , , , , , , , , );


--led[1] is led[1] at PIN_A12
led[1] = OUTPUT();


--A1L314 is led[2]~output at IOOBUF_X28_Y29_N16
A1L314 = OUTPUT_BUFFER.O(.I(led_ctr[27]), , , , , , , , , , , , , , , , , );


--led[2] is led[2] at PIN_A15
led[2] = OUTPUT();


--A1L316 is led[3]~output at IOOBUF_X28_Y29_N9
A1L316 = OUTPUT_BUFFER.O(.I(led_ctr[28]), , , , , , , , , , , , , , , , , );


--led[3] is led[3] at PIN_A13
led[3] = OUTPUT();


--A1L281 is hdmi_d[0]~output at IOOBUF_X41_Y3_N9
A1L281 = LVDS_OUTPUT_BUFFER.O(.I(P1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );

--A1L280 is hdmi_d[0]~0 at IOOBUF_X41_Y3_N9
A1L280 = LVDS_OUTPUT_BUFFER.OBAR(.I(P1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );


--hdmi_d[0] is hdmi_d[0] at PIN_R16
hdmi_d[0] = OUTPUT();


--A1L285 is hdmi_d[1]~output at IOOBUF_X41_Y5_N2
A1L285 = LVDS_OUTPUT_BUFFER.O(.I(P1_wire_ddio_outa_dataout[1]), , , , , , , , , , , , , , , , , );

--A1L284 is hdmi_d[1]~1 at IOOBUF_X41_Y5_N2
A1L284 = LVDS_OUTPUT_BUFFER.OBAR(.I(P1_wire_ddio_outa_dataout[1]), , , , , , , , , , , , , , , , , );


--hdmi_d[1] is hdmi_d[1] at PIN_N15
hdmi_d[1] = OUTPUT();


--A1L289 is hdmi_d[2]~output at IOOBUF_X41_Y13_N23
A1L289 = LVDS_OUTPUT_BUFFER.O(.I(P1_wire_ddio_outa_dataout[2]), , , , , , , , , , , , , , , , , );

--A1L288 is hdmi_d[2]~2 at IOOBUF_X41_Y13_N23
A1L288 = LVDS_OUTPUT_BUFFER.OBAR(.I(P1_wire_ddio_outa_dataout[2]), , , , , , , , , , , , , , , , , );


--hdmi_d[2] is hdmi_d[2] at PIN_K15
hdmi_d[2] = OUTPUT();


--A1L276 is hdmi_clk~output at IOOBUF_X41_Y13_N9
A1L276 = LVDS_OUTPUT_BUFFER.O(.I(R1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );

--A1L275 is hdmi_clk~0 at IOOBUF_X41_Y13_N9
A1L275 = LVDS_OUTPUT_BUFFER.OBAR(.I(R1_wire_ddio_outa_dataout[0]), , , , , , , , , , , , , , , , , );


--hdmi_clk is hdmi_clk at PIN_J15
hdmi_clk = OUTPUT();


--hdmi_sda is hdmi_sda at PIN_B6
hdmi_sda = BIDIR();



--abc_d[0] is abc_d[0] at PIN_T10
abc_d[0] = BIDIR();


--A1L66 is abc_d[0]~input at IOIBUF_X26_Y0_N22
A1L66 = INPUT_BUFFER(.I(abc_d[0]), );


--abc_d[1] is abc_d[1] at PIN_T12
abc_d[1] = BIDIR();


--A1L69 is abc_d[1]~input at IOIBUF_X28_Y0_N22
A1L69 = INPUT_BUFFER(.I(abc_d[1]), );


--abc_d[2] is abc_d[2] at PIN_M7
abc_d[2] = BIDIR();


--A1L72 is abc_d[2]~input at IOIBUF_X14_Y0_N15
A1L72 = INPUT_BUFFER(.I(abc_d[2]), );


--abc_d[3] is abc_d[3] at PIN_N5
abc_d[3] = BIDIR();


--A1L75 is abc_d[3]~input at IOIBUF_X7_Y0_N22
A1L75 = INPUT_BUFFER(.I(abc_d[3]), );


--abc_d[4] is abc_d[4] at PIN_R11
abc_d[4] = BIDIR();


--A1L78 is abc_d[4]~input at IOIBUF_X26_Y0_N15
A1L78 = INPUT_BUFFER(.I(abc_d[4]), );


--abc_d[5] is abc_d[5] at PIN_M8
abc_d[5] = BIDIR();


--A1L81 is abc_d[5]~input at IOIBUF_X19_Y0_N8
A1L81 = INPUT_BUFFER(.I(abc_d[5]), );


--abc_d[6] is abc_d[6] at PIN_R12
abc_d[6] = BIDIR();


--A1L84 is abc_d[6]~input at IOIBUF_X26_Y0_N1
A1L84 = INPUT_BUFFER(.I(abc_d[6]), );


--abc_d[7] is abc_d[7] at PIN_K9
abc_d[7] = BIDIR();


--A1L87 is abc_d[7]~input at IOIBUF_X23_Y0_N29
A1L87 = INPUT_BUFFER(.I(abc_d[7]), );


--exth_ha is exth_ha at PIN_C11
exth_ha = BIDIR();



--exth_hb is exth_hb at PIN_F9
exth_hb = BIDIR();



--exth_hd is exth_hd at PIN_R14
exth_hd = BIDIR();



--exth_he is exth_he at PIN_D15
exth_he = BIDIR();



--exth_hf is exth_hf at PIN_G15
exth_hf = BIDIR();



--exth_hg is exth_hg at PIN_T14
exth_hg = BIDIR();



--sr_dq[0] is sr_dq[0] at PIN_R3
sr_dq[0] = BIDIR();


--A1L505 is sr_dq[0]~input at IOIBUF_X3_Y0_N15
A1L505 = INPUT_BUFFER(.I(sr_dq[0]), );


--sr_dq[1] is sr_dq[1] at PIN_R13
sr_dq[1] = BIDIR();


--A1L508 is sr_dq[1]~input at IOIBUF_X30_Y0_N8
A1L508 = INPUT_BUFFER(.I(sr_dq[1]), );


--sr_dq[2] is sr_dq[2] at PIN_T6
sr_dq[2] = BIDIR();


--A1L511 is sr_dq[2]~input at IOIBUF_X16_Y0_N22
A1L511 = INPUT_BUFFER(.I(sr_dq[2]), );


--sr_dq[3] is sr_dq[3] at PIN_L9
sr_dq[3] = BIDIR();


--A1L514 is sr_dq[3]~input at IOIBUF_X23_Y0_N22
A1L514 = INPUT_BUFFER(.I(sr_dq[3]), );


--sr_dq[4] is sr_dq[4] at PIN_R10
sr_dq[4] = BIDIR();


--A1L517 is sr_dq[4]~input at IOIBUF_X26_Y0_N29
A1L517 = INPUT_BUFFER(.I(sr_dq[4]), );


--sr_dq[5] is sr_dq[5] at PIN_N9
sr_dq[5] = BIDIR();


--A1L520 is sr_dq[5]~input at IOIBUF_X23_Y0_N8
A1L520 = INPUT_BUFFER(.I(sr_dq[5]), );


--sr_dq[6] is sr_dq[6] at PIN_N12
sr_dq[6] = BIDIR();


--A1L523 is sr_dq[6]~input at IOIBUF_X30_Y0_N15
A1L523 = INPUT_BUFFER(.I(sr_dq[6]), );


--sr_dq[7] is sr_dq[7] at PIN_R7
sr_dq[7] = BIDIR();


--A1L526 is sr_dq[7]~input at IOIBUF_X16_Y0_N8
A1L526 = INPUT_BUFFER(.I(sr_dq[7]), );


--sr_dq[8] is sr_dq[8] at PIN_T11
sr_dq[8] = BIDIR();


--A1L529 is sr_dq[8]~input at IOIBUF_X26_Y0_N8
A1L529 = INPUT_BUFFER(.I(sr_dq[8]), );


--sr_dq[9] is sr_dq[9] at PIN_T13
sr_dq[9] = BIDIR();


--A1L532 is sr_dq[9]~input at IOIBUF_X30_Y0_N1
A1L532 = INPUT_BUFFER(.I(sr_dq[9]), );


--sr_dq[10] is sr_dq[10] at PIN_L7
sr_dq[10] = BIDIR();


--A1L535 is sr_dq[10]~input at IOIBUF_X16_Y0_N15
A1L535 = INPUT_BUFFER(.I(sr_dq[10]), );


--sr_dq[11] is sr_dq[11] at PIN_M9
sr_dq[11] = BIDIR();


--A1L538 is sr_dq[11]~input at IOIBUF_X23_Y0_N15
A1L538 = INPUT_BUFFER(.I(sr_dq[11]), );


--sr_dq[12] is sr_dq[12] at PIN_P3
sr_dq[12] = BIDIR();


--A1L541 is sr_dq[12]~input at IOIBUF_X3_Y0_N29
A1L541 = INPUT_BUFFER(.I(sr_dq[12]), );


--sr_dq[13] is sr_dq[13] at PIN_L8
sr_dq[13] = BIDIR();


--A1L544 is sr_dq[13]~input at IOIBUF_X19_Y0_N29
A1L544 = INPUT_BUFFER(.I(sr_dq[13]), );


--sr_dq[14] is sr_dq[14] at PIN_K10
sr_dq[14] = BIDIR();


--A1L547 is sr_dq[14]~input at IOIBUF_X28_Y0_N15
A1L547 = INPUT_BUFFER(.I(sr_dq[14]), );


--sr_dq[15] is sr_dq[15] at PIN_T2
sr_dq[15] = BIDIR();


--A1L550 is sr_dq[15]~input at IOIBUF_X5_Y0_N8
A1L550 = INPUT_BUFFER(.I(sr_dq[15]), );


--sd_dat[0] is sd_dat[0] at PIN_A3
sd_dat[0] = BIDIR();



--sd_dat[1] is sd_dat[1] at PIN_P14
sd_dat[1] = BIDIR();



--sd_dat[2] is sd_dat[2] at PIN_F15
sd_dat[2] = BIDIR();



--sd_dat[3] is sd_dat[3] at PIN_A4
sd_dat[3] = BIDIR();



--spi_clk is spi_clk at PIN_B10
spi_clk = BIDIR();



--spi_miso is spi_miso at PIN_B4
spi_miso = BIDIR();



--spi_mosi is spi_mosi at PIN_C8
spi_mosi = BIDIR();



--spi_cs_esp_n is spi_cs_esp_n at PIN_C16
spi_cs_esp_n = BIDIR();



--spi_cs_flash_n is spi_cs_flash_n at PIN_D5
spi_cs_flash_n = BIDIR();



--esp_io0 is esp_io0 at PIN_B5
esp_io0 = BIDIR();



--esp_int is esp_int at PIN_A7
esp_int = BIDIR();



--i2c_scl is i2c_scl at PIN_L1
i2c_scl = BIDIR();



--i2c_sda is i2c_sda at PIN_A14
i2c_sda = BIDIR();



--gpio[0] is gpio[0] at PIN_E11
gpio[0] = BIDIR();



--gpio[1] is gpio[1] at PIN_B7
gpio[1] = BIDIR();



--gpio[2] is gpio[2] at PIN_L6
gpio[2] = BIDIR();



--gpio[3] is gpio[3] at PIN_T15
gpio[3] = BIDIR();



--gpio[4] is gpio[4] at PIN_B14
gpio[4] = BIDIR();



--gpio[5] is gpio[5] at PIN_L2
gpio[5] = BIDIR();



--hdmi_scl is hdmi_scl at PIN_C15
hdmi_scl = BIDIR();



--hdmi_hpd is hdmi_hpd at PIN_D1
hdmi_hpd = BIDIR();



--A1L145 is abc_xmemfl_n~input at IOIBUF_X0_Y5_N22
A1L145 = INPUT_BUFFER(.I(abc_xmemfl_n), );


--abc_xmemfl_n is abc_xmemfl_n at PIN_K5
abc_xmemfl_n = INPUT();


--A1L47 is abc_a[10]~input at IOIBUF_X37_Y29_N22
A1L47 = INPUT_BUFFER(.I(abc_a[10]), );


--abc_a[10] is abc_a[10] at PIN_B13
abc_a[10] = INPUT();


--A1L49 is abc_a[11]~input at IOIBUF_X35_Y0_N15
A1L49 = INPUT_BUFFER(.I(abc_a[11]), );


--abc_a[11] is abc_a[11] at PIN_N11
abc_a[11] = INPUT();


--A1L51 is abc_a[12]~input at IOIBUF_X32_Y29_N29
A1L51 = INPUT_BUFFER(.I(abc_a[12]), );


--abc_a[12] is abc_a[12] at PIN_B12
abc_a[12] = INPUT();


--A1L29 is abc_a[1]~input at IOIBUF_X0_Y10_N8
A1L29 = INPUT_BUFFER(.I(abc_a[1]), );


--abc_a[1] is abc_a[1] at PIN_K1
abc_a[1] = INPUT();


--A1L53 is abc_a[13]~input at IOIBUF_X5_Y0_N1
A1L53 = INPUT_BUFFER(.I(abc_a[13]), );


--abc_a[13] is abc_a[13] at PIN_R4
abc_a[13] = INPUT();


--A1L31 is abc_a[2]~input at IOIBUF_X14_Y29_N8
A1L31 = INPUT_BUFFER(.I(abc_a[2]), );


--abc_a[2] is abc_a[2] at PIN_D8
abc_a[2] = INPUT();


--A1L55 is abc_a[14]~input at IOIBUF_X0_Y6_N15
A1L55 = INPUT_BUFFER(.I(abc_a[14]), );


--abc_a[14] is abc_a[14] at PIN_K2
abc_a[14] = INPUT();


--A1L33 is abc_a[3]~input at IOIBUF_X39_Y0_N29
A1L33 = INPUT_BUFFER(.I(abc_a[3]), );


--abc_a[3] is abc_a[3] at PIN_L11
abc_a[3] = INPUT();


--A1L57 is abc_a[15]~input at IOIBUF_X23_Y29_N1
A1L57 = INPUT_BUFFER(.I(abc_a[15]), );


--abc_a[15] is abc_a[15] at PIN_C9
abc_a[15] = INPUT();


--A1L35 is abc_a[4]~input at IOIBUF_X0_Y4_N1
A1L35 = INPUT_BUFFER(.I(abc_a[4]), );


--abc_a[4] is abc_a[4] at PIN_L4
abc_a[4] = INPUT();


--A1L37 is abc_a[5]~input at IOIBUF_X23_Y29_N8
A1L37 = INPUT_BUFFER(.I(abc_a[5]), );


--abc_a[5] is abc_a[5] at PIN_D9
abc_a[5] = INPUT();


--A1L39 is abc_a[6]~input at IOIBUF_X41_Y15_N8
A1L39 = INPUT_BUFFER(.I(abc_a[6]), );


--abc_a[6] is abc_a[6] at PIN_E16
abc_a[6] = INPUT();


--A1L41 is abc_a[7]~input at IOIBUF_X41_Y15_N1
A1L41 = INPUT_BUFFER(.I(abc_a[7]), );


--abc_a[7] is abc_a[7] at PIN_E15
abc_a[7] = INPUT();


--A1L43 is abc_a[8]~input at IOIBUF_X21_Y29_N8
A1L43 = INPUT_BUFFER(.I(abc_a[8]), );


--abc_a[8] is abc_a[8] at PIN_E9
abc_a[8] = INPUT();


--A1L45 is abc_a[9]~input at IOIBUF_X0_Y5_N15
A1L45 = INPUT_BUFFER(.I(abc_a[9]), );


--abc_a[9] is abc_a[9] at PIN_N1
abc_a[9] = INPUT();


--A1L27 is abc_a[0]~input at IOIBUF_X14_Y29_N29
A1L27 = INPUT_BUFFER(.I(abc_a[0]), );


--abc_a[0] is abc_a[0] at PIN_F8
abc_a[0] = INPUT();


--A1L157 is clock_48~input at IOIBUF_X0_Y14_N8
A1L157 = INPUT_BUFFER(.I(clock_48), );


--clock_48 is clock_48 at PIN_E1
clock_48 = INPUT();


--A1L150 is abc_xmemw800_n~input at IOIBUF_X0_Y5_N8
A1L150 = INPUT_BUFFER(.I(abc_xmemw800_n), );


--abc_xmemw800_n is abc_xmemw800_n at PIN_N2
abc_xmemw800_n = INPUT();


--A1L148 is abc_xmemw80_n~input at IOIBUF_X41_Y15_N15
A1L148 = INPUT_BUFFER(.I(abc_xmemw80_n), );


--abc_xmemw80_n is abc_xmemw80_n at PIN_M15
abc_xmemw80_n = INPUT();


--A1L138 is abc_xinpstb_n~input at IOIBUF_X0_Y14_N15
A1L138 = INPUT_BUFFER(.I(abc_xinpstb_n), );


--abc_xinpstb_n is abc_xinpstb_n at PIN_M2
abc_xinpstb_n = INPUT();


--A1L154 is abc_xoutpstb_n~input at IOIBUF_X0_Y14_N22
A1L154 = INPUT_BUFFER(.I(abc_xoutpstb_n), );


--abc_xoutpstb_n is abc_xoutpstb_n at PIN_M1
abc_xoutpstb_n = INPUT();


--A1L279 is hdmi_d[0](n) at PIN_P16
A1L279 = OUTPUT();


--A1L283 is hdmi_d[1](n) at PIN_N16
A1L283 = OUTPUT();


--A1L287 is hdmi_d[2](n) at PIN_K16
A1L287 = OUTPUT();


--A1L274 is hdmi_clk(n) at PIN_J16
A1L274 = OUTPUT();


--V1L27 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[2]~clkctrl at CLKCTRL_G4
V1L27 = cycloneive_clkctrl(.INCLK[0] = V1_wire_pll1_clk[2]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--V1L23 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[0]~clkctrl at CLKCTRL_G3
V1L23 = cycloneive_clkctrl(.INCLK[0] = V1_wire_pll1_clk[0]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--A1L424 is rst_n~clkctrl at CLKCTRL_G15
A1L424 = cycloneive_clkctrl(.INCLK[0] = rst_n) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--V1L25 is pll:pll|altpll:altpll_component|pll_altpll:auto_generated|wire_pll1_clk[1]~clkctrl at CLKCTRL_G2
V1L25 = cycloneive_clkctrl(.INCLK[0] = V1_wire_pll1_clk[1]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--L1L73 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|fast_clock~clkctrl at CLKCTRL_G8
L1L73 = cycloneive_clkctrl(.INCLK[0] = L1_fast_clock) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--L1L155 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|wire_lvds_tx_pll_clk[1]~clkctrl at CLKCTRL_G9
L1L155 = cycloneive_clkctrl(.INCLK[0] = L1_wire_lvds_tx_pll_clk[1]) WITH (clock_type = "Global Clock", ena_register_mode = "none");


--G1_dram_d_en is sdram:sdram|dram_d_en at DDIOOECELL_X3_Y0_N19
--register power-up is low

G1_dram_d_en = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L74Q is sdram:sdram|dram_d_en~_Duplicate_1 at DDIOOECELL_X30_Y0_N12
--register power-up is low

G1L74Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L75Q is sdram:sdram|dram_d_en~_Duplicate_2 at DDIOOECELL_X16_Y0_N26
--register power-up is low

G1L75Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L76Q is sdram:sdram|dram_d_en~_Duplicate_3 at DDIOOECELL_X23_Y0_N26
--register power-up is low

G1L76Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L77Q is sdram:sdram|dram_d_en~_Duplicate_4 at DDIOOECELL_X26_Y0_N33
--register power-up is low

G1L77Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L78Q is sdram:sdram|dram_d_en~_Duplicate_5 at DDIOOECELL_X23_Y0_N12
--register power-up is low

G1L78Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L79Q is sdram:sdram|dram_d_en~_Duplicate_6 at DDIOOECELL_X30_Y0_N19
--register power-up is low

G1L79Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L80Q is sdram:sdram|dram_d_en~_Duplicate_7 at DDIOOECELL_X16_Y0_N12
--register power-up is low

G1L80Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L81Q is sdram:sdram|dram_d_en~_Duplicate_8 at DDIOOECELL_X26_Y0_N12
--register power-up is low

G1L81Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L82Q is sdram:sdram|dram_d_en~_Duplicate_9 at DDIOOECELL_X30_Y0_N5
--register power-up is low

G1L82Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L83Q is sdram:sdram|dram_d_en~_Duplicate_10 at DDIOOECELL_X16_Y0_N19
--register power-up is low

G1L83Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L84Q is sdram:sdram|dram_d_en~_Duplicate_11 at DDIOOECELL_X23_Y0_N19
--register power-up is low

G1L84Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L85Q is sdram:sdram|dram_d_en~_Duplicate_12 at DDIOOECELL_X3_Y0_N33
--register power-up is low

G1L85Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L86Q is sdram:sdram|dram_d_en~_Duplicate_13 at DDIOOECELL_X19_Y0_N33
--register power-up is low

G1L86Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L87Q is sdram:sdram|dram_d_en~_Duplicate_14 at DDIOOECELL_X28_Y0_N19
--register power-up is low

G1L87Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--G1L88Q is sdram:sdram|dram_d_en~_Duplicate_15 at DDIOOECELL_X5_Y0_N12
--register power-up is low

G1L88Q = DFFEAS(G1L73, GLOBAL(V1L23), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[26] is led_ctr[26] at DDIOOUTCELL_X32_Y29_N25
--register power-up is low

led_ctr[26] = DFFEAS(A1L396, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[27] is led_ctr[27] at DDIOOUTCELL_X28_Y29_N18
--register power-up is low

led_ctr[27] = DFFEAS(A1L400, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--led_ctr[28] is led_ctr[28] at DDIOOUTCELL_X28_Y29_N11
--register power-up is low

led_ctr[28] = DFFEAS(A1L404, GLOBAL(V1L25), GLOBAL(A1L424),  ,  ,  ,  ,  ,  );


--L1L117 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[9]~feeder at LCCOMB_X37_Y9_N26
L1L117 = C1_qreg[6];


--L1L131 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[16]~feeder at LCCOMB_X37_Y9_N28
L1L131 = C2_qreg[4];


--L1L150 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[27]~feeder at LCCOMB_X38_Y9_N6
L1L150 = C1_qreg[0];


--L1L129 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[15]~feeder at LCCOMB_X37_Y9_N16
L1L129 = C1_qreg[4];


--L1L146 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[24]~feeder at LCCOMB_X36_Y11_N28
L1L146 = C1_qreg[1];


--L1L142 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[22]~feeder at LCCOMB_X36_Y11_N16
L1L142 = C2_qreg[2];


--L1L144 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[23]~feeder at LCCOMB_X37_Y9_N18
L1L144 = C3_qreg[2];


--L1L119 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[10]~feeder at LCCOMB_X37_Y9_N20
L1L119 = C2_qreg[6];


--L1L121 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[11]~feeder at LCCOMB_X37_Y9_N30
L1L121 = C3_qreg[6];


--L1L140 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[21]~feeder at LCCOMB_X38_Y9_N0
L1L140 = C1_qreg[2];


--Q2L8 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|hdmitx_shift_reg:outclk_shift_l|shift_reg[6]~feeder at LCCOMB_X40_Y10_N0
Q2L8 = L1_dffe22;


--L1L23 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[0]~feeder at LCCOMB_X35_Y13_N4
L1L23 = L1_dffe3a[0];


--L1L29 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[0]~feeder at LCCOMB_X35_Y13_N8
L1L29 = L1_dffe4a[0];


--L1L33 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[2]~feeder at LCCOMB_X35_Y13_N30
L1L33 = L1_dffe4a[2];


--L1L31 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe6a[1]~feeder at LCCOMB_X30_Y11_N22
L1L31 = L1_dffe4a[1];


--L1L25 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe5a[1]~feeder at LCCOMB_X30_Y11_N8
L1L25 = L1_dffe3a[1];


--L1L58 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[0]~feeder at LCCOMB_X30_Y11_N28
L1L58 = L1_dffe14a[0];


--L1L62 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[2]~feeder at LCCOMB_X30_Y11_N26
L1L62 = L1_dffe14a[2];


--L1L60 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe16a[1]~feeder at LCCOMB_X31_Y11_N4
L1L60 = L1_dffe14a[1];


--L1L38 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe7a[2]~feeder at LCCOMB_X35_Y13_N0
L1L38 = L1_dffe5a[2];


--L1L16 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[0]~feeder at LCCOMB_X35_Y13_N12
L1L16 = N2_counter_reg_bit[0];


--L1L9 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[0]~feeder at LCCOMB_X35_Y13_N10
L1L9 = N2_counter_reg_bit[0];


--L1L20 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[2]~feeder at LCCOMB_X35_Y13_N6
L1L20 = N2_counter_reg_bit[2];


--L1L13 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[2]~feeder at LCCOMB_X35_Y13_N22
L1L13 = N2_counter_reg_bit[2];


--L1L11 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe3a[1]~feeder at LCCOMB_X30_Y11_N12
L1L11 = N2_counter_reg_bit[1];


--L1L18 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe4a[1]~feeder at LCCOMB_X30_Y11_N24
L1L18 = N2_counter_reg_bit[1];


--C1L58 is tmdsenc:hdmitmds[0].enc|qreg[6]~feeder at LCCOMB_X37_Y9_N24
C1L58 = C1L62;


--L1L51 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[0]~feeder at LCCOMB_X30_Y11_N20
L1L51 = N1_counter_reg_bit[0];


--L1L65 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[0]~feeder at LCCOMB_X30_Y11_N18
L1L65 = L1_dffe16a[0];


--L1L55 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[2]~feeder at LCCOMB_X30_Y11_N10
L1L55 = N1_counter_reg_bit[2];


--L1L67 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe18a[1]~feeder at LCCOMB_X35_Y13_N24
L1L67 = L1_dffe16a[1];


--L1L53 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|dffe14a[1]~feeder at LCCOMB_X31_Y11_N10
L1L53 = N1_counter_reg_bit[1];


--L1L108 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[4]~feeder at LCCOMB_X33_Y7_N24
L1L108 = C2_qreg[8];


--C2L53 is tmdsenc:hdmitmds[1].enc|qreg[4]~feeder at LCCOMB_X37_Y9_N10
C2L53 = C2L64;


--C3L53 is tmdsenc:hdmitmds[2].enc|qreg[4]~feeder at LCCOMB_X37_Y9_N4
C3L53 = C3L63;


--L1L106 is hdmitx:hdmitx|altlvds_tx:ALTLVDS_TX_component|hdmitx_lvds_tx:auto_generated|tx_reg[3]~feeder at LCCOMB_X37_Y7_N8
L1L106 = C1_qreg[8];


--C1L55 is tmdsenc:hdmitmds[0].enc|qreg[4]~feeder at LCCOMB_X37_Y9_N6
C1L55 = C1L67;


--C2L50 is tmdsenc:hdmitmds[1].enc|qreg[2]~feeder at LCCOMB_X37_Y9_N0
C2L50 = C2L69;


--C3L50 is tmdsenc:hdmitmds[2].enc|qreg[2]~feeder at LCCOMB_X37_Y9_N2
C3L50 = C3L69;


--C2L56 is tmdsenc:hdmitmds[1].enc|qreg[6]~feeder at LCCOMB_X37_Y9_N12
C2L56 = C2L71;


--C3L56 is tmdsenc:hdmitmds[2].enc|qreg[6]~feeder at LCCOMB_X37_Y9_N22
C3L56 = C3L70;


--C1L52 is tmdsenc:hdmitmds[0].enc|qreg[2]~feeder at LCCOMB_X37_Y9_N8
C1L52 = C1L73;


--C1L30 is tmdsenc:hdmitmds[0].enc|denreg~feeder at LCCOMB_X37_Y9_N14
C1L30 = VCC;