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v1.pins 2.4 KB

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  1. # Bank 1
  2. # j5 TMS
  3. # j3 nCE
  4. # j4 TDO
  5. # h4 TDI
  6. e1 abc_a[6]
  7. b1 abc_xm_x
  8. c2 abc_a_oe
  9. c1 flash_io[0]
  10. f3 abc_a[5]
  11. d2 flash_cs_n
  12. d1 abc_a[3]
  13. # f4 nSTATUS
  14. g5 abc_a[4]
  15. f2 abc_cs_n
  16. f1 abc_a[7]
  17. g2 abc_out_n[0]
  18. g1 abc_a[8]
  19. h1 flash_sck
  20. h2 flash_io[1]
  21. # h5 nCONFIG
  22. # h3 TCK
  23. # Bank 2
  24. r1 abc_xmemw80_n
  25. p2 abc_rst_n
  26. p1 abc_xmemw800_n
  27. m2 abc_inp_n[1]
  28. m1 abc_a[13]
  29. j2 abc_out_n[1]
  30. j1 abc_a[9]
  31. # k6 GPIO N/C
  32. l6 rngio[0]
  33. l3 abc_out_n[3]
  34. k1 abc_a[11]
  35. l2 abc_inp_n[0]
  36. l1 abc_a[12]
  37. k2 abc_out_n[4]
  38. n2 abc_a[14]
  39. n1 abc_a[15]
  40. k5 abc_out_n[2]
  41. l4 abc_a[10]
  42. # Bank 3
  43. m6 abc_d[1]
  44. p6 spi_io[0]
  45. m7 spi_io[1]
  46. t5 abc_d_ce_n
  47. r5 abc_d_oe
  48. r6 abc_resin_x
  49. t6 gpio[2]
  50. l7 gpio[0]
  51. r7 gpio[5]
  52. t7 gpio[4]
  53. l8 esp_io0
  54. m8 spi_clk
  55. n8 spi_cs_esp_n
  56. p8 esp_int
  57. r8 exth_hh
  58. t8 abc_clk
  59. n3 abc_xmemfl_n
  60. p3 abc_d[0]
  61. r3 abc_d[4]
  62. t3 abc_d[5]
  63. t2 abc_d[3]
  64. r4 abc_d[6]
  65. t4 abc_d[7]
  66. n5 abc_d[2]
  67. n6 spi_cs_flash_n
  68. # Bank 4
  69. # l11 GPIO N/C
  70. # k9 GPIO N/C
  71. m11 hdmi_scl
  72. # l9 GPIO N/C
  73. t13 led[0]
  74. # m9 GPIO N/C
  75. # r9 GPI VCC
  76. n9 exth_hb
  77. t9 exth_hc
  78. r10 gpio[3]
  79. t10 abc_host
  80. r11 exth_hd
  81. t11 exth_hf
  82. r12 exth_he
  83. t12 abc_xinpstb_n
  84. k10 board_id
  85. l10 abc_xoutpstb_n
  86. p9 gpio[1]
  87. n12 exth_ha
  88. n11 exth_hg
  89. r13 hdmi_sda
  90. t14 led[1]
  91. t15 hdmi_hpd
  92. m10 sd_dat[1]
  93. p11 rngio[1]
  94. p14 tty_dtr
  95. r14 led[2]
  96. # Bank 5 (2.5 V)
  97. # n14 GPIO N/C
  98. # p15 GPIO N/C
  99. p16 hdmi_d[2](n)
  100. r16 hdmi_d[2]
  101. # k12 GPIO N/C
  102. n16 hdmi_d[1](n)
  103. n15 hdmi_d[1]
  104. # l14 GPIO N/C
  105. # l13 GPIO N/C
  106. # l16 GPIO N/C
  107. # l15 GPIO N/C
  108. k16 hdmi_d[0](n)
  109. k15 hdmi_d[0]
  110. j16 hdmi_clk(n)
  111. j15 hdmi_clk
  112. # m16 GPI GND
  113. # j14 GPIO N/C
  114. m15 clock_48
  115. # j12 GPIO N/C
  116. # j13 GPIO N/C
  117. # Bank 6
  118. e16 tty_txd # BOARD REWORK!!!
  119. e15 rtc_32khz
  120. # h14 CONF_DONE
  121. # h13 MSEL[0]
  122. # h12 MSEL[1]
  123. # g12 MSEL[2]
  124. g16 sd_cmd
  125. g15 sd_clk
  126. f13 tty_rxd # BOARD REWORK!!!
  127. f16 sd_dat[3]
  128. f15 sd_dat[0]
  129. b16 rtc_int_n
  130. f14 sd_dat[2]
  131. d16 tty_rts
  132. d15 tty_cts
  133. g11 rngio[2]
  134. c16 i2c_scl
  135. c15 i2c_sda
  136. # Bank 7
  137. d12 sr_cs_n
  138. c11 sr_dq[3]
  139. c14 sr_a[10]
  140. b13 sr_ba[1]
  141. d14 sr_a[2]
  142. a14 sr_a[0]
  143. d11 sr_dq[2]
  144. b14 sr_a[1]
  145. e11 sr_dq[1]
  146. e10 sr_dqm[0]
  147. a12 sr_dq[0]
  148. b12 sr_ras_n
  149. a11 sr_dq[5]
  150. b11 sr_dq[4]
  151. a13 sr_ba[0]
  152. a15 sr_a[3]
  153. f9 sr_we_n
  154. a10 sr_dq[7]
  155. b10 sr_dq[6]
  156. c9 sr_a[4]
  157. d9 sr_a[5]
  158. e9 sr_cas_n
  159. a9 abc_a[2]
  160. # b9 GPI abc_a[2]
  161. # Bank 8
  162. d8 sr_dqm[1]
  163. e8 sr_a[6]
  164. a8 abc_a[0]
  165. f8 sr_cke
  166. b8 abc_a[1]
  167. a7 sr_a[7]
  168. c8 sr_a[11]
  169. b7 sr_a[8]
  170. c6 sr_dq[14]
  171. a6 sr_a[9]
  172. b6 sr_a[12]
  173. e7 sr_dq[9]
  174. e6 sr_dq[12]
  175. a5 sr_dq[8]
  176. b5 sr_dq[10]
  177. d6 sr_dq[13]
  178. a4 sr_dq[11]
  179. b4 abc_rdy_x
  180. a2 abc_int800_x
  181. d5 sr_dq[15]
  182. a3 abc_nmi_x
  183. b3 abc_int80_x
  184. # c3 GPIO N/C
  185. d3 sr_clk