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spiflash.c 19 KB

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  1. #include "common.h"
  2. #include "zlib.h"
  3. #include "spiflash.h"
  4. #include "esp.h"
  5. #include "matchver.h"
  6. #include "boardinfo_fpga.h"
  7. #if 1
  8. # include "console.h"
  9. # define MSG(...) con_printf(__VA_ARGS__)
  10. #else
  11. # define MSG(...) ((void)0)
  12. #endif
  13. struct spz_stream;
  14. typedef struct spz_stream spz_stream;
  15. #define NBUF 4
  16. struct spz_stream {
  17. z_stream zs;
  18. const struct spiflash *flash;
  19. uint8_t *optr; /* Output data pointer into obuf */
  20. /* Note: available output data ends at zs->next_out */
  21. union {
  22. uint8_t *bufs[NBUF];
  23. struct {
  24. uint8_t *ibuf; /* Input buffer if compressed */
  25. uint8_t *obuf; /* Output buffer */
  26. uint8_t *dbuf; /* Block data buffer */
  27. uint8_t *vbuf; /* Readback/verify buffer */
  28. };
  29. };
  30. struct fw_header header; /* Header of currently processed chunk */
  31. struct fw_header vmatch; /* Matched firmware version string */
  32. int err; /* Error code to return */
  33. bool eoi; /* Reached end of input */
  34. bool cleanup; /* Call inflateEnd() */
  35. };
  36. static void *spz_malloc(spz_stream *spz, size_t bytes)
  37. {
  38. void *p = malloc(bytes);
  39. if (!p && !spz->err) {
  40. spz->err = Z_MEM_ERROR;
  41. }
  42. return p;
  43. }
  44. static int spiflash_read_data(spz_stream *spz, void *buf, unsigned int len)
  45. {
  46. uint8_t *p = buf;
  47. while (len) {
  48. unsigned int avail = spz->zs.next_out - spz->optr;
  49. if (spz->err)
  50. break;
  51. if (avail) {
  52. if (avail > len)
  53. avail = len;
  54. memcpy(p, spz->optr, avail);
  55. p += avail;
  56. spz->optr += avail;
  57. len -= avail;
  58. } else {
  59. spz->optr = spz->zs.next_out = spz->obuf;
  60. spz->zs.avail_out = SPIFLASH_BLOCK_SIZE;
  61. while (spz->zs.avail_out) {
  62. if (!spz->zs.avail_in && !spz->eoi) {
  63. int (*read_data)(void *, void *, unsigned int);
  64. read_data = spz->flash->read_data;
  65. spz->zs.next_in = spz->ibuf;
  66. int rlen = read_data(spz->flash->cookie,
  67. spz->ibuf, SPIFLASH_BLOCK_SIZE);
  68. spz->eoi = rlen < SPIFLASH_BLOCK_SIZE;
  69. if (rlen < 0) {
  70. if (!spz->err)
  71. spz->err = rlen;
  72. rlen = 0;
  73. }
  74. spz->zs.avail_in = rlen;
  75. }
  76. int rv = inflate(&spz->zs, Z_SYNC_FLUSH);
  77. if (rv == Z_OK || (rv == Z_BUF_ERROR && !spz->eoi))
  78. continue;
  79. spz->eoi = true;
  80. if (rv != Z_STREAM_END && !spz->err)
  81. spz->err = rv;
  82. break;
  83. }
  84. }
  85. }
  86. return p - (uint8_t *)buf;
  87. }
  88. /*
  89. * spz needs to be initialized to zero except the flash, zs.next_in,
  90. * and zs.avail_in fields.
  91. */
  92. static int spiflash_data_init(spz_stream *spz)
  93. {
  94. int rv = Z_OK;
  95. uint8_t *rdbuf = NULL;
  96. int rlen;
  97. uint32_t header_crc;
  98. for (int i = 0; i < NBUF; i++) {
  99. spz->bufs[i] = spz_malloc(spz, SPIFLASH_BLOCK_SIZE);
  100. if (!spz->bufs[i])
  101. goto err;
  102. }
  103. spz->eoi = !spz->flash->read_data;
  104. /* gzip, max window size */
  105. rv = inflateInit2(&spz->zs, 16 + 15);
  106. if (rv != Z_OK && rv != Z_STREAM_END) {
  107. spz->err = rv;
  108. goto err;
  109. }
  110. spz->cleanup = true;
  111. err:
  112. return spz->err;
  113. }
  114. static int spiflash_data_cleanup(spz_stream *spz)
  115. {
  116. int err = 0;
  117. if (!spz)
  118. return 0;
  119. err = spz->err;
  120. if (spz->cleanup)
  121. inflateEnd(&spz->zs);
  122. for (int i = 0; i < NBUF; i++) {
  123. if (spz->bufs[i])
  124. free(spz->bufs[i]);
  125. }
  126. return err;
  127. }
  128. /*
  129. * Set up a command header with an address according to the SPI
  130. * addressing mode. Returns a pointer to the first byte past the
  131. * address.
  132. */
  133. static void *spiflash_setup_addrcmd(const struct spiflash *flash,
  134. uint32_t addr,
  135. uint8_t cmd24, uint8_t cmd32,
  136. void *cmdbuf)
  137. {
  138. enum spiflash_addr_mode mode = flash->param->addr;
  139. uint8_t *cmd = cmdbuf;
  140. if (!mode)
  141. mode = addr < (1 << 24) ? SPIFLASH_ADDR_24BIT : SPIFLASH_ADDR_32BIT;
  142. if (mode == SPIFLASH_ADDR_24BIT) {
  143. *cmd++ = cmd24;
  144. } else {
  145. *cmd++ = cmd32;
  146. *cmd++ = addr >> 24;
  147. }
  148. *cmd++ = addr >> 16;
  149. *cmd++ = addr >> 8;
  150. *cmd++ = addr;
  151. return cmd;
  152. }
  153. static int spiflash_get_status(const struct spiflash *flash,
  154. uint8_t cmd, uint8_t *sr)
  155. {
  156. return flash->ops->spi_read(flash->cookie, &cmd, 1, sr, 1,
  157. flash->param->tshsl);
  158. }
  159. /* This needs a timeout function */
  160. static int spiflash_wait_status(const struct spiflash *flash,
  161. int delay, uint8_t mask, uint8_t val)
  162. {
  163. uint8_t sr1;
  164. int rv;
  165. do {
  166. if (flash->ops->yield)
  167. flash->ops->yield(flash->cookie, delay);
  168. rv = spiflash_get_status(flash, ROM_READ_SR1, &sr1);
  169. if (rv)
  170. return rv;
  171. } while ((sr1 & mask) != val); /* Waiting... */
  172. return 0;
  173. }
  174. int spiflash_read(const struct spiflash *flash,
  175. uint32_t addr, void *buffer, size_t len)
  176. {
  177. uint8_t cmdbuf[6];
  178. uint8_t *cmd;
  179. cmd = spiflash_setup_addrcmd(flash, addr,
  180. ROM_FAST_READ, ROM_FAST_READ_32BIT,
  181. cmdbuf);
  182. *cmd++ = 0; /* Dummy cycles */
  183. return flash->ops->spi_read(flash->cookie, cmdbuf, cmd - cmdbuf,
  184. buffer, len, flash->param->tshsl1);
  185. }
  186. static int spiflash_simple_command(const struct spiflash *flash, uint8_t cmd)
  187. {
  188. return flash->ops->spi_write(flash->cookie, &cmd, 1, NULL, 0,
  189. flash->param->tshsl);
  190. }
  191. static int spiflash_write_enable(const struct spiflash *flash)
  192. {
  193. uint8_t sr1;
  194. int rv;
  195. rv = spiflash_wait_status(flash, 0, 1, 0);
  196. if (rv)
  197. return rv;
  198. rv = spiflash_simple_command(flash, ROM_WRITE_ENABLE);
  199. if (rv)
  200. return rv;
  201. return spiflash_wait_status(flash, 0, 3, 2);
  202. }
  203. static int spiflash_program(const struct spiflash *flash,
  204. uint32_t addr, const void *buffer, size_t len)
  205. {
  206. uint8_t cmdbuf[5];
  207. uint8_t *cmd;
  208. int rv;
  209. rv = spiflash_write_enable(flash);
  210. if (rv)
  211. return rv;
  212. cmd = spiflash_setup_addrcmd(flash, addr,
  213. ROM_PAGE_PROGRAM, ROM_PAGE_PROGRAM_32BIT,
  214. cmdbuf);
  215. rv = flash->ops->spi_write(flash->cookie, cmdbuf, cmd - cmdbuf,
  216. buffer, len, flash->param->tshsl2);
  217. if (rv)
  218. return rv;
  219. return spiflash_wait_status(flash, flash->param->tpp, 3, 0);
  220. }
  221. /*
  222. * Erase up to (long bits) sectors, using block erase if possible.
  223. */
  224. static int spiflash_erase(const struct spiflash *flash,
  225. uint32_t addr, unsigned long sector_mask)
  226. {
  227. uint8_t cmdbuf[5];
  228. uint8_t *cmd;
  229. uint8_t cmd24, cmd32;
  230. uint32_t erasesize;
  231. int rv;
  232. int delay;
  233. const uint32_t block_mask = SPIFLASH_BLOCK_SIZE - 1;
  234. const unsigned long block_sector_mask
  235. = block_mask >> SPIFLASH_SECTOR_SHIFT;
  236. if (!sector_mask) {
  237. MSG("update: nothing to erase\n");
  238. return 0;
  239. }
  240. while (sector_mask) {
  241. if (!(addr & block_mask) &&
  242. ((sector_mask & block_sector_mask) == block_sector_mask)) {
  243. cmd24 = ROM_ERASE_64K;
  244. cmd32 = ROM_ERASE_64K_32BIT;
  245. delay = flash->param->tbe2;
  246. erasesize = SPIFLASH_BLOCK_SIZE;
  247. } else {
  248. cmd24 = ROM_ERASE_4K;
  249. cmd32 = ROM_ERASE_4K_32BIT;
  250. delay = flash->param->tse;
  251. erasesize = SPIFLASH_SECTOR_SIZE;
  252. }
  253. if (sector_mask & 1) {
  254. rv = spiflash_write_enable(flash);
  255. if (rv)
  256. return rv;
  257. cmd = spiflash_setup_addrcmd(flash, addr, cmd24, cmd32, cmdbuf);
  258. rv = flash->ops->spi_write(flash->cookie, cmdbuf, cmd - cmdbuf,
  259. NULL, 0, flash->param->tshsl2);
  260. if (rv)
  261. return rv;
  262. rv = spiflash_wait_status(flash, delay, 3, 0);
  263. if (rv)
  264. return rv;
  265. }
  266. addr += erasesize;
  267. sector_mask >>= (erasesize >> SPIFLASH_SECTOR_SHIFT);
  268. }
  269. MSG("ok\n");
  270. return 0;
  271. }
  272. /*
  273. * from: current flash contents
  274. * to: desired flash contents
  275. *
  276. * These are assumed to be aligned full block buffers
  277. */
  278. enum flashmem_status {
  279. FMS_DONE, /* All done, no programming needed */
  280. FMS_PROGRAM, /* Can be programmed */
  281. FMS_ERASE, /* Needs erase before programming */
  282. FMS_NOTCHECKED /* Not checked yet */
  283. };
  284. static enum flashmem_status
  285. spiflash_memcmp(const void *from, const void *to, size_t len)
  286. {
  287. const uint32_t *pf = from;
  288. const uint32_t *pt = to;
  289. const uint32_t *pfend = (const uint32_t *)((const char *)from + len);
  290. uint32_t doprog = 0;
  291. uint32_t doerase = 0;
  292. while (pf < pfend) {
  293. uint32_t f = *pf++;
  294. uint32_t t = *pt++;
  295. doprog |= f ^ t; /* Need programming if any data mismatch */
  296. doerase |= ~f & t; /* Need erasing if any 0 -> 1 */
  297. }
  298. return doerase ? FMS_ERASE : doprog ? FMS_PROGRAM : FMS_DONE;
  299. }
  300. /*
  301. * Check a block for sectors which need erasing and pages which need
  302. * programming; the prog_mask is 256 bits long and so span multiple words.
  303. *
  304. * The desired input is spz->dbuf and the existing flash content should be
  305. * already read into spz->vbuf.
  306. *
  307. */
  308. static void spiflash_check_block(spz_stream *spz, uint32_t addr,
  309. uint32_t *erase_mask, uint32_t *prog_mask)
  310. {
  311. const uint8_t *p, *q;
  312. unsigned int page;
  313. *erase_mask = 0;
  314. memset(prog_mask, 0, SPIFLASH_BLOCK_SIZE/SPIFLASH_PAGE_SIZE/8);
  315. p = spz->vbuf;
  316. q = spz->dbuf;
  317. for (page = 0; page < SPIFLASH_BLOCK_SIZE/SPIFLASH_PAGE_SIZE; page++) {
  318. enum flashmem_status status;
  319. switch (spiflash_memcmp(p, q, SPIFLASH_PAGE_SIZE)) {
  320. case FMS_ERASE:
  321. *erase_mask |= UINT32_C(1) <<
  322. (page >> (SPIFLASH_SECTOR_SHIFT-SPIFLASH_PAGE_SHIFT));
  323. break;
  324. case FMS_PROGRAM:
  325. prog_mask[page >> 5] |= UINT32_C(1) << (page & 31);
  326. break;
  327. default:
  328. /* Nothing to do! */
  329. break;
  330. }
  331. p += SPIFLASH_PAGE_SIZE;
  332. q += SPIFLASH_PAGE_SIZE;
  333. }
  334. }
  335. static int spiflash_flash_chunk(spz_stream *spz)
  336. {
  337. unsigned int data_left = spz->header.len;
  338. unsigned int addr = spz->header.addr;
  339. int rv;
  340. while (data_left && !spz->err) {
  341. unsigned int pre_padding = addr & (SPIFLASH_BLOCK_SIZE-1);
  342. unsigned int post_padding;
  343. unsigned int bytes;
  344. bytes = SPIFLASH_BLOCK_SIZE - pre_padding;
  345. post_padding = 0;
  346. if (bytes > data_left) {
  347. post_padding = bytes - data_left;
  348. bytes = data_left;
  349. }
  350. addr -= pre_padding;
  351. /* Read the current content of this block into vbuf */
  352. rv = spiflash_read(spz->flash, addr, spz->vbuf, SPIFLASH_BLOCK_SIZE);
  353. if (rv)
  354. goto err;
  355. /* Copy any invariant chunk */
  356. if (pre_padding)
  357. memcpy(spz->dbuf, spz->vbuf, pre_padding);
  358. if (post_padding)
  359. memcpy(spz->dbuf+SPIFLASH_BLOCK_SIZE-post_padding,
  360. spz->vbuf+SPIFLASH_BLOCK_SIZE-post_padding,
  361. post_padding);
  362. rv = spiflash_read_data(spz, spz->dbuf+pre_padding, bytes);
  363. if (rv != (int)bytes) {
  364. MSG("needed %u bytes got %d, \n", bytes, rv);
  365. rv = Z_DATA_ERROR;
  366. goto err;
  367. }
  368. uint32_t erase_mask;
  369. uint32_t prog_mask[SPIFLASH_BLOCK_SIZE >> (SPIFLASH_PAGE_SHIFT+5)];
  370. spiflash_check_block(spz, addr, &erase_mask, prog_mask);
  371. if (erase_mask) {
  372. MSG("flash: erasing at 0x%06x mask %04x... ", addr, erase_mask);
  373. rv = spiflash_erase(spz->flash, addr, erase_mask);
  374. if (rv)
  375. goto err;
  376. /* Verify that the sector did erase */
  377. rv = spiflash_read(spz->flash, addr, spz->vbuf, SPIFLASH_BLOCK_SIZE);
  378. if (rv) {
  379. MSG("readback ");
  380. goto err;
  381. }
  382. spiflash_check_block(spz, addr, &erase_mask, prog_mask);
  383. if (erase_mask) {
  384. spz->err = FWUPDATE_ERR_ERASE_FAILED;
  385. MSG("%04x left, ", erase_mask);
  386. goto err;
  387. }
  388. MSG("ok\n");
  389. }
  390. unsigned int page;
  391. bool programmed = false;
  392. for (page = 0; page < (SPIFLASH_BLOCK_SIZE >> SPIFLASH_PAGE_SHIFT);
  393. page++) {
  394. uint32_t page_offs = page << SPIFLASH_PAGE_SHIFT;
  395. if (!(prog_mask[page >> 5] & (UINT32_C(1) << (page & 31))))
  396. continue; /* No need to program */
  397. programmed = true;
  398. udelay(100);
  399. MSG("flash: writing at 0x%06x... ", addr + page_offs);
  400. rv = spiflash_program(spz->flash, addr + page_offs,
  401. spz->dbuf + page_offs,
  402. SPIFLASH_PAGE_SIZE);
  403. if (rv)
  404. goto err;
  405. /* Verify that the page did write */
  406. rv = spiflash_read(spz->flash, addr + page_offs,
  407. spz->vbuf + page_offs,
  408. SPIFLASH_PAGE_SIZE);
  409. if (rv) {
  410. MSG("readback ");
  411. goto err;
  412. }
  413. if (memcmp(spz->dbuf + page_offs, spz->vbuf + page_offs,
  414. SPIFLASH_PAGE_SIZE)) {
  415. MSG("verify ");
  416. spz->err = FWUPDATE_ERR_PROGRAM_FAILED;
  417. goto err;
  418. }
  419. MSG("ok\n");
  420. }
  421. if (programmed)
  422. MSG("ok\n");
  423. else
  424. MSG("unchanged\n");
  425. addr += pre_padding + bytes;
  426. data_left -= bytes;
  427. }
  428. return spz->err;
  429. err:
  430. MSG("failed\n");
  431. if (!spz->err)
  432. spz->err = rv;
  433. return spz->err;
  434. }
  435. /* Serial Flash Discoverable Parameter Table, see JESD216 */
  436. static int spiflash_get_sfdp(const struct spiflash *flash, void *sfdp)
  437. {
  438. static const uint8_t cmd_read_sfdp[] = { ROM_READ_SFDP, 0, 0, 0, 0 };
  439. return flash->ops->spi_read(flash->cookie, cmd_read_sfdp,
  440. sizeof cmd_read_sfdp, sfdp, SPIFLASH_SFDP_SIZE,
  441. flash->param->tshsl);
  442. }
  443. static void *spiflash_read_chunk_str(spz_stream *spz)
  444. {
  445. int rv;
  446. if (spz->header.len >= SPIFLASH_BLOCK_SIZE) {
  447. spz->err = Z_DATA_ERROR;
  448. return NULL;
  449. }
  450. rv = spiflash_read_data(spz, spz->dbuf, spz->header.len);
  451. if (spz->err) {
  452. return NULL;
  453. }
  454. if (rv != (int)spz->header.len) {
  455. spz->err = Z_DATA_ERROR;
  456. return NULL;
  457. }
  458. spz->dbuf[spz->header.len] = '\0';
  459. return spz->dbuf;
  460. }
  461. /* Skip a data chunk */
  462. static int spiflash_skip_chunk(spz_stream *spz)
  463. {
  464. unsigned int skip = spz->header.len;
  465. while (skip) {
  466. unsigned int block = min(skip, SPIFLASH_BLOCK_SIZE);
  467. int rv = spiflash_read_data(spz, spz->dbuf, block);
  468. if (spz->err)
  469. return spz->err;
  470. if (rv != (int)block) {
  471. return spz->err = Z_DATA_ERROR;
  472. }
  473. skip -= block;
  474. }
  475. return 0;
  476. }
  477. /* Read a chunk into malloc()'d storage */
  478. static int spiflash_load_chunk(spz_stream *spz, void **dptr)
  479. {
  480. void *data;
  481. int len = spz->header.len;
  482. *dptr = NULL;
  483. data = spz_malloc(spz, len);
  484. if (!data) {
  485. spiflash_skip_chunk(spz);
  486. return spz->err;
  487. } else {
  488. int rv = spiflash_read_data(spz, data, len);
  489. if (!spz->err && rv != len)
  490. spz->err = Z_DATA_ERROR;
  491. if (spz->err) {
  492. free(data);
  493. return spz->err;
  494. }
  495. *dptr = data;
  496. return rv;
  497. }
  498. }
  499. static int esp_ota_chunk(spz_stream *spz)
  500. {
  501. void *data;
  502. int len = spiflash_load_chunk(spz, &data);
  503. if (data) {
  504. esp_ota(data, len);
  505. free(data);
  506. }
  507. return spz->err;
  508. }
  509. /* Get a piece of the chunk header */
  510. static int fwupdate_get_header_data(spz_stream *spz, void *buf, int len)
  511. {
  512. int rv;
  513. rv = spiflash_read_data(spz, buf, len);
  514. if (spz->err)
  515. return spz->err;
  516. else if (!rv)
  517. return Z_STREAM_END;
  518. else if (rv != len)
  519. return spz->err = Z_STREAM_ERROR;
  520. else
  521. return Z_OK;
  522. }
  523. /* Get and validate a chunk header */
  524. static int fwupdate_get_header(spz_stream *spz)
  525. {
  526. struct fw_header * const hdr = &spz->header;
  527. uint8_t *hptr = (uint8_t *)hdr;
  528. int rv;
  529. unsigned int hlen;
  530. memset(hdr, 0, sizeof *hdr);
  531. hdr->vmax = -1;
  532. rv = fwupdate_get_header_data(spz, hptr, FW_HDR_LEN_V1);
  533. if (rv)
  534. return rv;
  535. switch (hdr->magic) {
  536. case FW_MAGIC_V1:
  537. hlen = FW_HDR_LEN_V1;
  538. break;
  539. case FW_MAGIC_V2:
  540. hlen = FW_HDR_LEN_V2;
  541. break;
  542. default:
  543. MSG("update: bad chunk header magic 0x%08x\n", hdr->magic);
  544. hlen = 0;
  545. rv = Z_DATA_ERROR;
  546. break;
  547. }
  548. if (hlen > FW_HDR_LEN_V1) {
  549. rv = fwupdate_get_header_data(spz, hptr + FW_HDR_LEN_V1,
  550. hlen - FW_HDR_LEN_V1);
  551. if (rv == Z_STREAM_END) /* Only valid for the first chunk */
  552. rv = Z_STREAM_ERROR;
  553. }
  554. return spz->err = rv;
  555. }
  556. /* Process a data chunk; return a nonzero value if done */
  557. static int spiflash_process_chunk(spz_stream *spz)
  558. {
  559. int rv;
  560. char *str;
  561. rv = fwupdate_get_header(spz);
  562. if (rv)
  563. return rv;
  564. if (spz->header.type != FDT_NOTE &&
  565. spz->header.type != FDT_TARGET &&
  566. spz->header.type != FDT_END &&
  567. !(spz->header.flags & FDF_PRETARGET)) {
  568. if (!spz->vmatch.magic) {
  569. /* No matching firmware target support */
  570. return spz->err = FWUPDATE_ERR_NOT_MINE;
  571. }
  572. if (spz->header.vmin > spz->vmatch.vmax ||
  573. spz->header.vmax < spz->vmatch.vmin ||
  574. ((spz->header.vmatch ^ spz->vmatch.vmatch) & spz->header.vmask)) {
  575. /* Chunk not applicable to this target */
  576. goto skip;
  577. }
  578. }
  579. con_printf("update: chunk type %u size %u addr 0x%08x\n",
  580. spz->header.type, spz->header.len, spz->header.addr);
  581. switch (spz->header.type) {
  582. case FDT_END:
  583. return Z_STREAM_END; /* End of data - not an error */
  584. case FDT_DATA:
  585. if (!spz->flash->ops)
  586. goto skip;
  587. return spiflash_flash_chunk(spz);
  588. case FDT_TARGET:
  589. {
  590. bool match;
  591. str = spiflash_read_chunk_str(spz);
  592. match = match_version(board_info.version_str, str);
  593. if (match || spz->header.magic == FW_MAGIC_V1)
  594. spz->vmatch = spz->header;
  595. MSG("update: firmware file supports: %s%s\n",
  596. str, match ? " (match)" : "");
  597. return Z_OK;
  598. }
  599. case FDT_NOTE:
  600. str = spiflash_read_chunk_str(spz);
  601. MSG("update: %s\n", str);
  602. break;
  603. case FDT_ESP_OTA:
  604. if (!spz->flash->ops)
  605. goto skip;
  606. return esp_ota_chunk(spz);
  607. case FDT_FPGA_INIT:
  608. case FDT_ESP_PART:
  609. case FDT_ESP_SYS:
  610. case FDT_ESP_TOOL:
  611. case FDT_BOARDINFO:
  612. /* Used only when flashing from ESP32 */
  613. goto skip;
  614. default:
  615. if (spz->header.flags & FDF_OPTIONAL)
  616. goto skip;
  617. MSG("update: unknown chunk type: %u\n", spz->header.type);
  618. return spz->err = Z_DATA_ERROR;
  619. }
  620. return spz->err;
  621. skip:
  622. return spiflash_skip_chunk(spz);
  623. }
  624. int spiflash_flash_file(const struct spiflash *flash, void *buf, size_t buflen)
  625. {
  626. spz_stream _spz;
  627. spz_stream * const spz = &_spz; /* For consistency in notation */
  628. int err = 0;
  629. memset(spz, 0, sizeof *spz);
  630. spz->zs.avail_in = buflen;
  631. spz->zs.next_in = buf;
  632. spz->flash = flash;
  633. err = spiflash_data_init(spz);
  634. if (err)
  635. return err;
  636. while (!spiflash_process_chunk(spz)) {
  637. /* Process data chunks until end */
  638. }
  639. err = spiflash_data_cleanup(spz);
  640. if (err)
  641. MSG("failed (err %d)\n", err);
  642. return err;
  643. }
  644. /*
  645. * Read unique serial number from flash. Note: returns id in
  646. * bigendian ("network") byte order.
  647. */
  648. int spiflash_read_id(const struct spiflash *flash, void *id)
  649. {
  650. static const uint8_t read_unique_id[] = { ROM_READ_UNIQUE_ID, 0, 0, 0, 0 };
  651. return flash->ops->spi_read(flash->cookie, read_unique_id,
  652. sizeof read_unique_id,
  653. id, SPIFLASH_ID_LEN, flash->param->tshsl);
  654. }
  655. /*
  656. * Read vendor and device ID from flash.
  657. */
  658. int spiflash_read_vdid(const struct spiflash *flash, void *vdid)
  659. {
  660. static const uint8_t read_vdid[] = { ROM_MANUFACTURER_DEVICE_ID, 0, 0, 0 };
  661. return flash->ops->spi_read(flash->cookie, read_vdid,
  662. sizeof read_vdid,
  663. vdid, SPIFLASH_VDID_LEN, flash->param->tshsl);
  664. }
  665. /*
  666. * Write an absolute region to flash
  667. */
  668. int spiflash_flash_data(const struct spiflash *flash, uint32_t addr,
  669. const void *data, size_t len)
  670. {
  671. spz_stream _spz;
  672. spz_stream * const spz = &_spz; /* For consistency in notation */
  673. int err = 0;
  674. memset(spz, 0, sizeof *spz);
  675. /* No ibuf or obuf */
  676. for (int i = 2; i < NBUF; i++) {
  677. spz->bufs[i] = spz_malloc(spz, SPIFLASH_BLOCK_SIZE);
  678. if (!spz->bufs[i])
  679. goto err;
  680. }
  681. spz->flash = flash;
  682. spz->optr = (uint8_t *)data; /* OK to lose const here */
  683. spz->obuf = (uint8_t *)data; /* OK to lose const here */
  684. spz->zs.next_out = (uint8_t *)data + len;
  685. spz->eoi = true;
  686. spz->header.len = len;
  687. spz->header.addr = addr;
  688. spiflash_flash_chunk(spz);
  689. err:
  690. for (int i = 2; i < NBUF; i++)
  691. if (spz->bufs[i])
  692. free(spz->bufs[i]);
  693. return spz->err;
  694. }