hello.c 5.2 KB

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  1. #include "fw.h"
  2. #include "io.h"
  3. #include "sys.h"
  4. #include "console.h"
  5. static unsigned int errors = 0;
  6. static unsigned int rate_limit;
  7. static char err_char;
  8. static void data_check(volatile uint32_t *p, uint32_t expect)
  9. {
  10. uint32_t readback = *p;
  11. if (readback != expect) {
  12. if (rate_limit) {
  13. con_printf("\n%p : read %08x expected %08x\n",
  14. p, readback, expect);
  15. rate_limit--;
  16. }
  17. err_char = 'X';
  18. errors++;
  19. }
  20. }
  21. static inline void write_check(volatile uint32_t *p, uint32_t v)
  22. {
  23. *p = v;
  24. data_check(p, v);
  25. }
  26. #define ERROR_RATELIMIT 8
  27. #define A 0x45c11ba1 /* Arbitrary odd constant */
  28. #define B 0x78dacecb /* Arbitrary constant */
  29. static void test_sdram(void)
  30. {
  31. const unsigned int sdram_words = SDRAM_SIZE >> 2;
  32. static unsigned int stride = 4;
  33. uint32_t start_time = rdtime();
  34. uint32_t w = 0;
  35. uint32_t n;
  36. con_printf("Testing SDRAM from 0x%08x to 0x%08x, stride 0x%08x...\n",
  37. SDRAM_ADDR, SDRAM_END, stride);
  38. err_char = '-';
  39. rate_limit = ERROR_RATELIMIT;
  40. for (n = 1, w = 0; n <= sdram_words; n++) {
  41. uint32_t a = w + SDRAM_ADDR;
  42. volatile uint32_t *p = (volatile uint32_t *)a;
  43. write_check(p, 0);
  44. write_check(p, ~0);
  45. write_check(p, ~w);
  46. write_check(p, w);
  47. write_check(p, A*w + B);
  48. if (!(n & 0x3ffff)) {
  49. CON_DATA = err_char;
  50. err_char = '-';
  51. }
  52. w = (w + stride) & SDRAM_MASK;
  53. }
  54. con_puts("\nReading back to check for aliases...\n");
  55. rate_limit = ERROR_RATELIMIT;
  56. for (n = 1, w = 0; n <= sdram_words; n++) {
  57. uint32_t a = w + SDRAM_ADDR;
  58. volatile uint32_t *p = (volatile uint32_t *)a;
  59. data_check(p, A*w + B);
  60. if (!(n & 0x3ffff)) {
  61. CON_DATA = err_char;
  62. err_char = '-';
  63. }
  64. w = (w - stride) & SDRAM_MASK;
  65. }
  66. con_printf("\nSDRAM test complete, time = %u ms\n",
  67. (rdtime() - start_time)/(CPU_HZ/1000));
  68. stride *= 3;
  69. stride = (stride & SDRAM_MASK) ^ (stride >> (SDRAM_ADDR_BITS-2));
  70. stride = (stride & ~3) | 4;
  71. }
  72. static void test_download(void)
  73. {
  74. volatile uint32_t *p = (uint32_t *)SDRAM_ADDR;
  75. const unsigned int words = 128*1024;
  76. unsigned int ok = words;
  77. uint32_t val = 0x00001111;
  78. unsigned int ratelimit = ERROR_RATELIMIT;
  79. for (unsigned int w = 0; w < words; w++) {
  80. uint32_t ram = *p;
  81. if (ram != val) {
  82. ok--;
  83. if (ratelimit) {
  84. ratelimit--;
  85. con_printf("%p : 0x%08x expected 0x%08x\n", p, ram, val);
  86. }
  87. }
  88. p++;
  89. val = (val * 0x89abcdef) +
  90. (uint32_t)((val * 0x89abcdefULL) >> 32) +
  91. (w * 0x76543210);
  92. }
  93. con_printf("%u/%u words OK\n\n", ok, words);
  94. for (unsigned int o = 0; o < (512*1024); o += (64*1024)) {
  95. volatile uint16_t *hp = (uint16_t *)(SDRAM_ADDR + o);
  96. p = (uint32_t *)(SDRAM_ADDR + o);
  97. for (unsigned int w = 0; w < 8; w++) {
  98. uint16_t l = *hp++;
  99. uint16_t h = *hp++;
  100. con_printf(" %04x.%04x", l, h);
  101. }
  102. con_putc('\n');
  103. }
  104. }
  105. /* Make sure we don't leave anything in SDRAM that could be a false negative */
  106. static void scrub_sdram(void)
  107. {
  108. volatile uint32_t *p;
  109. for (p = (uint32_t *)SDRAM_ADDR; p < (uint32_t *)SDRAM_END; p++)
  110. *p = 0xdeadbeef;
  111. }
  112. static volatile uint32_t timer_irq_count;
  113. IRQHANDLER(sysclock)
  114. {
  115. uint32_t count = timer_irq_count;
  116. count++;
  117. timer_irq_count = count;
  118. set_led(count >> 3); /* 4 Hz */
  119. }
  120. static void init_abc_memmap(void)
  121. {
  122. volatile uint32_t *pg = &ABCMEMMAP_PAGE(0);
  123. /* Memory */
  124. for (unsigned int addr = 0; addr < 0x10000; addr += 512) {
  125. if (addr >= 0x5800 && addr < 0x6000) {
  126. *pg++ = ABCMEMMAP_RD | addr;
  127. } else if (addr >= 0x8000 && addr < 0xc000) {
  128. *pg++ = ABCMEMMAP_RD | ABCMEMMAP_WR | addr;
  129. } else {
  130. *pg++ = addr; /* Disabled */
  131. }
  132. }
  133. /* I/O */
  134. for (unsigned int sel = 0; sel < 64; sel++) {
  135. ABCMEMMAP_WRPORT(sel) = 0; /* Write DMA address/OUT enable */
  136. ABCMEMMAP_WRCOUNT(sel) = 0; /* DMA write byte count */
  137. ABCMEMMAP_RDPORT(sel) = 0; /* Read DMA address/IN enable */
  138. ABCMEMMAP_RDCOUNT(sel) = 0; /* DMA read byte count */
  139. }
  140. }
  141. static uint32_t timer_irq_start;
  142. static void init(void)
  143. {
  144. static const char hello[] =
  145. "\n*** Hello, World! ***\n"
  146. "Firmware compiled on: " __DATE__ " " __TIME__ "\n\n";
  147. init_abc_memmap();
  148. con_set_baudrate(115000);
  149. set_led(0);
  150. con_puts(hello);
  151. timer_irq_count = 0;
  152. timer_irq_start = rdtime();
  153. unmask_irq(SYSCLOCK_IRQ);
  154. read_rtc();
  155. }
  156. void main(void)
  157. {
  158. /* The data section is not reinitialized on reset */
  159. static unsigned int loops = 1;
  160. uint32_t done;
  161. uint32_t irq_count;
  162. uint32_t abc_status;
  163. while (!(SYS_ROMCOPY & SYS_ROMCOPY_DONE))
  164. pause();
  165. done = rdtime() - time_zero;
  166. init();
  167. con_printf("This is loop: %u\n", loops++);
  168. con_printf("SDRAM download took %u us\n", done/(CPU_HZ/1000000));
  169. abc_status = ABC_STATUS;
  170. if (abc_status & ABC_STATUS_LIVE) {
  171. con_printf("I seem to be connected to ABC%d\n",
  172. (ABC_STATUS & ABC_STATUS_800) ? 800 : 80);
  173. } else {
  174. con_puts("No ABC-bus host detected\n");
  175. }
  176. test_download();
  177. disk_init();
  178. test_sdram();
  179. scrub_sdram();
  180. irq_count = timer_irq_count;
  181. done = rdtime() - timer_irq_start;
  182. con_printf("%u timer interrupts received in %u us\n",
  183. irq_count, done/(CPU_HZ/1000000));
  184. udelay(1000000);
  185. con_puts("*** Doing reset ***\n");
  186. con_flush();
  187. while ( 1 )
  188. reset();
  189. }