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ABC80
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max80_fw
réplica de https://git.zytor.com/abc80/max80/fw.git/
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Rama: esplink
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max80_fw
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fpga
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output
H. Peter Anvin 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
..
bypass.jic 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
bypass.pin f1e04bf5c7 esp32 firmware image with support for OTA updates of both FPGA and ESP32 %!s(int64=2) %!d(string=hai) anos
bypass.rbf.gz 3847060a6e Merge esplink work with mainline %!s(int64=2) %!d(string=hai) anos
bypass.rpd.gz 3847060a6e Merge esplink work with mainline %!s(int64=2) %!d(string=hai) anos
bypass.sof 3847060a6e Merge esplink work with mainline %!s(int64=2) %!d(string=hai) anos
bypass.svf.gz 3847060a6e Merge esplink work with mainline %!s(int64=2) %!d(string=hai) anos
bypass.xsvf.gz 3847060a6e Merge esplink work with mainline %!s(int64=2) %!d(string=hai) anos
v1.fw 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v1.jic 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v1.pin aac953ed19 Implement FPGA <-> ESP32 communication path %!s(int64=2) %!d(string=hai) anos
v1.rbf.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v1.rpd.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v1.sof 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v1.svf.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v1.xsvf.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.fw 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.jic 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.pin aac953ed19 Implement FPGA <-> ESP32 communication path %!s(int64=2) %!d(string=hai) anos
v2.rbf.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.rpd.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.sof 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.svf.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos
v2.xsvf.gz 9ac4e30722 time: synchronize all clocks: RTC, SNTP, ESP, FPGA/ABC %!s(int64=2) %!d(string=hai) anos