romcopy.c 9.6 KB

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  1. #include "compiler.h"
  2. #include "fw.h"
  3. #include "console.h"
  4. #include "io.h"
  5. #include "spiflash.h"
  6. #include "ff.h"
  7. #include <stdio.h>
  8. #define SPIROM_DUAL_MODE 1
  9. void __hot romcopy_download(void *dst, size_t offset, size_t len)
  10. {
  11. unsigned int cmd;
  12. unsigned int flags = ROMCOPY_SPI_CMDLEN(5) | ROMCOPY_WRITE_RAM;
  13. if (!len)
  14. return;
  15. if (SPIROM_DUAL_MODE) {
  16. cmd = ROM_FAST_READ_DUAL;
  17. flags |= ROMCOPY_SPI_DUAL;
  18. } else {
  19. cmd = ROM_FAST_READ;
  20. }
  21. ROMCOPY_RAMADDR = (size_t)dst;
  22. ROMCOPY_ROMCMD = __rom_offset + offset + (cmd << 24);
  23. ROMCOPY_DATALEN = len | flags;
  24. }
  25. void __hot romcopy_bzero(void *dst, size_t len)
  26. {
  27. if (!len)
  28. return;
  29. ROMCOPY_RAMADDR = (size_t)dst;
  30. ROMCOPY_ROMCMD = 0;
  31. ROMCOPY_DATALEN = len | ROMCOPY_ZERO_BUFFER | ROMCOPY_WRITE_RAM;
  32. }
  33. /*
  34. * Read unique serial number programmed into ROM
  35. *
  36. */
  37. char __bss_hot rom_serial_str[16];
  38. qword_t __bss_hot rom_serial;
  39. static __must_inline void rom_read_serial(void)
  40. {
  41. ROMCOPY_ROMCMD = ROM_READ_UNIQUE_ID << 24;
  42. ROMCOPY_DATALEN = ROMCOPY_SPI_CMDLEN(5) | ROMCOPY_SPI_MORE;
  43. waitfor(ROMCOPY_IRQ);
  44. ROMCOPY_DATALEN = ROMCOPY_SPI_CMDLEN(4) | ROMCOPY_SPI_MORE;
  45. waitfor(ROMCOPY_IRQ);
  46. rom_serial.l[1] = ROMCOPY_INPUT;
  47. ROMCOPY_DATALEN = ROMCOPY_SPI_CMDLEN(4);
  48. waitfor(ROMCOPY_IRQ);
  49. rom_serial.l[0] = ROMCOPY_INPUT;
  50. }
  51. /*
  52. * Convert the ROM serial number to a hex string and poke it into the
  53. * USB descriptor "ROM". Used to use base36, but this has to be done
  54. * very early, and it has turned out that making it consistent with
  55. * what one can easily get out of a debugger is really useful.
  56. *
  57. * Doing this as early as possible means a much better chance to see
  58. * the proper serial number during USB enumeration, so doing it
  59. * immediately after SPI ROM conditioning is a great time.
  60. */
  61. static __must_inline void rom_mangle_serial(void)
  62. {
  63. volatile uint32_t *udp = &usbdesc_rom[2];
  64. for (int i = 7; i >= 0; i--) {
  65. unsigned int v = rom_serial.b[i];
  66. unsigned int c;
  67. c = (v >> 4)+'0';
  68. if (c > '9')
  69. c += 'A'-'9'-1;
  70. udp[0] = c;
  71. c = (v & 15)+'0';
  72. if (c > '9')
  73. c += 'A'-'9'-1;
  74. udp[2] = c;
  75. udp += 4;
  76. }
  77. }
  78. void rom_print_serial(void)
  79. {
  80. /* Print the ROM serial when we actually can */
  81. con_printf("ROM serial: %08X%08X (%08x-%08x)\n",
  82. rom_serial.l[1], rom_serial.l[0],
  83. rom_serial.l[1], rom_serial.l[0]);
  84. }
  85. static __must_inline void romcopy_config_flash(void)
  86. {
  87. /* Enable writing volatile status register bits */
  88. ROMCOPY_ROMCMD = ROM_VOLATILE_SR_WRITE_ENABLE << 24;
  89. ROMCOPY_DATALEN = ROMCOPY_SPI_CMDLEN(1);
  90. waitfor(ROMCOPY_IRQ);
  91. /* Write SR3 = 0; this sets the drive strength to maximum */
  92. ROMCOPY_ROMCMD = ROM_WRITE_SR3 << 24;
  93. ROMCOPY_DATALEN = ROMCOPY_SPI_CMDLEN(2);
  94. waitfor(ROMCOPY_IRQ);
  95. }
  96. IRQHANDLER(romcopy,0)
  97. {
  98. static __sbss unsigned int romcopy_state;
  99. size_t len;
  100. switch (romcopy_state++) {
  101. case 0:
  102. /* Condition flash ROM */
  103. romcopy_config_flash();
  104. /* Read serial number */
  105. rom_read_serial();
  106. /* Start copy DRAM data */
  107. len = __dram_init_end - __dram_init_start;
  108. romcopy_download(__dram_init_start, 0, len);
  109. /* Convert serial number and export to USB */
  110. rom_mangle_serial();
  111. break;
  112. case 1:
  113. /* Zero .dram.bss */
  114. len = __dram_bss_end - __dram_bss_start;
  115. romcopy_bzero(__dram_bss_start, len);
  116. break;
  117. default:
  118. mask_irq(ROMCOPY_IRQ);
  119. break;
  120. }
  121. }
  122. /*
  123. * SPI flash parameters and routines (for spiflash.c)
  124. */
  125. static const struct spiflash_ops max80_spiflash_ops;
  126. static const struct spiflash_param max80_spiflash_param;
  127. /*
  128. * SPI flash operations
  129. */
  130. static int max80_spi_write_buffer(const void *buf, unsigned int buflen,
  131. bool more)
  132. {
  133. const uint8_t *p = buf;
  134. uint32_t cmd = 0;
  135. unsigned int bytecmd = 0;
  136. unsigned int bitpos = 24;
  137. while (buflen) {
  138. cmd |= *p++ << bitpos;
  139. buflen--;
  140. bitpos -= 8;
  141. bytecmd += ROMCOPY_SPI_CMDLEN(1);
  142. if (!(buflen & 3)) {
  143. if (buflen || more)
  144. bytecmd |= ROMCOPY_SPI_MORE;
  145. waitfor(ROMCOPY_IRQ);
  146. ROMCOPY_ROMCMD = cmd;
  147. ROMCOPY_DATALEN = bytecmd;
  148. bytecmd = cmd = 0;
  149. bitpos = 24;
  150. }
  151. }
  152. return 0;
  153. }
  154. static int max80_spi_read_buffer(void *buf, unsigned int buflen, bool more)
  155. {
  156. uint8_t *p = buf;
  157. unsigned int bytecmd;
  158. uint32_t v;
  159. if (!buflen)
  160. return 0;
  161. waitfor(ROMCOPY_IRQ);
  162. ROMCOPY_ROMCMD = 0;
  163. while (buflen > 4) {
  164. ROMCOPY_DATALEN = ROMCOPY_SPI_CMDLEN(4) | ROMCOPY_SPI_MORE;
  165. waitfor(ROMCOPY_IRQ);
  166. v = ROMCOPY_INPUT;
  167. p[0] = v >> 24;
  168. p[1] = v >> 16;
  169. p[2] = v >> 8;
  170. p[3] = v;
  171. p += 4;
  172. buflen -= 4;
  173. }
  174. bytecmd = ROMCOPY_SPI_CMDLEN(buflen);
  175. if (more)
  176. bytecmd |= ROMCOPY_SPI_MORE;
  177. ROMCOPY_DATALEN = bytecmd;
  178. waitfor(ROMCOPY_IRQ);
  179. v = ROMCOPY_INPUT;
  180. while (buflen) {
  181. p[--buflen] = v;
  182. v >>= 8;
  183. }
  184. return 0;
  185. }
  186. static int max80_spi_write(void *cookie,
  187. const void *cmd, unsigned int cmd_len,
  188. const void *data, unsigned int data_len,
  189. int tshsl)
  190. {
  191. (void)cookie;
  192. (void)tshsl; /* Enforced in hardware */
  193. waitfor(ROMCOPY_IRQ);
  194. udelay(1);
  195. if (cmd_len)
  196. max80_spi_write_buffer(cmd, cmd_len, !!data_len);
  197. if (data_len)
  198. max80_spi_write_buffer(data, data_len, false);
  199. return 0;
  200. }
  201. static int max80_spi_read(void *cookie,
  202. const void *cmd, unsigned int cmd_len,
  203. void *data, unsigned int data_len,
  204. int tshsl)
  205. {
  206. (void)cookie;
  207. (void)tshsl; /* Enforced in hardware */
  208. waitfor(ROMCOPY_IRQ);
  209. udelay(1);
  210. if (cmd_len)
  211. max80_spi_write_buffer(cmd, cmd_len, !!data_len);
  212. if (data_len)
  213. max80_spi_read_buffer(data, data_len, false);
  214. return 0;
  215. }
  216. static const struct spiflash_ops max80_spiflash_ops = {
  217. .spi_write = max80_spi_write,
  218. .spi_read = max80_spi_read,
  219. .yield = NULL /* Nothing to yield to... */
  220. };
  221. /* Winbond W25Q128JV @ 3.3V */
  222. #define NS(x) (((x)*(unsigned long long)CPU_HZ + 999999999ULL)/1000000000ULL)
  223. #define US(x) (((x)*(unsigned long long)CPU_HZ + 999999ULL)/1000000ULL)
  224. #define MS(x) (((x)*(unsigned long long)CPU_HZ + 999ULL)/1000ULL)
  225. static const struct spiflash_param max80_spiflash_param = {
  226. /*
  227. * For W25Q128JV _DYNAMIC is equivalent to _24BIT, but specifying
  228. * it as dynamic would most of the time support larger parts
  229. * transparently.
  230. */
  231. .addr = SPIFLASH_ADDR_DYNAMIC,
  232. .tshsl = NS(3),
  233. .tshsl1 = NS(10),
  234. .tshsl2 = NS(50),
  235. .trst = NS(30000),
  236. .tw = MS(10), /* persistent; typ, max = 15 */
  237. .tpp = NS(400), /* typ, max = 3000 */
  238. .tse = MS(45), /* typ, max = 400 */
  239. .tbe1 = MS(120), /* typ, max = 1600 */
  240. .tbe2 = MS(150), /* typ, max = 2000 */
  241. .tce = MS(40000), /* typ, max = 200000 */
  242. };
  243. static void rom_spiflash_init(struct spiflash *flash)
  244. {
  245. static char target[] = "MAX80 v?";
  246. memset(flash, 0, sizeof *flash);
  247. target[sizeof target - 2] = SYS_BOARDFPGA + '0';
  248. flash->target = target;
  249. flash->param = &max80_spiflash_param;
  250. }
  251. /*
  252. * Flash an image into SPI flash, and reload the FPGA if successful,
  253. * returns on failure only.
  254. */
  255. void rom_flash_from_memory(void *buf, size_t buflen)
  256. {
  257. struct spiflash max80_flash;
  258. rom_spiflash_init(&max80_flash);
  259. if (spiflash_flash_file(&max80_flash, buf, buflen)) {
  260. con_puts("update: flash update data invalid\n");
  261. return;
  262. }
  263. /* Now do it for real */
  264. max80_flash.ops = &max80_spiflash_ops;
  265. if (spiflash_flash_file(&max80_flash, buf, buflen)) {
  266. con_puts("update: flash update failed\n");
  267. return;
  268. }
  269. con_puts("update: flash complete, restarting in 500 ms...\n");
  270. udelay(500000);
  271. reset(SYS_RESET_RECONFIG);
  272. }
  273. static int rom_sdcard_read_data(void *cookie, void *buf, unsigned int bufsize)
  274. {
  275. unsigned int bytesread;
  276. FRESULT fr = f_read(cookie, buf, bufsize, &bytesread);
  277. return fr == FR_OK ? bytesread : 0;
  278. }
  279. /*
  280. * Flash an image from an SD card, and reload the FPGA if successful
  281. */
  282. void rom_flash_from_sdcard(void)
  283. {
  284. struct spiflash max80_flash;
  285. char fw_orig_file_name[32];
  286. char fw_file_name[32];
  287. int l;
  288. FRESULT fr;
  289. FILINFO fno;
  290. FIL f;
  291. rom_spiflash_init(&max80_flash);
  292. max80_flash.read_data = rom_sdcard_read_data;
  293. max80_flash.cookie = &f;
  294. l = snprintf(fw_orig_file_name, sizeof fw_orig_file_name,
  295. "/max80/v%u.fw", SYS_BOARDFPGA);
  296. fr = f_stat(fw_orig_file_name, &fno);
  297. if (fr != FR_OK || (fno.fattrib & AM_DIR))
  298. return; /* No firmware file found */
  299. con_printf("update: firmware update file %s found\n", fw_orig_file_name);
  300. /* Rename the firmware file to avoid repeated updates */
  301. memcpy(fw_file_name, fw_orig_file_name, l);
  302. for (unsigned int i = 1; i < 100000; i++) {
  303. snprintf(fw_file_name+l, sizeof fw_file_name-l, ".%03u", i);
  304. fr = f_rename(fw_orig_file_name, fw_file_name);
  305. if (fr != FR_EXIST)
  306. break;
  307. }
  308. if (fr != FR_OK) {
  309. con_puts("update: unable to rename update file, skipping\n");
  310. return;
  311. }
  312. con_printf("update: renamed %s -> %s\n", fw_orig_file_name, fw_file_name);
  313. fr = f_open(&f, fw_file_name, FA_READ);
  314. if (fr != FR_OK) {
  315. con_puts("update: cannot open file, terminating\n");
  316. return;
  317. }
  318. if (spiflash_flash_file(&max80_flash, NULL, 0)) {
  319. con_puts("update: flash update data invalid\n");
  320. f_close(&f);
  321. return;
  322. }
  323. /* Now do it for real */
  324. f_rewind(&f);
  325. max80_flash.ops = &max80_spiflash_ops;
  326. if (spiflash_flash_file(&max80_flash, NULL, 0)) {
  327. con_puts("update: flash update failed\n");
  328. f_close(&f);
  329. return;
  330. }
  331. /* Close file and then umount the filesystem to force sync */
  332. f_close(&f);
  333. f_unmount("");
  334. con_puts("update: flash complete, restarting in 500 ms...\n");
  335. udelay(500000);
  336. reset(SYS_RESET_RECONFIG);
  337. }