| 1234567891011121314151617181920212223242526272829303132333435363738 | /* * Common firmware image format */#ifndef FWIMG_H#define FWIMG_H#include <inttypes.h>/* * Firmware chunk header. */#define FW_MAGIC		0x7a07fbd6struct fw_header {    uint32_t magic;		/* Magic number */    uint16_t type;		/* Content type */    uint16_t flags;		/* Content flags */    uint32_t len;		/* Content length (excluding header) */    uint32_t addr;		/* Address or similar */};enum fw_data_type {    FDT_END,			/* End of stream */    FDT_DATA,			/* FPGA firmware ata to be flashed */    FDT_TARGET,			/* Subsystem string (must match) */    FDT_NOTE,			/* Version: XXXXX or similar */    FDT_ESP_OTA,		/* ESP32 OTA image */    FDT_FPGA_INIT,		/* FPGA bitstream for update */    FDT_ESP_PART,		/* ESP32 partition table */    FDT_ESP_SYS,		/* ESP32 boot loader, OTA control, etc */    FDT_ESP_TOOL		/* esptool.py options for serial flashing */};enum fw_data_flags {    FDF_OPTIONAL     = 0x0001	/* Ignore if chunk data type unknown */};#endif /* FW_H */
 |