esplink.h 2.7 KB

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  1. /*
  2. * Common header file for ESP ("upstream") and FPGA ("downstream")
  3. * sides of link. This MUST contain only data structures!
  4. */
  5. #ifndef ESPLINK_H
  6. #define ESPLINK_H 1
  7. #include <stdlib.h>
  8. #include <stdbool.h>
  9. #include <inttypes.h>
  10. #define ESPLINK_HDR_ADDR ((const uint32_t *)0x40000000)
  11. /*
  12. * Ring buffer descriptor structure; this should be setup time only
  13. * and is statically cached on the upstream side.
  14. */
  15. struct esplink_ringbuf_desc {
  16. struct esplink_ringbuf {
  17. void *start;
  18. size_t size; /* Power of 2 */
  19. } dstr, ustr;
  20. };
  21. /*
  22. * Upstream and downstream pointer blocks, with the pointers encoded as
  23. * offsets into the buffer.
  24. *
  25. * Note that the head and tail pointers are reversed between the two
  26. * directions to allow one to be copied to the other.
  27. */
  28. struct esplink_ptrs_ustr {
  29. size_t head;
  30. size_t tail;
  31. };
  32. struct esplink_ptrs_dstr {
  33. size_t tail;
  34. size_t head;
  35. };
  36. struct esplink_timesync {
  37. struct esplink_timesync_buf {
  38. uint16_t update;
  39. uint16_t tick;
  40. union {
  41. struct {
  42. unsigned int sec2 : 5;
  43. unsigned int min : 6;
  44. unsigned int hour : 5;
  45. unsigned int mday : 5;
  46. unsigned int mon : 4;
  47. unsigned int year : 7;
  48. } tm;
  49. uint32_t td;
  50. };
  51. } get, set;
  52. };
  53. struct esplink_ota {
  54. const void *data;
  55. uint32_t len;
  56. };
  57. #define ESPLINK_HEAD_MAGIC 0x3648dec4
  58. #define MAX_SIGNATURE_LEN 64
  59. struct esplink_head {
  60. volatile uint32_t magic;
  61. uint32_t hlen;
  62. struct {
  63. union {
  64. uint32_t cfg;
  65. struct {
  66. uint8_t fixes;
  67. uint8_t minor;
  68. uint8_t major;
  69. uint8_t fpga;
  70. };
  71. };
  72. } board;
  73. volatile struct esplink_timesync *tsync;
  74. volatile struct esplink_ota *ota;
  75. struct esplink_ringbuf_head {
  76. uint32_t count;
  77. struct esplink_ringbuf_desc *desc;
  78. struct esplink_ptrs_dstr *dstr; /* Downstream (FPGA) side */
  79. struct esplink_ptrs_ustr *ustr; /* Upstream (ESP32) side */
  80. } rb;
  81. char signature[MAX_SIGNATURE_LEN]; /* Human-readable signature string */
  82. const void *board_info; /* board_info structure pointer */
  83. };
  84. #define EL_DIRQ_UNDERRUN 0 /* Local interrupt/status bit */
  85. #define EL_DIRQ_HELLO 1
  86. #define EL_DIRQ_RINGBUF 2
  87. #define EL_DIRQ_TIME 3
  88. #define EL_DIRQ_DONE 4 /* Some operation completed */
  89. #define EL_DIRQ_BOARDINFO 5 /* board_info structure updated */
  90. #define EL_UIRQ_WREN 0 /* Remote write enable bit, not IRQ */
  91. #define EL_UIRQ_READY 1
  92. #define EL_UIRQ_RINGBUF 2
  93. #define EL_UIRQ_TIME 3
  94. #define EL_UIRQ_OTA 4
  95. /*
  96. * Well known ring buffer indicies; must match for both sides.
  97. * Currently assuming one link in each direction; if only a unidirectional
  98. * link is needed, leave the descriptor for the unused direction blank.
  99. */
  100. enum esplink_ringbuf_user {
  101. EL_RB_CONFIG,
  102. EL_RB_COUNT
  103. };
  104. #endif /* ESPLINK_H */