system.c 4.9 KB

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  1. #include "common.h"
  2. #include "io.h"
  3. #include "sdcard.h"
  4. #include "abcio.h"
  5. #include "sys.h"
  6. #include "console.h"
  7. #include "esp.h"
  8. #include "config.h"
  9. #define DEBUG 0
  10. #define MINITESTS 1
  11. #define DELAY 0
  12. void __hot con_print_hex(unsigned int n)
  13. {
  14. for (int i = 0; i < 8; i++) {
  15. unsigned int c = n >> 28;
  16. n <<= 4;
  17. con_putc(c + ((c >= 10) ? 'a'-10 : '0'));
  18. }
  19. }
  20. volatile __sbss uint32_t timer_irq_count;
  21. IRQHANDLER(sysclock,0)
  22. {
  23. uint32_t count = timer_irq_count;
  24. count++;
  25. timer_irq_count = count;
  26. if ( MINITESTS ) {
  27. static const char spinner[4] = "/-\\|";
  28. if (!(count & (TIMER_HZ-1))) {
  29. uint32_t seconds = count >> TIMER_SHIFT;
  30. CON_DATA = spinner[seconds & 3];
  31. CON_DATA = '\b';
  32. }
  33. }
  34. }
  35. static void late_init(void);
  36. static void hello_sdram(void);
  37. #define TEST_DATA_0 0x01234567
  38. #define TEST_DATA_1 0x98badcfe
  39. static const volatile __dram_data
  40. uint32_t test_data[2] = { TEST_DATA_0, TEST_DATA_1 };
  41. uint32_t __sbss timer_irq_start;
  42. void __hot init(void)
  43. {
  44. static __string_hot const char hello[] =
  45. "\n\n*** Hello, World! ***\n"
  46. "MAX80 "
  47. #ifdef TEST
  48. "testing"
  49. #endif
  50. "firmware compiled on: ";
  51. timer_irq_start = rdtime();
  52. /* Start ROM copy engine, unmask timer and fatal exceptions */
  53. unmask_irqs((1U << ROMCOPY_IRQ)|(1U << EBREAK_IRQ)|
  54. (1U << BUSERR_IRQ)|(1U << SYSCLOCK_IRQ));
  55. con_puts(hello);
  56. con_puts(__datestamp);
  57. con_putc('\n');
  58. set_leds(7);
  59. wait_romcopy_done();
  60. if ( test_data[0] == TEST_DATA_0 && test_data[1] == TEST_DATA_1 ) {
  61. con_puts(hotstr("SDRAM seems ok - skipping test\n"));
  62. } else {
  63. volatile uint32_t *dp;
  64. uint32_t v;
  65. uint32_t wrerr;
  66. uint32_t not_zero, all_ones;
  67. uint32_t rx = 0x193ac604;
  68. v = wrerr = 0;
  69. all_ones = -1;
  70. not_zero = 0;
  71. for (dp = (volatile uint32_t *)__dram_init_start;
  72. dp < (volatile uint32_t *)__dram_init_end; dp++) {
  73. uint32_t v1, v2;
  74. v1 = *dp;
  75. v += v1;
  76. v2 = v1 ^ rx;
  77. *dp = v2;
  78. wrerr |= *dp ^ v2;
  79. *dp = v1;
  80. not_zero |= v1;
  81. all_ones &= v1;
  82. rx *= 0xf4d5725f;
  83. }
  84. con_puts(hotstr("SDRAM data checksum: "));
  85. con_print_hex(v);
  86. con_puts(hotstr(" expected "));
  87. con_print_hex(__dram_checksum);
  88. con_putc('\n');
  89. con_puts(hotstr("Bits always set, clear: "));
  90. con_print_hex(all_ones);
  91. con_putc(' ');
  92. con_print_hex(~not_zero);
  93. con_putc('\n');
  94. con_puts(hotstr("Test data: "));
  95. con_print_hex(test_data[0]);
  96. con_putc(' ');
  97. con_print_hex(test_data[1]);
  98. con_putc('\n');
  99. if (wrerr)
  100. con_puts(hotstr("SDRAM read/write error\n"));
  101. v = 0;
  102. for (dp = (volatile uint32_t *)__dram_bss_start;
  103. dp < (volatile uint32_t *)__dram_bss_end; dp++) {
  104. uint32_t x = *dp;
  105. v |= x;
  106. }
  107. if (v)
  108. con_puts(hotstr("SDRAM .bss is not zero!\n"));
  109. }
  110. if ( MINITESTS ) {
  111. uint32_t hello_dump[4];
  112. con_puts(hotstr("SDRAM jump test:"));
  113. memcpy(hello_dump, (void *)hello_sdram, sizeof hello_dump);
  114. for (int i = 0; i < 4; i++) {
  115. con_putc(' ');
  116. con_print_hex(hello_dump[i]);
  117. }
  118. con_puts(hotstr("\nJumping to SDRAM... "));
  119. hello_sdram();
  120. con_puts(hotstr("back in SRAM.\n"));
  121. }
  122. set_leds(6);
  123. con_flush();
  124. heap_init();
  125. set_leds(5);
  126. #if DELAY
  127. con_puts(hotstr("Waiting 5 s for testing..."));
  128. udelay(5000000);
  129. con_putc('\n');
  130. con_flush();
  131. #endif
  132. late_init();
  133. }
  134. static void __noinline hello_sdram(void)
  135. {
  136. con_puts("in SDRAM... ");
  137. }
  138. volatile uint32_t __dram_bss test_dram[8];
  139. static void __noinline late_init(void)
  140. {
  141. if (SYS_MAGIC != SYS_MAGIC_MAX80) {
  142. con_puts("Not a MAX80 board?!?!\n\n");
  143. _die();
  144. } else {
  145. con_printf("MAX80 ver %u.%u rework flags %02x fpga %u\n",
  146. SYS_BOARDMAJOR, SYS_BOARDMINOR,
  147. SYS_BOARDFIX, SYS_BOARDFPGA);
  148. if (SYS_BOARDMAJOR != SYS_BOARDFPGA) {
  149. con_puts("Invalid FPGA firmware for this board revision\n");
  150. _die();
  151. }
  152. }
  153. con_putc('\n');
  154. if ( MINITESTS ) {
  155. con_puts("Quick DRAM test:\n");
  156. for (int i = 0; i < 8; i++) {
  157. uint32_t v = (i*0x11111111) + 0x44332211;
  158. test_dram[i] = v;
  159. (void)test_dram[i]; /* Force immediate readback */
  160. con_printf("%08x ", v);
  161. }
  162. con_putc('\n');
  163. for (int i = 0; i < 8; i++) {
  164. con_printf("%08x ", test_dram[i]);
  165. }
  166. con_puts("\n\nRandom number generator test:\n");
  167. for (int i = 0; i < 8; i++)
  168. con_printf("%08x ", rdrand());
  169. con_puts("\n\n");
  170. }
  171. set_leds(4);
  172. esp_init(); /* Ready for communications */
  173. /* Let ESP know we are ready... */
  174. ESP_SPI_IRQ_SET = (1 << EL_DIRQ_HELLO);
  175. /* Wait for ESP to send us a configuration */
  176. while (!do_update_config) {
  177. mask_irq(ESP_IRQ);
  178. if (!do_update_config)
  179. waitfor(ESP_IRQ);
  180. unmask_irq(ESP_IRQ);
  181. }
  182. update_config();
  183. set_leds(3);
  184. abc_init_memmap();
  185. set_leds(2);
  186. read_rtc();
  187. rtc_abc_init();
  188. sdcard_reset();
  189. abcdisk_init();
  190. pun80_init();
  191. set_leds(1);
  192. abc_init();
  193. /* Release WAIT# if asserted */
  194. ABC_BUSCTL = 0;
  195. set_leds(0);
  196. }