Some reverse enginnering

roms/disasm_with_labels.asm

@@ -0,0 +1,3888 @@
+; z80dasm 1.1.3
+; command line: z80dasm -l -s rom_strings.sym -g 0x0000 -a metric_cpu-s_mc8_v1.2_2716.bin
+
+;##############################################################################
+;                        METRIC 8 COMPUTER SYSTEM
+;                    MONITOR/DEBUGGER REFERENCE MANUAL
+;##############################################################################
+;
+; SYSTEM OVERVIEW:
+; The Metric 8 is a sophisticated Z80-based computer system (circa 1980) with
+; an advanced monitor/debugger ROM providing comprehensive development tools.
+;
+; HARDWARE SPECIFICATIONS:
+; • CPU: Z80 running at 3.93216MHz (sophisticated timing), crystal at 19.6608MHz
+; • ROM: 2 pcs of 2716 EPROM (2KB) containing monitor/debugger
+; • RAM: 1KB base workspace + 64KB paged external memory
+; • I/O: Z80 DMA controller, NEC µPD765A FDC, sophisticated peripherals
+; • Memory Management: Advanced paging system with 8KB windows
+;
+; MONITOR COMMANDS:
+; The monitor provides a '>' prompt and accepts single-letter commands
+; followed by hexadecimal parameters. All addresses are 4-digit hex.
+;
+; MEMORY EXAMINATION COMMANDS:
+; • M XXXX        - Memory examine/modify starting at address XXXX
+;                   Shows: ADDR: YY (where YY is current byte value)
+;                   Enter new hex value or press Enter to skip
+;                   Press 'Q' to quit back to monitor
+;
+; • D XXXX        - Memory dump (hex display) starting at address XXXX
+;                   Format: XXXX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX *................*
+;                   Shows 32 bytes total (2 lines of 16 bytes each)
+;                   Non-printable characters shown as '.' in ASCII area
+;
+; • C XXXX YYYY ZZZZ - Memory compare command
+;                   Compares memory block [XXXX..YYYY] with block starting at ZZZZ
+;                   Displays differences in format showing both addresses and values
+;                   Only shows mismatched bytes, silent if blocks are identical
+;
+; MEMORY MODIFICATION COMMANDS:
+; • F XXXX YYYY ZZ - Memory fill command
+;                   Fills memory from XXXX to YYYY with byte value ZZ
+;                   Uses efficient Z80 LDIR instruction for fast block operations
+;
+; DEBUGGING/BREAKPOINT COMMANDS:
+; • B XXXX        - Set breakpoint or execution counter
+;                   Sets debugging parameters for program execution control
+;                   Counter stored at memory location 0x011D0
+;
+; • G XXXX        - Go/Execute program starting from address XXXX
+;                   Transfers control to user program at specified address
+;                   Restores all CPU registers and begins execution
+;                   Supports breakpoint detection and interrupt handling
+;                   Returns to monitor if breakpoint hit or program exits 
+;
+; • I XXXX        - Configure debug display parameters and modes
+;                   Sets debugging display parameters stored at 0x11D6
+;                   Used for display width, format, or visualization options
+;                   Special case: "II" jumps to specialized display handler
+;
+; • J XXXX        - Jump/Execute program (alternate Go command)
+;                   Similar functionality to G command - executes program
+;                   Parses hex address and transfers control to user program
+;                   Supports same breakpoint and register restoration features
+;
+; • L             - Load/Transfer data operations
+;                   Data loading and transfer command for memory operations
+;                   Supports loading data between memory locations
+;                   May include external storage access capabilities
+;
+; SYSTEM DISPLAY COMMANDS:
+; • R             - Register display - Show CPU register contents
+;                   Displays all Z80 registers and system status
+;                   Shows AF, BC, DE, HL, IX, IY, SP, PC values
+;
+; ADDITIONAL COMMANDS:
+; • Debug parameters can be configured via additional commands
+; • Monitor supports commands: B,C,D,E,F,G,H,I,J,L,M,N,O,P,R,S,T,W,X
+; • Use single letters followed by hex parameters as needed
+;   Values stored at 0x011D6 for various debugging modes
+;
+; SYSTEM MESSAGES:
+; • "BREAK AT XXXX" - Displayed when execution breaks at address XXXX
+;                     System returns to monitor prompt after breakpoints
+;
+; TECHNICAL FEATURES:
+; • Sophisticated hex string parser supporting multi-parameter input
+; • Intelligent input processing with space skipping and case conversion
+; • Dual-purpose code/data sections for memory efficiency
+; • Register state preservation and restoration
+; • Interrupt mode 2 support with vector table
+; • Advanced memory paging with 64KB external memory card
+; • Professional error handling with graceful returns to command prompt
+;
+; CONTROL CHARACTERS:
+; The monitor responds to standard terminal control characters for user control:
+;
+; • Ctrl+C (0x03 ETX) - Emergency System Reset/Break
+;                      Immediately aborts current operation and returns to monitor
+;                      Resets stack pointer and provides clean restart
+;                      Similar to "break" functionality in modern terminals
+;                      Works during any input operation or command execution
+;
+; • Ctrl+S (0x13 XOFF) - Pause/Resume Output Flow Control
+;                       Temporarily pauses output display (standard XOFF)
+;                       Press any key to resume output (XON behavior)
+;                       Useful for stopping scrolling during long displays
+;                       Standard terminal flow control implementation
+;
+; • Backspace (0x08) - Character Deletion During Input
+;                     Deletes previous character from input buffer
+;                     Echoes backspace-space-backspace sequence to terminal
+;                     Provides visual feedback of character removal
+;                     Standard line editing functionality
+;
+; • DEL (0x7F) - Alternative Character Deletion
+;               Functions identically to Backspace (0x08)
+;               Supports both common delete key encodings
+;               Maintains compatibility with different terminal types
+;
+; These control characters provide immediate user control over system operation
+; and implement standard terminal behavior expected in professional systems.
+;
+; MEMORY MAP:
+; • 0x0000-0x0FFF: ROM code space (4KB 2716 EPROM)
+; • 0x1000-0x13FF: Base RAM workspace (1KB)
+; • 0x1100: Keypress detection buffer (SIO interrupt stores received characters here)
+; • 0x1101-0x1102: Character timing measurement storage (16-bit, for baud rate detection)
+; • 0x1104: Console input buffer start
+; • 0x1168: Input processing buffer (temporary storage)
+; • 0x1169: Command input buffer (keyboard input processing)
+; • 0x11F2: Console output buffer pointer
+; • 0x11D0: Execution counter/breakpoint parameter
+; • 0x11D6: Debug mode parameter
+; • 0x1300-0x1320: Interrupt vector table (IM2 mode)
+; • 0x1400: Stack pointer start (grows downward)
+; • 0x2000-0x3FFF: Paged RAM window (8KB, bank-switched)
+;
+; SYSTEM CONFIGURATION MEMORY LOCATIONS:
+; Hardware Configuration Block (0x1200-0x1227):
+; • 0x1200: 16-bit DMA/buffer address pointer for disk operations
+; • 0x1202: Current drive number (0-3) for multi-drive operations
+; • 0x1203: Drive status/ready flags (0x01 = drive ready bit set)
+; • 0x1205: 16-bit status counter A (initialized to 0xFFFF = ready state)
+; • 0x1207: 16-bit status counter B (initialized to 0xFFFF = ready state)  
+; • 0x1209: Sector size parameter (0x24 = 36 decimal bytes per sector)
+; • 0x120A: I/O port configuration byte (0xF0 = upper nibble port settings)
+; • 0x120B: Drive count/operation mode (0x03 = 3 drives or operational mode 3)
+; • 0x120C: Additional FDC configuration and status data
+;
+; FDC Command Parameter Block (0x1213-0x1215):
+; • 0x1213: NEC µPD765A command byte (0x03 = READ DATA command)
+; • 0x1214: Drive/Head selection and DMA control (combined from 0x120B + 0x120A)
+; • 0x1215: Track/Sector/Size parameters (combined from 0x1209 + 0x1204)
+;
+; FDC Drive Control Block (0x1225-0x1227):
+; • 0x1225: Drive parameter/selector register
+; • 0x1226: Drive control flags and status
+; • 0x1227: Drive enable/operation status (1=enabled, 0=disabled)
+;
+; Buffer Management Block (0x1244-0x1248):
+; • 0x1244: 16-bit buffer pointer (low bank) - cleared to 0x0000 at startup
+; • 0x1246: 16-bit buffer pointer (mid bank) - cleared to 0x0000 at startup  
+; • 0x1248: 16-bit buffer pointer (high bank) - cleared to 0x0000 at startup
+;
+; FDC Operation Status Block (0x124A-0x124B):
+; • 0x124A: FDC operation completion status flag (0=pending, non-zero=completed)
+; • 0x124B: Additional FDC status and control parameters
+;
+; Hardware Interface Configuration:
+; • 0x1242: SIO serial port configuration pointer (points to table at 0x0507)
+; • 0x1243: Serial port base address configuration byte (used by I/O routines)
+;
+; Monitor/Debugger Variables:
+; • 0x011CF: Saved byte backup (breakpoint restoration storage)
+; • 0x011D0: Breakpoint/execution counter for debugging
+; • 0x011D1: Active breakpoint memory location (current breakpoint address)
+; • 0x011D3: Original byte backup (saved from breakpoint location for restoration)
+; • 0x011D4: Debug parameters and execution status storage
+; • 0x011D6: Debug display parameters and mode settings
+; • 0x011D7: Interrupt vector high byte for IM2 mode
+; • 0x011D8: Complete register save area (AF,BC,DE,HL,IX,IY,SP) for user program execution
+; • 0x011EA: Program execution start address (G/J commands)
+; • 0x011EC: User stack pointer backup storage
+; • 0x011EE: Saved debug parameters (temporary storage during execution)
+; • 0x011F0: Current breakpoint address
+; • 0x011F2: Console input/output buffer pointer (0x1104 default)
+; • 0x011F4: Input buffer current position pointer
+; • 0x011F6: Current prompt character (0x2A='*', 0x3E='>', 0x20=' ')
+;
+; Memory Paging System Variables:
+; • 0x1326: Breakpoint address backup (for memory paging operations)
+;
+; This monitor/debugger represents advanced 1980s software engineering with
+; modular design, efficient algorithms, and professional user interface.
+;
+;##############################################################################
+
+;Memory architecture:
+;• 0x0000-0x0FFF: ROM code space (4KB 2716 EPROM)
+;• 0x1000-0x13FF: Base RAM workspace (1KB)
+;• 0x1242 SIO port config 0x0507
+;• 0x1300-0x1320: Interrupt vector table (IM2 mode) from 0x024f
+;• 0x1400: Stack pointer start (grows downward toward RAM)
+;• 0x2000-0x3FFF: Paged RAM window (8KB, bank-switched)
+;• Extended RAM: 8x 4164 chips = 8 pages × 8KB = 64KB total
+;• Page switching: Hardware register selects active 8KB bank
+;• Effective memory: 1KB base + 8KB paged window + ROM
+
+;==============================================================================
+; MEMORY PAGING SYSTEM DOCUMENTATION  
+;==============================================================================
+; The Metric 8 system implements a sophisticated memory paging mechanism to
+; access a 64KB external memory card through an 8KB window at 0x2000-0x3FFF.
+;
+; CLEVER PORT SHARING STRATEGY:
+; The system exploits the fact that ROM code only uses CTC Channels 1 and 2,
+; leaving Channels 0 and 3 unused. Memory paging "hijacks" these unused ports
+; without conflicting with essential CTC timing functions.
+;
+; PORT ALLOCATION STRATEGY:
+; • PORT 0x000 (CTC Channel 0): UNUSED by ROM → Available for memory control
+; • PORT 0x001 (CTC Channel 1): Used by ROM for timing functions
+; • PORT 0x002 (CTC Channel 2): Used by ROM for SIO baud rate generation  
+; • PORT 0x003 (CTC Channel 3): UNUSED by ROM → Available for page selection
+;
+; MEMORY ARCHITECTURE:
+; • Base System RAM: 1KB at 0x1000-0x13FF (always accessible)
+; • Paged Memory Window: 8KB at 0x2000-0x3FFF (bank-switched via ports 0x000/0x003)
+; • External Memory Card: 64KB organized as 8 pages × 8KB each
+; • Total Addressable Memory: 1KB + 64KB = 65KB (plus ROM)
+;
+; CONTROL PORTS:
+; • PORT 0x000: Memory Management Control Register (hijacks unused CTC Channel 0)
+;   - Bit 5 (0x20): Enable paging system
+
+;   - Controls overall memory management subsystem
+;
+; • PORT 0x003: Page Selection Register (hijacks unused CTC Channel 3)
+;   - 3-bit page number (0-7) selects which 8KB page appears at 0x2000-0x3FFF
+
+;   - Sequential writes may configure additional memory features
+;
+; COEXISTENCE WITH STANDARD HARDWARE:
+; This design allows memory paging to work with standard SIO/CTC configuration:
+; • SIO: ports 0x04-0x07 (unchanged)
+; • CTC Channels 1&2: ports 0x01-0x02 (unchanged, ROM functions preserved)
+; • Memory Management: ports 0x000 & 0x003 (reuse of unused CTC channels)
+; • Result: 64KB memory card works with standard I/O configuration!
+;
+; OBSERVED PORT OPERATIONS:
+; 1. out (000h),20h  ; Enable memory management (bit 5 = paging enable)
+; 2. out (003h),87h  ; Select page 7 with setup flags (page + control bits)
+; 3. out (003h),01h  ; Select page 1 for actual operation
+; 4. out (003h),03h  ; Select page 3 (restore/cleanup page)
+
+;==============================================================================
+
+I/O subsystem:
+• SIO 8440 chip for serial console (Pin 15 TxDA, Pin 17 RxDA) port 05-07
+• MC1488/MC1489 RS-232 drivers (require ±12V)
+• CTC for baud rate generation and timing port 00-04
+• Z80 DMA controller for high-speed floppy transfers - port 0xF3
+• FDC NEC µPD765A for 8-inch floppy drives (77 tracks, 26 sectors/track):
+  - 0xF0: FDC Main Status Register (read)
+  - 0xF1: FDC Data Register (read/write via register C)
+  - 0xF4: FDC Data Register (direct access)
+  - 0xF6: FDC Command/Status Register
+  - 0xFC: Additional FDC control
+• I/O ports accessed via register C
+	org	00000h
+
+l0000h:
+	jr l000eh        ;0000   ; Boot entry: jump to initialization routine
+	jp l00fdh        ;0002   ; Main system routine (post-init)
+	jp l0dabh        ;0005   ; Error/exception handler or alternate entry
+	jp l0294h        ;0008   ; Memory test or hardware check
+	jp l0de0h        ;000b   ; Interrupt/Z80 DMA handler or alternate
+l000eh:
+	ld sp,01400h        ;000e   ; Set stack pointer to top of 1K SRAM (boot RAM)
+	ld hl,01000h        ;0011   ; HL points to start of SRAM
+	ld de,01001h        ;0014   ; DE points to next byte in SRAM
+	ld bc,003ffh        ;0017   ; BC = 1023 bytes (1K - 1)
+	ld (hl),000h        ;001a   ; Zero first byte of SRAM
+	ldir                ;001c   ; Zero entire 1K SRAM (boot RAM clear)
+	ld a,013h           ;001e   ; Load interrupt vector base (IM2 table address)
+l0020h:
+	ld i,a              ;0020   ; Set Z80 interrupt vector register (IM2 base)
+	im 2                ;0022   ; Set interrupt mode 2 (for SIO, Z80 DMA, FDC)
+	call hw_init_01ach      ;0024   ; Call hardware init (Z80 DMA, SIO, FDC setup)
+	ld hl,l0507h        ;0027   ; HL = pointer to boot string or table
+l002ah:
+	jr nz,l002fh		;002a Fail hw test if it find some form of other thing then sio on port 04 06
+l002ch:
+	ld hl,0c3c1h		;002c This should be an alternate SIO card
+l002fh:
+	ld (01242h),hl      ;002f   ; Save HL (alternate pointer) at 01242h for later use
+	ld a,l              ;0032   ; Load low byte of HL into A (may be used for error handling)
+	ld hl,linterruptvector_table        ;0033   ; Set HL to interrupt vector table address
+	jr l003bh           ;0036   ; Continue with boot sequence (alternate path)
+	jp l07bch           ;0038   ; Jump to CP/M loader or main OS entry if needed
+l003bh:
+	ld de,01300h        ;003b   ; DE = destination  Interruptvector addres
+	ld bc,l0020h        ;003e   ; BC = length to copy (from l0020h)
+	ldir                ;0041   ; Block copy: transfer BC bytes from HL to DE
+	ld hl,setupsio_table        ;0043   ; HL = pointer to primary SIO configuration table
+	cp 007h             ;0046   ; Compare A to 7 (hardware detection/boot status)
+	jr z,l004dh         ;0048   ; If A == 7, use primary SIO card (normal case)
+	ld hl,00214h        ;004a   ; If not, use secondary SIO card at high port addresses (0xC0+)
+l004dh:
+	call setup_peripherals_01a1h        ;004d   ; Initialize peripherals (SIO)
+	push hl             ;0050   ; Save HL (pointer or error address)
+	ld hl,01100h        ;0051   ; HL = system buffer or stack
+	sub a               ;0054   ; Clear A (set to zero)
+	ld (hl),a           ;0055   ; Zero system buffer
+	ei			;0056 Enable interrupts ; ROM code space
+l0057h:
+	or (hl)			;0057 OR accumulator A with memory contents at address HL ; ROM code space,wait for keypress
+	jr z,l0057h		;0058 Jump relative if Z to 0x0057 ; ROM code space
+	di			;005a
+	call sub_0149h		;005b
+	ld a,030h		;005e //WR= error reset
+	out (c),a		;0060
+	jr l0069h		;0062
+	rst 38h			;0064
+	rst 38h			;0065
+	jp l07b3h		;0066 ; Jump to interrupt/error handler - displays "BREAK AT " message
+l0069h:
+	call sub_015dh		;0069 ; Call automatic baud rate detection and SIO configuration
+	ld a,(01242h)		;006c
+	cp 007h		;006f
+	ld c,002h		;0071 ; Set C to 0x02 (standard CTC port)
+	jr z,l0077h		;0073
+	ld c,0c4h		;0075 ; Set C to 0xC4 (alternate CTC port)
+l0077h:
+;==============================================================================
+; ADAPTIVE CTC CHANNEL INITIALIZATION (0x0079)
+;==============================================================================
+; Purpose: Configure CTC channel with automatic port selection and dual-phase setup
+; Entry: sub_0079h - Called during hardware initialization sequence
+;
+; Input Registers:
+; - A: 0x47 (CTC control word for initial configuration)
+; - B: 0x02 (time constant value)
+; - C: CTC port address (0x02 for standard, 0xC4 for alternate hardware)
+;
+; CTC Control Word 0x47 Breakdown:
+; - Bit 7: 0 = Interrupt enable
+; - Bit 6: 1 = Counter mode (not timer mode)  
+; - Bit 5: 0 = Prescaler ÷16
+; - Bit 4: 0 = Positive edge trigger
+; - Bit 3: 1 = Time constant follows command
+; - Bit 2: 1 = Software reset active
+; - Bits 1-0: 11 = Control word identifier
+;
+; Two-Phase Operation:
+; PHASE 1 (0x0079-0x007D): Send control word and time constant
+; PHASE 2 (0x0087-0x008D): Send final control word (0x47) and divisor (0x02)
+;
+; Port Selection Logic:
+; - Compares value from 0x1242 with 0x07 (SIO Channel B Control port)
+; - If 0x1242 = 0x07: Uses standard mapping, C = 0x02 (CTC Channel 2)
+; - If 0x1242 ≠ 0x07: Uses alternate mapping, C = 0xC4 (alternate CTC port)
+;
+; Hardware Compatibility:
+; - Standard: SIO at 0x04-0x07, CTC at 0x00-0x03, configures CTC Channel 2
+; - Alternate: Different SIO ports, CTC at 0xC0-0xC7, configures alternate CTC
+;
+; Time Constant 0x02:
+; - Divides input clock by 2
+; - Used for SIO clock generation (baud rate timing)
+; - Combined with ÷16 prescaler = total division of 32
+;
+; Integration: Part of larger peripheral initialization sequence
+; Called after SIO detection and before final hardware setup
+;==============================================================================
+	ld a,047h		;0077
+sub_0079h:
+	out (c),a		;0079 Send CTC control word (0x47) to selected port
+	out (c),b		;007b Send time constant (0x02) to CTC channel  
+	ld a,c			;007d Copy port address to A for comparison
+	cp 0xc4              ;007f Compare with 0xC4 (alternate hardware marker)
+	jr z,0x0085          ;0080 If alternate hardware, jump to port adjustment
+	dec c                ;0082 Standard hardware: decrement to previous channel
+	jr 0x0087            ;0083 Continue to phase 2 initialization
+
+; Alternate hardware port adjustment
+	inc c			;0085 Increment port (0xC4 → 0xC5)
+	inc c			;0086 Increment port (0xC5 → 0xC6)
+
+; Phase 2: Final CTC configuration  
+l0087h:
+	ld a,047h		;0087 Reload CTC control word
+	out (c),a		;0089 Send control word to final port
+	ld a,002h		;008b Load final time constant/divisor
+	out (c),a		;008d Send final configuration to CTC
+
+;==============================================================================
+; PHASE 3: COMPLETE HARDWARE INITIALIZATION AND SIO TESTING (0x008F+)
+;==============================================================================
+; After CTC setup, complete remaining peripheral initialization and test SIO
+;==============================================================================
+
+; Continue table-driven peripheral initialization
+	pop hl			;008f Restore HL from stack (pointer to init table)
+	inc hl			;0090 Advance to next table entry
+	call setup_peripherals_01a1h		;0091 Continue table-driven peripheral setup
+
+; Load test parameters and call diagnostic routine  
+	ld bc,058c0h		;0094 Load test parameters: B=0x58 (count), C=0xC0 (port/data)
+	call sub_0f0ah		;0097 Call diagnostic/test routine with parameters
+
+; SIO port preparation and buffer clearing
+	call sub_0149h		;009a Get SIO port configuration (loads C with SIO control port)
+	dec c			;009d Convert to SIO data port (control port - 1)
+	in a,(c)		;009e Read SIO data port (clear any pending RX data)
+	in a,(c)		;00a0 Read SIO data port again (ensure buffer clear)
+	in a,(c)		;00a2 Third read to fully flush RX buffer
+
+; Test SIO transmission capability
+	call sub_0121h		;00a4 Send test character via SIO (verify TX works)
+
+; Second SIO buffer clearing after transmission test
+	dec c			;00a7 Set C back to SIO data port 
+	in a,(c)		;00a8 Read SIO data port (clear any echo/response data)
+	in a,(c)		;00aa Read SIO data port again (ensure clean state)
+	in a,(c)		;00ac Third read to fully flush post-transmission buffer
+
+; Hardware initialization complete - enable interrupts and continue
+	ei			;00ae Enable interrupts (hardware now fully operational)
+
+; Print startup message after successful hardware initialization
+	ld hl,l00e5h		;00af Load pointer to "Self diagnostics ..." message
+	call l00fdh		;00b2 Print the startup message via serial port
+
+; Run comprehensive system diagnostics
+	call sub_0e89h		;00b5 Execute full system diagnostic suite
+
+;==============================================================================
+; SYSTEM CONFIGURATION MEMORY INITIALIZATION (0x00B8-0x00DF)
+;==============================================================================
+; Purpose: Initialize critical system configuration variables after diagnostics
+; This section sets up default values for system operation parameters
+;==============================================================================
+	ld a,001h			;00b8 Load configuration value 0x01
+	ld (01203h),a		;00ba Store at 0x1203: Drive/status flags (bit 0 = drive ready)
+	ld a,024h			;00bd Load configuration value 0x24 (36 decimal)
+	ld (01209h),a		;00bf Store at 0x1209: Sector size parameter (36 bytes/sector?)
+	ld a,0f0h			;00c2 Load configuration value 0xF0 (240 decimal)
+	ld (0120ah),a		;00c4 Store at 0x120A: Port/channel configuration byte
+	ld a,003h			;00c7 Load configuration value 0x03
+	ld (0120bh),a		;00c9 Store at 0x120B: Drive count or operation mode
+	ld hl,l0000h		;00cc Load 16-bit value 0x0000
+	ld (01244h),hl		;00cf Store at 0x1244: Clear 16-bit buffer/pointer (low)
+	ld (01246h),hl		;00d2 Store at 0x1246: Clear 16-bit buffer/pointer (mid)
+	ld (01248h),hl		;00d5 Store at 0x1248: Clear 16-bit buffer/pointer (high)
+	dec hl				;00d8 Decrement HL to 0xFFFF
+	ld (01205h),hl		;00d9 Store at 0x1205: Initialize 16-bit counter/status (0xFFFF)
+	ld (01207h),hl		;00dc Store at 0x1207: Initialize 16-bit counter/status (0xFFFF)
+	call sub_0acbh		;00df Call additional hardware setup routine
+	jp l0294h			;00e2 Jump to main system initialization
+
+;==============================================================================
+; STARTUP MESSAGE: "Self diagnostics ..."
+;==============================================================================
+; Displayed after successful hardware initialization to indicate system status
+;==============================================================================
+l00e5h:
+	defb "Self diagnostics ..."	;00e5-00f8 Startup message text
+	defb 0xda			;00f9 Special character (Ú or box drawing)
+	defb 0x0d			;00fa Carriage return
+	defb 0x0a			;00fb Line feed  
+	defb 0x00			;00fc Null terminator
+
+;==============================================================================
+; STRING OUTPUT ROUTINES - Console Display Functions
+;==============================================================================
+; Two different string output routines for different output methods
+;==============================================================================
+
+;==============================================================================
+; PRINT STRING ROUTINE (0x00FD) - Standard Console Output
+;==============================================================================
+; Purpose: Print null-terminated string to console via standard output
+; Input: HL = pointer to null-terminated string
+; Output: String displayed on console via sub_0127h (console output with wait)
+; Operation: Loops through string characters until null terminator found
+; Used by: Main system messages, prompts, and user interface text
+;==============================================================================
+l00fdh:					; Standard Print String Routine
+	ld a,(hl)			;00fd Load character from string
+	and a				;00fe Test for null terminator (sets Z flag if A=0)
+	ret z				;00ff Return if end of string reached
+	ld c,a				;0100 Move character to C register for output
+	call sub_0127h		;0101 Call console output with wait (transmitter ready check)
+	inc hl				;0104 Point to next character in string
+	jr l00fdh			;0105 Loop back for next character
+
+;==============================================================================
+; ALTERNATE PRINT STRING ROUTINE (0x0107) - Direct Serial Output  
+;==============================================================================
+; Purpose: Print null-terminated string via direct serial output method
+; Input: HL = pointer to null-terminated string  
+; Output: String sent via sub_0111h (direct serial output)
+; Operation: Similar to standard routine but uses different output method
+; Used by: Low-level system messages or when console output unavailable
+;==============================================================================
+l0107h:					; Alternate Print String Routine
+	ld a,(hl)			;0107 Load character from string
+	and a				;0108 Test for null terminator (sets Z flag if A=0)
+	ret z				;0109 Return if end of string reached
+	ld c,a				;010a Move character to C register for output
+	call sub_0111h		;010b Call direct serial output routine
+	inc hl				;010e Point to next character in string
+	jr l0107h			;010f Loop back for next character
+
+;==============================================================================
+; DIRECT SERIAL OUTPUT ROUTINE (0x0111)
+;==============================================================================
+; Purpose: Output character directly to serial port without full handshaking
+; Input: C = character to output
+; Operation: Calls sub_0121h then jumps to l012ah for immediate transmission
+;==============================================================================
+sub_0111h:				; Direct Serial Output
+	call sub_0121h		;0111 Set up serial port configuration  
+	jr l012ah			;0114 Jump to immediate output routine
+
+;==============================================================================
+; SERIAL INPUT WITH WAIT (0x0116)
+;==============================================================================
+; Purpose: Wait for and read character from serial input
+; Output: C = received character
+; Operation: Loops until character available, then returns it
+;==============================================================================
+l0116h:					; Serial Input with Wait
+	call sub_011ch		;0116 Check for input character available
+	jr z,l0116h			;0119 Loop if no character available (Z flag set)
+	ret					;011b Return with character in C register
+
+;==============================================================================
+; CHECK SERIAL INPUT READY (0x011C)
+;==============================================================================
+; Purpose: Check if serial input character is available (non-blocking)
+; Output: Z flag = set if no character, clear if character available
+;         C = character (if available)
+; Operation: Tests serial port status and reads character if present
+;==============================================================================
+sub_011ch:				; Check Serial Input Ready
+	call sub_0121h		;011c Set up serial port configuration
+	jr l013dh			;011f Jump to input status check routine
+
+;==============================================================================
+; SERIAL PORT SETUP ROUTINE (0x0121)
+;==============================================================================
+; Purpose: Set up serial port configuration for I/O operations
+; Input: C = character to be output (preserved in B register)
+; Output: C = serial port address from configuration byte at 0x1243
+; Operation: Saves character, loads port address, prepares for I/O
+;==============================================================================
+sub_0121h:				; Serial Port Setup
+	ld b,c			;0121 Save character/input parameter in B register
+	ld a,(01243h)		;0122 Load serial port base address from config byte
+l0125h:
+	ld c,a			;0125 Move port address to C register
+	ret			;0126 Return with port address in C, character in B
+;ROUTINE: Console Output with Wait (0x0127)
+;--------------------------------------------
+;Purpose: Outputs character and waits for transmitter ready
+
+sub_0127h:
+	call sub_0149h		;0127 Get serial port base address
+l012ah:
+	in a,(c)		;012a Read status register
+	bit 2,a			;012c Test transmitter ready bit
+	jr z,l012ah		;012e Wait if not ready
+	dec c			;0130 Point to data register
+	out (c),b		;0131 Output character
+	ret				;0133  Return to caller
+l0134h:
+	call sub_013ah		;0134 Check for input character available
+	jr z,l0134h		;0137 Loop if no character available (Z flag set)
+	ret			;0139 Return with character received
+
+;==============================================================================
+; CHECK SERIAL INPUT READY (0x013A) - Non-blocking Input Status Check
+;==============================================================================
+; Purpose: Check if serial input character is available without blocking
+; Output: Z flag = set if no character, clear if character available
+;         C = character data (if available), A = character (7-bit masked)
+; Operation: Tests serial port RX status bit, reads and processes character
+;==============================================================================
+sub_013ah:				; Check Serial Input Ready (Non-blocking)
+	call sub_0149h		;013a Get serial port base address in C register
+l013dh:					; Input status check entry point
+	in a,(c)		;013d Read status register from serial port
+	bit 0,a		;013f Test bit 0 (receiver ready/character available)
+	ret z			;0141 Return with Z flag set if no character available
+	dec c			;0142 Decrement C to point to data register (status+1=data)
+	in a,(c)		;0143 Read character from serial port data register
+	and 07fh		;0145 Mask to 7 bits (remove parity/high bit)
+sub_0147h:				; Character processing entry point  
+	ld c,a			;0147 Store character in C register for caller
+	ret			;0148 Return with character in both A and C registers
+
+;==============================================================================
+; GET SERIAL PORT BASE ADDRESS (0x0149) - Port Configuration Setup
+;==============================================================================
+; Purpose: Load serial port base address from configuration and set up registers
+; Input: C = current value (preserved in B)
+; Output: C = serial port base address, B = saved previous C value
+; Operation: Loads port address from config pointer at 0x1242
+;==============================================================================
+sub_0149h:				; Get Serial Port Base Address
+	ld b,c			;0149 Save current C register value in B
+	ld a,(01242h)		;014a Load serial port configuration from memory
+	ld c,a			;014d Set C to serial port base address
+	ret			;014e Return with port address in C, old value in B
+
+;==============================================================================
+; ECHO/BRIDGE MODE (0x014F) - Bidirectional Serial Bridge
+;==============================================================================
+; Purpose: Implement echo or serial bridge functionality between ports
+; Operation: Infinite loop that transfers data bidirectionally
+; Used for: Terminal echo, serial port bridging, or communication testing
+;==============================================================================
+l014fh:					; Echo/Bridge Mode Entry Point
+	call sub_013ah		;014f Check for input character from serial port
+	call nz,sub_0111h	;0152 If character received, output it (echo/bridge)
+	call sub_011ch		;0155 Check for input from alternate source
+	call nz,sub_0127h	;0158 If character received, output via console
+	jr l014fh		;015b Loop continuously (infinite bridge mode)
+
+;==============================================================================
+; AUTOMATIC BAUD RATE CALCULATOR AND SIO CONFIGURATOR (0x015D)
+;==============================================================================
+; Purpose: Dynamically calculate and configure SIO baud rate based on timing measurements
+; Entry: sub_015dh - Called after serial character timing measurements
+;
+; Input Values:
+; - 0x1100: 8-bit timing measurement (character bit timing)
+; - 0x1101-0x1102: 16-bit timing measurement (character/timeout count)
+;
+; Algorithm:
+; 1. SCALING PHASE:
+;    - Loads 16-bit timing value from 0x1101-0x1102 into HL
+;    - Multiplies HL by 8 (three left shifts) to scale timing value
+;    - Loads 8-bit measurement from 0x1100 into A
+;
+; 2. MAGNITUDE DETECTION:
+;    - Performs arithmetic right shifts on A while incrementing HL
+;    - Counts significant bits to determine timing magnitude
+;    - Stops when carry flag set (found first '1' bit)
+;    - Result: BC = scaled timing value for table lookup
+;
+; 3. TABLE LOOKUP:
+;    - Searches baud rate table at l0183h (contains standard timing values)
+;    - Each table entry: 16-bit timing threshold + 8-bit SIO divisor value
+;    - Finds best matching standard baud rate for measured timing
+;    - Uses binary search approach with carry flag comparison
+;
+; 4. SIO CONFIGURATION:
+;    - Returns A = 0x44 (SIO WR4 register value: 1 stop bit, 16x clock)
+;    - Returns B = clock divisor value from table
+;
+; Table Format (l0183h):
+; Each 3-byte entry: [Low_Threshold] [High_Threshold] [SIO_Divisor]
+; - Thresholds define timing ranges for standard baud rates
+; - SIO_Divisor used in WR4 register for clock generation
+;
+; Auto-Detection Process:
+; - System measures actual bit timing from incoming serial data
+; - This routine converts measurements to appropriate SIO clock settings
+; - Enables automatic baud rate detection without manual configuration
+;
+; Applications:
+; - Auto-configure terminal connections
+; - Adapt to different computer baud rates automatically  
+; - Robust serial communication without preset requirements
+;
+; Returns: A = 0x44 (WR4 value), B = clock divisor, timing configured
+; Notes: Sophisticated floating-point-like integer math for 1980s hardware
+;==============================================================================
+sub_015dh:				; Automatic Baud Rate Calculator Entry Point
+	ld hl,(01101h)		;015d Load 16-bit timing measurement from memory
+	ld a,(01100h)		;0160 Load 8-bit character timing measurement
+	add hl,hl		;0163 Multiply HL by 8 (scale timing value)
+	add hl,hl		;0164 Left shift 1: HL = HL * 2
+	add hl,hl		;0165 Left shift 2: HL = HL * 4, total = original * 8
+l0166h:					; Magnitude detection loop
+	sra a			;0166 Arithmetic right shift A (find first significant bit)
+	inc hl			;0168 Increment HL counter for each bit shift
+	jr nc,l0166h		;0169 Continue until carry set (found first '1' bit)
+	ld c,l			;016b Store low byte of scaled timing in C
+	ld b,h			;016c Store high byte of scaled timing in B (BC = timing)
+	ld hl,l0183h		;016d Point to baud rate lookup table start
+	sub a			;0170 Clear A register (will count table entries)
+l0171h:					; Table search loop
+	inc a			;0171 Increment table entry counter
+	ld e,(hl)		;0172 Load low byte of timing threshold from table
+	inc hl			;0173 Move to next byte in table
+	ld d,(hl)		;0174 Load high byte of timing threshold (DE = threshold)
+	inc hl			;0175 Move to next table entry
+	ex de,hl		;0176 Exchange: HL = threshold, DE = table pointer
+	and a			;0177 Clear carry flag for subtraction
+	sbc hl,bc		;0178 Compare threshold with measured timing (HL - BC)
+	ex de,hl		;017a Restore: HL = table pointer, DE = difference
+	inc hl			;017b Move to divisor byte in current table entry
+	jr c,l0171h		;017c If threshold < timing, try next table entry
+	dec hl			;017e Back up to divisor byte of matching entry
+	ld b,(hl)		;017f Load SIO clock divisor value into B register
+	ld a,044h		;0180 Load SIO WR4 register value (1 stop bit, 16x clock)
+	ret			;0182 Return with A = WR4 value, B = clock divisor
+
+;==============================================================================
+; BAUD RATE DETECTION TABLE (0x0183-0x01A0)
+;==============================================================================
+; Format: Each 3-byte entry contains [Low_Limit] [High_Limit] [SIO_Divisor]
+; Used by automatic baud rate detection routine at sub_015dh
+; Entries ordered from fastest to slowest baud rates for binary search
+;==============================================================================
+l0183h:
+; Entry 1: High speed range
+	defb 0x10, 0x01, 0x2C    ;0183-0185 ; Limits: 0x0110-0x012C, Divisor: 0x2C (44)
+
+; Entry 2: 
+	defb 0x5C, 0x00, 0x04    ;0186-0188 ; Limits: 0x005C-0x0004, Divisor: 0x04 (4)
+
+; Entry 3:
+	defb 0xBC, 0x00, 0x08    ;0189-018B ; Limits: 0x00BC-0x0008, Divisor: 0x08 (8)
+
+; Entry 4:
+	defb 0x7C, 0x01, 0x10    ;018C-018E ; Limits: 0x017C-0x0110, Divisor: 0x10 (16)
+
+; Entry 5:
+	defb 0xFC, 0x02, 0x20    ;018F-0191 ; Limits: 0x02FC-0x0220, Divisor: 0x20 (32)
+
+; Entry 6:
+	defb 0x05, 0x40, 0x70    ;0192-0194 ; Limits: 0x4005-0x7040, Divisor: 0x70 (112)
+
+; Entry 7:
+	defb 0x09, 0x80, 0x70    ;0195-0197 ; Limits: 0x8009-0x7080, Divisor: 0x70 (112)
+
+; Entry 8:
+	defb 0x0C, 0xA0, 0xFF    ;0198-019A ; Limits: 0xA00C-0xFFA0, Divisor: 0xFF (255)
+
+; Entry 9: Low speed range  
+	defb 0xFF, 0xFF, 0x00    ;019B-019D ; Limits: 0xFFFF-0x00FF, Divisor: 0x00 (0)
+
+; Table terminator
+	defb 0xFF, 0xFF          ;019E-019F ; End marker
+	defb 0x00                ;01A0      ; Padding/terminator
+
+setup_peripherals_01a1h:
+	ld a,(hl)           ;01a1   ; Load count from table (A = number of bytes to output)
+	and a               ;01a2   ; Test if count is zero
+	ret z               ;01a3   ; If zero, end of table, return
+	ld b,a              ;01a4   ; Set B = count
+	inc hl              ;01a5   ; Move to next table entry
+	ld c,(hl)           ;01a6   ; Load port number from table
+	inc hl              ;01a7   ; Move to data bytes
+	otir                ;01a8   ; Output B bytes from (HL) to port C, increment HL each time
+	jr setup_peripherals_01a1h        ;01aa   ; Repeat for next table entry
+hw_init_01ach:			;Probably check if there is a perifle  that can be read and write to which is not a SIO
+	ld hl,initsio_l01d9h        ;01ac   ; HL = pointer to hardware register or test value
+	call setup_peripherals_01a1h      ;01af   ; Call additional hardware init routine
+	ld c,004h           ;01b2   ; Set port C = 0x04 (SIO A data port)
+	ld a,055h           ;01b4   ; Load test pattern 0x55
+	call check_peri_01d2h      ;01b6   ; Output 0x55 to port 0x04 (SIO A data port)
+	ret nz              ;01b9   ; If error, return
+	ld a,0aah           ;01ba   ; Load test pattern 0xAA
+	call check_peri_01d2h      ;01bc   ; Output 0xAA to port 0x04 (SIO A data port)
+	ret nz              ;01bf   ; If error, return
+	ld a,055h           ;01c0   ; Load test pattern 0x55
+	ld c,006h           ;01c2   ; Set port C = 0x06 (SIO B data port)
+	call check_peri_01d2h      ;01c4   ; Output 0x55 to port 0x06
+	and 00fh            ;01c7   ; Mask lower nibble (hardware check)
+	ret nz              ;01c9   ; If error, return
+	ld a,0aah           ;01ca   ; Load test pattern 0xAA
+	call check_peri_01d2h      ;01cc   ; Output 0xAA to port 0x06 (SIO B data port)
+	and 00fh            ;01cf   ; Mask lower nibble (hardware check)
+	ret                 ;01d1   ; Return (hardware init complete)
+check_peri_01d2h:
+	out (c),a        ;01d2   ; Output value in A to port C
+	ld b,a           ;01d4   ; Save value in B
+	in a,(c)         ;01d5   ; Read value back from port C into A
+	xor b            ;01d7   ; Compare read value with what was written
+	ret               ;01d8   ; Return 
+initsio_l01d9h:
+	; PRIMARY SIO CARD initialization table (ports 0x04-0x07)
+	; This is the first/preferred SIO card on the bus
+	defb 0x02 ;01d9   ; Count: 2 bytes to output
+	defb 0x05 ;01da   ; Port: 0x05 (Primary SIO Channel A Control)
+	defb 0xCF ;01db   ; Data byte 1: WR 7, SEND ABORT (SDLC), RESET Tx UNDERRUN/EOM LATCH
+	defb 0x00 ;01dc   ; Data byte 2: SYNC BIT 8-15 = 0
+	defb 0x02 ;01dd   ; Count: 2 bytes to output
+	defb 0x07 ;01de   ; Port: 0x07 (Primary SIO Channel B Control)
+	defb 0xCF ;01df   ; Data byte 1: WR 7, SEND ABORT (SDLC), RESET Tx UNDERRUN/EOM LATCH
+	defb 0xF0 ;01e0   ; Data byte 2: Reset channel B sync bit 12-15
+	defb 0x00 ;01e1   ; END marker
+setupsio_table:
+l01e2h:
+	; CTC setup for SIO timing
+	defb 0x02 ;01e2   ; 2 bytes to output
+	defb 0x02 ;01e3   ; CTC Channel 2 (provides clock for SIO)
+	defb 0x47 ;01e4   ; CTC Control: Software reset, Time constant follows, Prescaler=16, Counter mode
+	defb 0x01 ;01e5   ; Time constant = 1 (fast clock for SIO)
+
+	; PRIMARY SIO CHANNEL B (Console/Terminal) - Complete WR Configuration
+	defb 0x11 ;01e6   ; 17 bytes to configure Channel B
+	defb 0x07 ;01e7   ; Port 0x07 (Primary SIO Channel B Control)
+	
+	; WR0 Commands and Register Selection
+	defb 0x58 ;01e8   ; WR0: 01011000b = Channel Reset + Reset Rx CRC Checker
+	defb 0x02 ;01e9   ; WR0: 00000010b = Select WR2 for next write
+	defb 0x00 ;01ea   ; WR2: Interrupt vector = 0x00 (disable interrupts)
+	defb 0x04 ;01eb   ; WR0: 00000100b = Select WR4 for next write
+	defb 0x10 ;01ec   ; WR4: 00010000b = 16x clock, No parity, 1 stop bit, No sync
+	defb 0x15 ;01ed   ; WR0: 00010101b = Select WR5 + Send Abort (SDLC mode prep)
+	defb 0x84 ;01ee   ; WR5: 10000100b = DTR active, 8 bits/char, Tx disabled initially, No RTS yet
+	defb 0x03 ;01ef   ; WR0: 00000011b = Select WR3 + Reset External Status interrupts
+	defb 0xd2 ;01f0   ; WR3: 11010010b = Rx 8 bits, Enter Hunt Phase, Sync Char Load Inhibit, Rx disabled initially
+	defb 0x06 ;01f1   ; WR0: 00000110b = Select WR6 for next write
+	defb 0xff ;01f2   ; WR6: Sync Character bits 0-7 = 0xFF (sync pattern low byte)
+	defb 0x07 ;01f3   ; WR0: 00000111b = Select WR7 for next write  
+	defb 0x0f ;01f4   ; WR7: Sync Character bits 8-15 = 0x0F (sync pattern high byte)
+	defb 0x11 ;01f5   ; WR0: 00010001b = Select WR1 + Reset External Status interrupts
+	defb 0x0c ;01f6   ; WR1: 00001100b = Status affects vector, Rx INT on first char or special condition
+	defb 0x23 ;01f7   ; WR0: 00100011b = Select WR3 + Enable INT on next Rx char
+	defb 0xd3 ;01f8   ; WR3: 11010011b = Rx Enable, 8 bits, Enter Hunt Phase, Sync Char Load Inhibit
+	defb 0x00 ;01f9   ; END marker
+l01fa:
+	; PRIMARY SIO CHANNEL B (Console) - Simplified Setup for Normal Operation
+	defb 0x0c ;01fa   ; 12 bytes to configure Channel B for basic async operation
+	defb 0x07 ;01fb   ; Port 0x07 (Primary SIO Channel B Control)
+	defb 0x18 ;01fc   ; WR0: 00011000b = Channel Reset (clear all state)
+	defb 0x02 ;01fd   ; WR0: 00000010b = Select WR2 for next write
+	defb 0x00 ;01fe   ; WR2: Interrupt vector = 0x00 (no interrupts)
+	defb 0x18 ;01ff   ; WR0: 00011000b = Channel Reset (ensure clean state)
+	defb 0x01 ;0200   ; WR0: 00000001b = Select WR1 for next write
+	defb 0x04 ;0201   ; WR1: 00000100b = Status affects interrupt vector
+	defb 0x04 ;0202   ; WR0: 00000100b = Select WR4 for next write
+	defb 0x44 ;0203   ; WR4: 01000100b = 16x clock, 1 stop bit, No parity, 8 bits
+	defb 0x03 ;0204   ; WR0: 00000011b = Select WR3 + Reset External Status
+	defb 0xc1 ;0205   ; WR3: 11000001b = Rx Enable, 8 bits/char, No auto enables
+	defb 0x05 ;0206   ; WR0: 00000101b = Select WR5
+	defb 0xea ;0207   ; WR5: 11101010b = RTS, DTR, Tx Enable, 8 bits/char, Break
+
+	; PRIMARY SIO CHANNEL A (Auxiliary/Data) - Basic Setup
+	defb 0x09 ;0208   ; 9 bytes to configure Channel A  
+	defb 0x05 ;0209   ; Port 0x05 (Primary SIO Channel A Control)
+	defb 0x18 ;020a   ; WR0: 00011000b = Channel Reset
+	defb 0x01 ;020b   ; WR0: 00000001b = Select WR1 for next write
+	defb 0x00 ;020c   ; WR1: 00000000b = No interrupts, no status affects vector
+	defb 0x04 ;020d   ; WR0: 00000100b = Select WR4 for next write
+	defb 0x44 ;020e   ; WR4: 01000100b = 16x clock, 1 stop bit, No parity, 8 bits
+	defb 0x03 ;020f   ; WR0: 00000011b = Select WR3 + Reset External Status
+	defb 0xc1 ;0210   ; WR3: 11000001b = Rx Enable, 8 bits/char
+	defb 0x05 ;0211   ; WR0: 00000101b = Select WR5
+	defb 0xea ;0212   ; WR5: 11101010b = RTS, DTR, Tx Enable, 8 bits/char, Break
+	defb 0x00 ;0213   ; END marker 
+
+l0214h:
+	; SECONDARY SIO CARD initialization table (ports 0xC0-0xC4)
+	; This is an alternate SIO card on the bus, used if primary SIO fails
+	defb 0x02 ;0214   ; 2 bytes to output
+	defb 0x02 ;0215   ; CTC channel (shared timing for secondary SIO)
+	defb 0x47 ;0216   ; CTC Control: SW reset, Time constant follows, Prescaler=16, Counter mode
+	defb 0x04 ;0217   ; Time constant = 4 (different timing from primary)
+	defb 0x02 ;0218   ; 2 bytes to output
+	defb 0xc4 ;0219   ; Port 0xC4 (Secondary SIO Channel A Control - high address mapping)
+	defb 0x47 ;021a   ; Command: 01000111b = Select WR4 + Software reset + Time constant
+	defb 0x01 ;021b   ; Parameter value
+
+	; SECONDARY SIO CHANNEL B (Console backup) - Initial Setup  
+	defb 0x05 ;021c   ; 5 bytes to output
+	defb 0xc3 ;021d   ; Port 0xC3 (Secondary SIO Channel B Control - high address mapping)
+	defb 0x58 ;021e   ; WR0: 01011000b = Channel Reset + Reset Rx CRC Checker
+	defb 0x02 ;021f   ; WR0: 00000010b = Select WR2 for next write
+	defb 0x10 ;0220   ; WR2: Interrupt vector = 0x10 (different from primary)
+	defb 0x01 ;0221   ; WR0: 00000001b = Select WR1 for next write
+	defb 0x04 ;0222   ; WR1: 00000100b = Status affects interrupt vector
+
+	; SECONDARY SIO CHANNEL A (Data backup) - Complete Configuration
+	defb 0x0f ;0223   ; 15 bytes to output (extensive SIO configuration)
+	defb 0xc1 ;0224   ; Port 0xC1 (Secondary SIO Channel A Control - high address mapping)
+	defb 0x58 ;0225   ; WR0: 01011000b = Channel Reset + Reset Rx CRC Checker
+	defb 0x04 ;0226   ; WR0: 00000100b = Select WR4 for next write
+	defb 0x10 ;0227   ; WR4: 00010000b = 16x clock, No parity, 1 stop bit
+	defb 0x15 ;0228   ; WR0: 00010101b = Select WR5 + Send Abort (SDLC prep)
+	defb 0x84 ;0229   ; WR5: 10000100b = DTR active, 8 bits/char, Tx disabled initially
+	defb 0x03 ;022a   ; WR0: 00000011b = Select WR3 + Reset External Status
+	defb 0xd2 ;022b   ; WR3: 11010010b = Rx 8 bits, Enter Hunt Phase, Sync Char Load Inhibit
+	defb 0x06 ;022c   ; WR0: 00000110b = Select WR6 for next write
+	defb 0xFF ;022d   ; WR6: Sync Character bits 0-7 = 0xFF
+	defb 0x07 ;022e   ; WR0: 00000111b = Select WR7 for next write
+	defb 0x0f ;022f   ; WR7: Sync Character bits 8-15 = 0x0F  
+	defb 0x11 ;0230   ; WR0: 00010001b = Select WR1 + Reset External Status
+	defb 0x0c ;0231   ; WR1: 00001100b = Status affects vector, Rx INT on first char
+	defb 0x23 ;0232   ; WR0: 00100011b = Select WR3 + Enable INT on next Rx char
+	defb 0xd3 ;0233   ; WR3: 11010011b = Rx Enable, 8 bits, Enter Hunt Phase
+	defb 0x00 ;0234   ; END marker
+l0235h:
+	; SECONDARY SIO - Final Configuration for Normal Operation
+	; Simplified setup for basic async operation on backup SIO card
+	defb 0x0c ;0235   ; 12 bytes to output
+	defb 0xc3 ;0236   ; Port 0xC3 (Secondary SIO Channel B Control)
+	defb 0x18 ;0237   ; WR0: 00011000b = Channel Reset (clear all state)
+	defb 0x02 ;0238   ; WR0: 00000010b = Select WR2 for next write
+	defb 0x10 ;0239   ; WR2: Interrupt vector = 0x10 (secondary interrupt vector)
+	defb 0x18 ;023a   ; WR0: 00011000b = Channel Reset (ensure clean state)
+	defb 0x01 ;023b   ; WR0: 00000001b = Select WR1 for next write
+	defb 0x04 ;023c   ; WR1: 00000100b = Status affects interrupt vector
+	defb 0x04 ;023d   ; WR0: 00000100b = Select WR4 for next write
+	defb 0x44 ;023e   ; WR4: 01000100b = 16x clock, 1 stop bit, No parity, 8 bits
+	defb 0x03 ;023f   ; WR0: 00000011b = Select WR3 + Reset External Status
+	defb 0xc1 ;0240   ; WR3: 11000001b = Rx Enable, 8 bits/char, No auto enables
+	defb 0x05 ;0241   ; WR0: 00000101b = Select WR5
+	defb 0xea ;0242   ; WR5: 11101010b = RTS, DTR, Tx Enable, 8 bits/char, Break
+
+	; SECONDARY SIO CHANNEL A - Basic Setup
+	defb 0x09 ;0243   ; 9 bytes to output  
+	defb 0xc1 ;0244   ; Port 0xC1 (Secondary SIO Channel A Control)
+	defb 0x18 ;0245   ; WR0: 00011000b = Channel Reset
+	defb 0x01 ;0246   ; WR0: 00000001b = Select WR1 for next write
+	defb 0x00 ;0247   ; WR1: 00000000b = No interrupts, no status affects vector
+	defb 0x04 ;0248   ; WR0: 00000100b = Select WR4 for next write
+	defb 0x44 ;0249   ; WR4: 01000100b = 16x clock, 1 stop bit, No parity, 8 bits
+	defb 0x03 ;024a   ; WR0: 00000011b = Select WR3 + Reset External Status
+	defb 0xc1 ;024b   ; WR3: 11000001b = Rx Enable, 8 bits/char
+	defb 0x05 ;024c   ; WR0: 00000101b = Select WR5
+	defb 0xea ;024d   ; WR5: 11101010b = RTS, DTR, Tx Enable, 8 bits/char, Break
+	defb 0x00 ;024e   ; END marker
+
+;==============================================================================
+; INTERRUPT VECTOR TABLE FOR SIO OPERATIONS
+;==============================================================================
+; These vectors are loaded into RAM at 0x1300+ for interrupt mode 2 operation
+; Provides specific handlers for different SIO interrupt conditions
+;==============================================================================
+	defb 0x91 ;024f   ; Interrupt vector base (0x1300)
+	defb 0x02 ;0250   ; Interrupt  linterupt2vector 0x1301
+	defb 0x92 ;0251   ; Interrupt vector 0x1302
+	defb 0x02 ;0252   ; Interrupt  linterupt2vector 0x1303
+	defb 0x6f ;0253   ; Interrupt vector 0x1304
+	defb 0x02 ;0254   ; Interrupt  linterupt1vector 0x1305
+	defb 0x91 ;0255   ; Interrupt vector 0x1306
+	defb 0x02 ;0256   ; Interrupt  linterupt2vector 0x1307
+	defb 0x91 ;0257   ; Interrupt vector 0x1308
+	defb 0x02 ;0258   ; Interrupt  linterupt2vector 0x1309
+	defb 0x91 ;0259   ; Interrupt vector 0x130a
+	defb 0x02 ;025a   ; Interrupt  linterupt2vector 0x130b
+	defb 0x91 ;025b   ; Interrupt vector 0x130c
+	defb 0x02 ;025c   ; Interrupt  linterupt2vector 0x130d
+	defb 0x91 ;025d   ; Interrupt vector 0x130e
+	defb 0x02 ;025e   ; Interrupt  linterupt2vector 0x130f
+	defb 0x91 ;025f   ; Interrupt vector 0x1310
+	defb 0x02 ;0260   ; Interrupt  linterupt2vector 0x1311
+	defb 0x91 ;0261   ; Interrupt vector 0x1312
+	defb 0x02 ;0262   ; Interrupt  linterupt2vector 0x1313
+	defb 0x91 ;0263   ; Interrupt vector 0x1314
+	defb 0x02 ;0264   ; Interrupt  linterupt2vector 0x1315
+	defb 0x91 ;0265   ; Interrupt vector 0x1316
+	defb 0x02 ;0266   ; Interrupt  linterupt2vector 0x1317
+	defb 0x91 ;0267   ; Interrupt vector 0x1318
+	defb 0x02 ;0268   ; Interrupt  linterupt2vector 0x1319
+	defb 0x91 ;0269   ; Interrupt vector 0x1320
+	defb 0x02 ;026A   ; Interrupt  linterupt2vector 0x1321
+	defb 0x6f ;026B   ; Interrupt vector 0x1322
+	defb 0x02 ;026C   ; Interrupt  linterupt1vector 0x1323
+	defb 0x91 ;026D   ; Interrupt vector 0x1324
+	defb 0x02 ;026E   ; Interrupt  linterupt2vector 0x1325
+linterupt1:
+	push af           ;026f  ; Save accumulator and flags
+	push bc           ;0270  ; Save BC register pair
+	call sub_0149h    ;0271  ; Setup: loads serial port address into C (from 0x1242), C=command/status port 
+	push hl           ;0274  ; Save HL register pair
+	ld hl,l0000h      ;0275  ; HL = 0 (used as a counter for timeout/retries)
+	l0278h:
+	dec c             ;0278  ; C = C - 1 (now C=data port)
+	in a,(c)          ;0279  ; Read data register from port C
+	or a              ;027b  ; Set flags based on A (is data nonzero?)
+	jr nz,l0288h      ;027c  ; If data != 0, jump to l0288h (data ready)
+	inc hl            ;027e  ; HL = HL + 1 (increment timeout/retry counter)
+	inc c             ;027f  ; C = C + 1 (restore C to command/status port,)
+	l0280h:
+	in a,(c)          ;0280  ; Read command/status register from port C, 
+	bit 0,a           ;0282  ; Test bit 0 (is data available/ready) Rx CHARACTER AVAILABLE
+	jr nz,l0278h      ;0284  ; If bit 0 set, go back to data port read
+	jr l0280h         ;0286  ; Otherwise, keep polling command/status port
+	l0288h:
+	ld (01100h),a     ;0288  ; Store received byte in 0x1100
+	ld (01101h),hl    ;028b  ; Store HL (timeout/retry count) in 0x1101/0x1102
+	pop hl            ;028e  ; Restore HL (was used as counter)
+	pop bc            ;028f  ; Restore BC
+	pop af            ;0290  ; Restore AF
+	linterupt2:
+	ei                ;0291  ; Enable interrupts
+	reti              ;0292  ; Return from interrupt
+
+; --------------------------------------------------
+; 0x0294: System Initialization Block
+; - Sets stack pointer to 0x1400
+; - Loads interrupt vector (A=0x13), sets I register
+; - Sets interrupt mode 2 and enables interrupts
+; - Calls sub_0770h to save CPU context and further setup
+; --------------------------------------------------
+l0294h:
+	ld sp,01400h		;0294
+	ld a,013h		;0297
+	ld i,a		;0299
+	im 2		;029b
+	ei			;029d
+	call sub_0770h		;029e
+; --------------------------------------------------
+; After 0x029e: Continued System/Memory Initialization
+; - Sets HL to 01100h, stores at 011ech
+; - Sets HL to l0000h, stores at 011f0h
+; - Sets HL to l0fech, calls l00fdh (setup/copy routine)
+; - Sets HL to 01104h, stores at 011f2h
+; - Loads A with 0x2A, stores at 011f6h
+; - Calls sub_080dh (setup/test routine)
+; - Branches: if NZ, jumps to l02c9h; else, jumps to l0fbbh
+; Purpose: Finalizes pointers, memory, and hardware setup, then tests/branches on result
+; --------------------------------------------------
+	ld hl,01100h		;02a1
+	ld (011ech),hl		;02a4
+	ld hl,l0000h		;02a7
+	ld (011f0h),hl		;02aa
+	ld hl,l0fech		;02ad Load HL with address of version string ("Ver 1.2x 8 inch")
+	call l00fdh		;02b0 Print version string to console via standard output routine
+	ld hl,01104h		;02b3 Set HL to console buffer address (0x1104)
+	ld (011f2h),hl		;02b6 Store console buffer pointer at 0x011F2
+	ld a,02ah		;02b9
+	ld (011f6h),a		;02bb
+	call sub_080dh		;02be
+	jr nz,l02c9h		;02c1
+	jp l0fbbh		;02c3
+l02c6h:
+	call sub_080dh		;02c6 Get user input from console
+l02c9h:
+	call sub_02e4h		;02c9 Execute parsed command (dual-purpose code)
+
+; =============================================================================
+; MAIN MONITOR COMMAND LOOP - Heart of the Debug System
+; =============================================================================
+; Purpose: Main command prompt and processing loop for the monitor/debugger
+; Operation: Sets up input buffer, displays '>' prompt, processes commands
+; Flow: All monitor commands (dump, compare, breakpoint, etc.) return here
+; This is the central control point of the entire monitor system
+; =============================================================================
+l02cch:					; Main Monitor Command Loop Entry Point
+	ld hl,01104h		;02cc Point to console input buffer start
+	ld (011f2h),hl		;02cf Store input buffer pointer for system use
+	ld a,03eh		;02d2 Load '>' character (0x3E = ASCII prompt)
+	ld (011f6h),a		;02d4 Store prompt character for display
+	jr l02c6h		;02d7 Jump to input processing (creates command loop)
+l02d9h:
+	ld sp,01400h		;02d9
+	ld hl,l0323h		;02dc
+	call l00fdh		;02df
+	jr l02cch		;02e2
+
+;==============================================================================
+; DUAL-PURPOSE CODE/DATA TABLE (0x02E4-0x0322)
+;==============================================================================
+; This section serves as BOTH executable code AND data table!
+; 
+; AS EXECUTABLE CODE (when called from 0x02C9):
+; - 0x02E4: CD 4C 06    call sub_064ch
+; - 0x02E7: 13          inc de  
+; - 0x02E8: 42          ld b,d
+; - 0x02E9: E2 03 43    jp po,4303h
+; - etc.
+;
+; AS DATA TABLE (when accessed as bytes):
+; Contains ASCII character sequence B,C,D,E,F,G,H,I,J,K,L,M,N,O,P,Q,R,S,T,W,X
+; This appears to be a character encoding or command lookup table
+;
+; This technique was common in 1980s ROMs to save precious memory space
+; by making code serve dual purposes as both instructions and data
+;==============================================================================
+sub_02e4h:  ; Entry point when called as subroutine
+	call sub_064ch		;02e4 CD 4C 06
+	inc de			;02e7 13
+	ld b,d			;02e8 42 (ASCII 'B')
+	jp po,04303h		;02e9 E2 03 43 (0x43 = ASCII 'C')
+	inc hl			;02ec 23
+	inc bc			;02ed 03
+	ld b,h			;02ee 44 (ASCII 'D')
+	ld e,b			;02ef 58
+	inc bc			;02f0 03
+	ld b,l			;02f1 45 (ASCII 'E')
+	dec d			;02f2 15
+	dec b			;02f3 05
+	ld b,(hl)		;02f4 46 (ASCII 'F')
+	or a			;02f5 B7
+	inc bc			;02f6 03
+	ld b,a			;02f7 47 (ASCII 'G')
+	ld c,d			;02f8 4A (ASCII 'J')
+	inc b			;02f9 04
+	ld c,b			;02fa 48 (ASCII 'H')
+	add a,a			;02fb 87
+	ex af,af'		;02fc 08
+	ld c,c			;02fd 49 (ASCII 'I')
+	rst 8			;02fe CF
+	inc bc			;02ff 03
+	ld c,d			;0300 4A (ASCII 'J')
+	ld b,c			;0301 41
+	inc b			;0302 04
+	ld c,h			;0303 4C (ASCII 'L')
+	sbc a,a			;0304 9F
+	ex af,af'		;0305 08
+	ld c,l			;0306 4D (ASCII 'M')
+	call p,04e04h		;0307 FC 04 4E
+	sbc a,a			;030a 9F
+	inc b			;030b 04
+	ld c,a			;030c 4F (ASCII 'O')
+	cp h			;030d BC
+	add hl,bc		;030e 09
+	ld d,b			;030f 50 (ASCII 'P')
+	ld l,a			;0310 6F
+	ex af,af'		;0311 08
+	ld d,d			;0312 52 (ASCII 'R')
+	rst 38h			;0313 FF
+	add hl,bc		;0314 09
+	ld d,e			;0315 53 (ASCII 'S')
+	ccf			;0316 3F
+	ld b,054h		;0317 06 54 (0x54 = ASCII 'T')
+	ld c,a			;0319 4F
+	ld bc,0fa57h		;031a 01 57 FA (0x57 = ASCII 'W')
+	add hl,bc		;031d 09
+	ld e,b			;031e 58 (ASCII 'X')
+	rrca			;031f 0F
+	inc b			;0320 04
+	ccf			;0321 3F (ASCII '?')
+	nop			;0322 00 (NULL terminator)
+
+; =============================================================================
+; MEMORY COMPARE COMMAND (C command) - Monitor/Debugger Function
+; =============================================================================
+; Purpose: Compare two memory regions and display any differences
+; Input: User enters hex addresses via console (C start1 end1 start2)
+; Example: "C 1000 10FF 2000" compares memory 1000-10FF with 2000-20FF
+; Operation: Compares memory at [start1..end1] with memory starting at start2
+; Output: Shows mismatched bytes with both addresses and different values
+; Silent operation if regions are identical (no output = blocks match)
+; Error handling: Returns to monitor prompt on invalid input or completion
+; Used by: Monitor command interpreter for memory debugging and verification
+; =============================================================================
+l0323h:					; Memory Compare Command Entry Point
+	call sub_0760h		;0323 Parse 3 hex addresses from user input (start1, end1, start2)
+	jp z,l02d9h		;0326 Jump to error handler if hex parsing failed
+	ex de,hl		;0329 DE=start1, HL=start2 (swap for comparison loop setup)
+	
+l032ah:					; Main Memory Comparison Loop
+	call sub_09a3h		;032a Check for keyboard input (allows user to abort with any key)
+	ld a,(de)		;032d Load byte from first memory region (source)
+	cp (hl)			;032e Compare with byte from second memory region (destination)
+	call nz,sub_0338h	;032f If bytes differ, display the mismatch details
+	inc de			;0332 Move to next byte in first region (source++)
+	cpi			;0333 CP (HL), INC HL, DEC BC - auto-increment second region
+	ret po			;0335 Return when BC=0 (all bytes compared, PO=parity odd/BC=0)
+	jr l032ah		;0336 Continue comparison loop until all bytes checked
+
+; =============================================================================
+; MEMORY MISMATCH DISPLAY HANDLER
+; =============================================================================
+; Purpose: Display details when memory comparison finds a difference
+; Input: DE=address in first region, HL=address in second region, A=(DE), (HL) differ
+; Output: Displays both addresses and their differing byte values
+; Format: Shows both addresses with their different values for user analysis
+; Example output might be: "1000: 42  2000: 24" (showing the mismatch)
+; =============================================================================
+sub_0338h:				; Memory Mismatch Display Handler
+	push de			;0338 Save first region address on stack
+	call sub_0346h		;0339 Display first address and its byte value (format: "ADDR: XX")
+	ex (sp),hl		;033c Swap: HL=first addr (from stack), stack=second addr
+	call sub_0346h		;033d Display second address and its byte value (format: "ADDR: YY")
+	call sub_072ah		;0340 Output formatting/newline routine (complete the line)
+	ex de,hl		;0343 Restore proper register order (DE=first, HL=second)
+	pop hl			;0344 Restore second region address from stack
+	ret			;0345 Return to comparison loop
+
+; =============================================================================
+; ADDRESS AND BYTE VALUE DISPLAY ROUTINE
+; =============================================================================
+; Purpose: Display an address followed by the byte value at that address
+; Input: HL=memory address to display
+; Output: Shows "ADDR: XX" format to console
+; Used by: Memory compare, memory dump, and other debugging commands
+; =============================================================================
+sub_0346h:				; Display Address and Byte Value
+	push hl			;0346 Save address
+	ld a,(hl)		;0347 Load byte value from address
+	push af			;0348 Save the byte value
+	call sub_06b8h		;0349 Display the address (HL) in hex
+	ld hl,(011f2h)		;034c Get console output buffer pointer
+	dec hl			;034f Back up one position
+	ld (hl),03dh		;0350 Insert '=' character (0x3D = ASCII '=')
+	pop af			;0352 Restore byte value
+	call sub_06c6h		;0353 Display byte value in hex
+	pop hl			;0356 Restore address
+	ret			;0357 Return
+	call sub_0763h		;0358
+	jr z,l03a0h		;035b
+	exx			;035d
+
+; =============================================================================
+; MEMORY DUMP/HEX DISPLAY COMMAND - 32 Bytes per Screen
+; =============================================================================
+; Purpose: Display memory contents in hex dump format (D command)
+; Input: Starting address in HL' (alternate register set)
+; Output format: XXXX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX XX *................*
+; Where: XXXX = 4-digit hex address, XX = hex bytes, * = ASCII representation
+; Block size: 16 bytes per line, 2 lines = 32 bytes total per screen
+; User can press any key to abort display and return to monitor
+; =============================================================================
+l035eh:					; Memory Dump Command Entry Point
+	call sub_09a3h		;035e Check for keyboard input/break (allows user abort)
+	ld hl,01104h		;0361 Point to display buffer start (console buffer workspace)
+	ld de,01105h		;0364 Point to buffer start + 1 (for block fill operation)
+	ld bc,00049h		;0367 Set count = 73 bytes to clear (full display line + margin)
+	ld (hl),020h		;036a Put space character (0x20) in first position of buffer
+	ldir			;036c Fill entire buffer with spaces (clear display workspace)
+	ld b,010h		;036e Set counter for 16 bytes per line (standard hex dump width)
+	ld hl,01139h		;0370 Point to ASCII display area in buffer (right side of display)
+	ld (hl),02ah		;0373 Put '*' character as left ASCII area separator
+	inc hl			;0375 Move to first ASCII character position
+	exx			;0376 Switch to alternate register set (HL'=current memory address)
+	call sub_06b8h		;0377 Display 4-digit hex address at line start (XXXX format)
+l037ah:				; Main byte display loop (16 bytes per line)
+	ld a,(hl)		;037a Load byte from current memory address
+	exx			;037b Switch to buffer registers (for ASCII display area)
+	ld (hl),a		;037c Store byte in ASCII display area (right side preview)
+	cp 020h		;037d Compare with space character (0x20)
+	jr c,l0385h		;037f If < 0x20 (control character), replace with dot
+	cp 07fh		;0381 Compare with DEL character (0x7F)
+	jr c,l0387h		;0383 If < 0x7F (printable ASCII), keep original character
+l0385h:
+	ld (hl),02eh		;0385 Replace with '.' for non-printable characters (0x00-0x1F, 0x7F-0xFF)
+l0387h:
+	inc hl			;0387 Move to next ASCII display position
+	ld (hl),02ah		;0388 Put '*' separator after ASCII character
+	exx			;038a Switch back to memory address registers
+	call sub_06c6h		;038b Display the hex value of current byte (XX format)
+	cpi			;038e Compare and increment HL, decrement BC (built-in loop control)
+	exx			;0390 Switch to buffer registers for ASCII area management
+	inc hl			;0391 Move buffer pointer to next ASCII position
+	jp po,l0727h		;0392 If BC=0 (parity odd=end of block), finish and display line
+	djnz l039ch		;0395 Decrement line counter B, if not 0 continue current line
+	call l0727h		;0397 Display the completed line (16 bytes hex + ASCII representation)
+	jr l035eh		;039a Start next line (display next address block)
+l039ch:					; Continue current line processing
+	dec hl			;039c Back up buffer pointer (adjust for proper spacing)
+	exx			;039d Switch back to memory address registers
+	jr l037ah		;039e Continue byte processing loop for same line
+
+; =============================================================================
+; MEMORY EXAMINE AND MODIFY COMMAND (M command)
+; =============================================================================
+; Purpose: Interactive memory editing - display address, show current value, 
+;          allow user to enter new value, store it, and continue to next address
+; Input: HL = starting memory address (parsed from user command like "M 1000")
+; Operation: Shows "ADDR: XX" format, waits for user input, stores new value
+; User Interface: Enter new hex value to change, press Enter to skip, 'Q' to quit
+; Exit: User presses 'Q' to quit and return to monitor prompt
+; Example: "1000: 42" - shows address 1000 has value 42, user can change it
+; =============================================================================
+l03a0h:					; Memory Examine/Modify Entry Point
+	push hl			;03a0 Save current memory address on stack
+	call sub_06b8h		;03a1 Display address in 4-digit hex format (e.g., "1000:")
+	ld a,(hl)		;03a4 Load current byte value from memory at address
+	call sub_0708h		;03a5 Display current value and get user input (hex parser)
+	jr z,l03b0h		;03a8 If no input/Enter pressed, skip to next address
+	pop hl			;03aa Restore memory address from stack
+	ld (hl),a		;03ab Store new value entered by user into memory
+	push hl			;03ac Save address on stack again for next iteration
+	call sub_0662h		;03ad Call verification/display routine (confirm change)
+l03b0h:					; Next address processing
+	pop hl			;03b0 Restore current address from stack
+	cp 051h			;03b1 Compare input with 'Q' (0x51 = ASCII 'Q' for quit)
+	ret z			;03b3 Return to monitor prompt if user pressed 'Q'
+	inc hl			;03b4 Move to next memory address (auto-increment)
+	jr l03a0h		;03b5 Loop back to examine next byte (continue editing)
+
+; =============================================================================
+; MEMORY FILL COMMAND (F command) - Fill Memory Block with Pattern Byte
+; =============================================================================
+; Purpose: Fill a memory region with a specified byte value using efficient block copy
+; Input: User enters "F START END VALUE" - three hex parameters on command line
+; Operation: Fills memory from START to END (inclusive) with VALUE byte
+; Example: "F 1000 10FF 42" fills addresses 1000-10FF with 0x42 (256 bytes)
+; Special case: "FO" prefix jumps to different command handler (File Operations?)
+; Technique: Uses single byte + LDIR for efficient bulk memory fill
+; =============================================================================
+l03b7h:					; Memory Fill Command Entry Point
+	call sub_065eh		;03b7 Get next command character from input buffer (after 'F')
+	cp 04fh		;03ba Compare with 'O' (0x4F = ASCII 'O')
+	jp z,l0a74h		;03bc If 'O', jump to File Operations handler (FO command)
+	call sub_0760h		;03bf Parse three hex parameters: start addr→DE, end addr→HL, value→A
+	and a			;03c2 Clear carry flag for subtraction (prepare SBC calculation)
+	ld (de),a		;03c3 Store fill value at start address (seeds the pattern)
+	sbc hl,de		;03c4 Calculate length = end address - start address
+	ret z			;03c6 Return if length is zero (start=end, only one byte filled)
+	ld b,h			;03c7 Move length to BC register pair (16-bit byte count)
+	ld c,l			;03c8 BC = number of bytes remaining to fill
+	ld h,d			;03c9 HL = start address (source for propagating pattern)
+	ld l,e			;03ca Copy DE (start) to HL 
+	inc de			;03cb DE = start address + 1 (destination for pattern copy)
+	ldir		;03cc Fill memory: copy (HL) to (DE), repeat BC times
+	ret			;03ce Return to monitor (entire memory region now filled)
+
+; =============================================================================
+; DEBUG/DISPLAY PARAMETER COMMAND (I command) - Configure Display Settings
+; =============================================================================
+; Purpose: Configure debugging display parameters, modes, or formatting options
+; Input: User enters "I XXXX" where XXXX is hex value for display parameter
+; Storage: Parameter value stored at memory address 0x11D6
+; Special case: "II" command jumps to specialized display handler at 0x0A86
+; Use cases: Sets display width, format modes, or debugging visualization options
+; Examples: "I 10" might set 16-byte display width, "I 01" might enable trace mode
+; =============================================================================
+l03cfh:					; I Command (Debug/Display Parameter) Entry Point
+	call sub_065eh		;03cf Get next command character from input buffer (check for "II")
+	cp 044h		;03d2 Compare with 'I' (0x49 = ASCII 'I' for "II" command variant)
+	jp z,l0a86h		;03d4 If second 'I', jump to specialized display command handler
+	ld a,(011d6h)		;03d7 Load current debug display parameter from memory (0x11D6)
+	call sub_0708h		;03da Get hex input from user (new parameter value for I command)
+	ret z			;03dd Return if no input provided (display current parameter value)
+	ld (011d6h),a		;03de Store new debug display parameter at 0x11D6
+	ret			;03e1 Return to monitor (I command parameter updated)
+
+; =============================================================================
+; BREAKPOINT/EXECUTION COUNTER COMMAND - Program Execution Control
+; =============================================================================
+; Purpose: Set up execution counter for controlled program stepping/tracing
+; Input: User enters hex counter value (number of instructions to execute)
+; Operation: Sets up debugging counter for single-step or limited execution
+; Use case: "B 100" might execute 256 instructions then break back to monitor
+; =============================================================================
+l03e2h:					; Breakpoint/Counter Command Entry Point
+	call sub_03f7h		;03e2 Call setup/initialization routine (clear counters?)
+	call sub_0680h		;03e5 Parse hex input from user (execution count)
+	ret z			;03e8 Return if no valid input provided (show current count?)
+	call sub_0405h		;03e9 Process the counter value (setup execution limit)
+
+sub_03ech:				; Counter Processing Subroutine - EXECUTION STEP COUNTER
+	call sub_0680h		;03ec Parse hex input from user (step count parameter)
+	jr nz,l03f3h		;03ef If valid hex input provided, store it as step count
+	ld a,001h		;03f1 Default step count = 1 (single step if no input)
+l03f3h:
+	ld (011d0h),a		;03f3 Store step counter at 0x11D0 (execution step limit)
+	ret			;03f6 Return to single-step execution controller
+
+; =============================================================================
+; BREAKPOINT RESTORATION ROUTINE
+; =============================================================================
+; Purpose: Restore original instruction that was replaced by breakpoint
+; Operation: Reads saved instruction byte and restores it to memory
+; Used by: Breakpoint system to clean up after break execution
+; =============================================================================
+sub_03f7h:				; Breakpoint Restoration
+	ld hl,(011f0h)		;03f7 Load breakpoint address from memory
+	ld a,(011cfh)		;03fa Load saved original instruction byte
+	ld (hl),a		;03fd Restore original instruction at breakpoint
+	ld hl,l0000h		;03fe Clear breakpoint address (set to 0000)
+	ld (011f0h),hl		;0401 Store cleared address (no active breakpoint)
+l0404h:
+	ret			;0404 Return
+
+; =============================================================================
+; BREAKPOINT INSTALLATION ROUTINE  
+; =============================================================================
+; Purpose: Install breakpoint by replacing instruction with 0xFF
+; Operation: Saves original instruction and replaces it with break opcode
+; Input: HL = address where breakpoint should be set
+; Memory: 011cfh = saved original instruction, 011f0h = breakpoint address
+; =============================================================================
+sub_0405h:				; Breakpoint Installation
+	ld a,(hl)		;0405 Load original instruction from target address
+	ld (011cfh),a		;0406 Save original instruction byte
+	ld (hl),0ffh		;0409 Replace with breakpoint opcode (0xFF = RST 38H)
+	ld (011f0h),hl		;040b Store breakpoint address for later restoration
+	ret			;040e Return
+
+; =============================================================================
+; INSTRUCTION ANALYSIS AND BREAKPOINT PLACEMENT
+; =============================================================================
+; Purpose: Analyze instruction stream and set appropriate breakpoints
+; Used by: Single-step debugging and program flow analysis
+; =============================================================================
+l040fh:					; Instruction Analysis Entry Point
+	call sub_03f7h		;040f Restore any existing breakpoint first
+	ld hl,(011eah)		;0412 Load current execution address
+	call sub_0425h		;0415 Analyze instruction at current address
+	jp nc,l049fh		;0418 If NOT special instruction, jump to normal execution path
+	ld e,a			;041b Move instruction length to E register
+	ld d,000h		;041c Clear D register (DE = instruction length in bytes)
+	add hl,de		;041e Calculate next instruction address (current + length)
+	call sub_0405h		;041f Set breakpoint at NEXT instruction (step-over mode)
+	jp l044ah		;0422 Jump to execution setup and run until breakpoint hit
+
+; =============================================================================
+; Z80 INSTRUCTION DECODER - Analyzes instruction types for debugging
+; =============================================================================
+; Purpose: Decode Z80 instructions to determine their type and length
+; Input: HL points to instruction to analyze
+; Output: Carry set if special instruction, A = instruction length
+; Special instructions: CALL, RET, conditional jumps, block operations
+; =============================================================================
+sub_0425h:				; Z80 Instruction Decoder
+	ld a,(hl)		;0425 Load instruction opcode
+	cp 0edh		;0426 Check for ED prefix (extended instructions)
+	jr z,l0437h		;0428 If ED prefix, handle extended instructions
+	cp 0cdh		;042a Check for CALL instruction (0xCD)
+	jr z,l0433h		;042c If CALL, return length 3
+	and 0c4h		;042e Mask bits to check instruction pattern
+	xor 0c4h		;0430 Check for conditional CALL pattern (11xxx100)
+	ret nz			;0432 Return if not special instruction (carry clear)
+
+l0433h:					; CALL instruction handler
+	ld a,003h		;0433 CALL instructions are 3 bytes long
+	scf			;0435 Set carry flag (special instruction detected)
+	ret			;0436 Return with instruction length
+
+l0437h:					; Extended instruction handler (ED prefix)
+	inc hl			;0437 Move to second byte of ED instruction
+	ld a,(hl)		;0438 Load second opcode byte
+	and 0f0h		;0439 Mask upper nibble
+	xor 0b0h		;043b Check for block operation pattern (10110xxx)
+	ret nz			;043d Return if not block operation
+	inc a			;043e A = 1 (ED block instructions are 2 bytes)
+	scf			;043f Set carry flag (special instruction detected)
+	ret			;0440 Return with instruction length
+
+; =============================================================================
+; JUMP/EXECUTE COMMAND (J command) - Execute program from specified address  
+; =============================================================================
+; Purpose: Start program execution from user-specified address (same as G command)
+; Input: User provides "J XXXX" where XXXX is hex address to execute
+; Operation: Sets up execution environment and transfers control to user program
+; Note: J command shares the same implementation as G (Go) command
+; =============================================================================
+l0441h:					; J Command (Jump/Execute) Entry Point
+	call sub_0680h		;0441 Parse hex address from user input (e.g., "J 1000")
+	jp z,l02d9h		;0444 Jump to error handler if invalid address entered
+	ld (011eah),hl		;0447 Store execution start address in system variable
+
+; =============================================================================
+; PROGRAM EXECUTION CONTROLLER (shared by G and J commands)
+; =============================================================================
+; Purpose: Set up CPU state and execute user program with debugging support
+; Features: Interrupt handling, breakpoint detection, register restoration
+; Used by: Both G (Go) and J (Jump) commands use this same execution logic
+; =============================================================================
+l044ah:					; Program Execution Setup
+	ld a,(011d7h)		;044a Load interrupt vector high byte from system config
+	ld i,a			;044d Set Z80 interrupt vector register (for IM2 mode)
+	ld de,(011eah)		;044f Load target execution address from user input (G/J command)
+	ld hl,(011f0h)		;0453 Load current breakpoint address from active breakpoint
+	and a			;0456 Clear carry flag for 16-bit address comparison
+	sbc hl,de		;0457 Compare: is breakpoint already at execution start address?
+	jr z,l0472h		;0459 If breakpoint at execution address, handle as special case
+	ld hl,(011d6h)		;045b Load debug control parameters (interrupt/trace modes)
+	ld a,h			;045e Get high byte of debug params for interrupt vector
+	ld i,a			;045f Set interrupt vector register for user program context
+	di			;0461 Disable interrupts during critical register setup phase
+	bit 0,l			;0462 Check debug control bit 0 (interrupt enable flag for user)
+	jr z,l0467h		;0464 If bit 0 clear, keep interrupts disabled during execution
+	ei			;0466 Re-enable interrupts if user program expects them enabled
+
+;==============================================================================
+; USER PROGRAM EXECUTION CONTROLLER (0x0467-0x0471)
+;==============================================================================
+; Purpose: Execute user program with full debugger support and state management
+; Entry: l0467h - Called after breakpoint setup or direct execution request
+; Operation: Restore registers → Execute user code → Handle return → Process results
+;==============================================================================
+l0467h:					; Execute User Program Entry Point
+	call sub_079bh		;0467 CRITICAL: Restore all registers and execute user code
+	ld hl,(011eah)		;046a Reload execution address from save area (post-execution)
+	push hl			;046d Save execution address on stack for debug analysis
+	ld hl,(011d4h)		;046e Load debug parameters/status from execution control
+	ret			;0471 Return to calling debugger routine with status
+
+;==============================================================================
+; ERROR HANDLER AND MEMORY RESTORATION (0x0472-0x0478)
+;==============================================================================
+; Purpose: Handle execution errors and restore memory state after breakpoints
+; Used by: Debugger cleanup routines and breakpoint removal system
+;==============================================================================
+l0472h:					; Error Handler Entry Point
+	ld hl,l07efh		;0472 Load address for execution/error handler routine
+l0475h:					; Memory restoration entry point (breakpoint cleanup)
+	ld a,(011cfh)		;0475 Load saved byte value from backup storage location
+	ld (de),a		;0478 Restore original byte at target address (remove breakpoint)
+
+;==============================================================================
+; BREAKPOINT INSTALLATION WITH MEMORY PAGING (0x0479-0x049D)
+;==============================================================================
+; Purpose: Install software breakpoint in paged memory with full state management
+; Features: Memory paging control, interrupt management, state backup/restoration
+; Operation: Enables paging → Selects memory page → Plants breakpoint → Saves state
+;
+; Memory Paging Sequence:
+; 1. Disable interrupts for atomic operation
+; 2. Configure interrupt mode 2 with vector table at 0x1300
+; 3. Enable 64KB memory card paging system via port 0x000
+; 4. Select target memory page via dual-write to port 0x003
+; 5. Install breakpoint instruction and backup original data
+;
+; Port Operations:
+; • PORT 0x000 (0x20): Memory management control - enables bank switching
+; • PORT 0x003 (0x87, 0x01): Page selection - first 0x87 (page 7 + control), then 0x01 (page 1)
+;
+; State Management:
+; • Backs up original instruction before planting 0xFB (EI) breakpoint
+; • Stores breakpoint location and original data for safe restoration
+; • Integrates with debugger's execution control and single-step system
+;==============================================================================
+l0479h:					; Breakpoint Installation Entry Point
+	dec de			;0479 Decrement target address by 1 (align to exact breakpoint location)
+	di			;047a Disable interrupts for atomic breakpoint installation
+	ld a,013h		;047b Set interrupt vector base 0x13 (points to table at 0x1300)
+	ld i,a			;047d Load interrupt vector register (prepare for IM2 mode)
+	ld a,020h		;047f Memory control: 0x20 = Enable 64KB paging system
+	out (000h),a		;0481 PORT 0x000: Memory management control (activate paging)
+	im 2			;0483 Set interrupt mode 2 (vectored interrupts via table)
+	ld a,087h		;0485 Page select: 0x87 = Page 7 + control bits active
+	out (003h),a		;0487 PORT 0x003: Page selection register (first selection)
+	ld a,001h		;0489 Page select: 0x01 = Select memory page 1 for breakpoint
+	out (003h),a		;048b PORT 0x003: Page selection register (second selection)
+	ld (01326h),hl		;048d Store HL at 0x1326 (breakpoint address for paging system)
+	ex de,hl		;0490 Exchange: HL=decremented target addr, DE=original addr
+	ld (011d1h),hl		;0491 Store active breakpoint address at 0x11D1 (current BP)
+	ld a,(hl)		;0494 Load original instruction byte from breakpoint location
+	ld (011d3h),a		;0495 Store original byte at 0x11D3 (backup for restoration)
+	ld (hl),0fbh		;0498 Plant breakpoint: 0xFB = EI instruction (interrupt enable)
+	ld (011eah),hl		;049a Store breakpoint address at 0x11EA (execution target)
+	jr l0467h		;049d Jump to execution preparation (complete breakpoint cycle)
+
+;==============================================================================
+; NORMAL INSTRUCTION EXECUTION PATH (0x049F) - NON-SPECIAL INSTRUCTIONS
+;==============================================================================
+; Purpose: Handle execution of normal instructions (not CALL/RET/conditional jumps)
+; Entry: Jumped to from 0x0418 when instruction decoder finds standard instruction
+; Operation: Set up single-step debugging environment for normal instruction execution
+; Features: Console buffer setup, memory management, step-by-step execution control
+;==============================================================================
+l049fh:					; Normal Instruction Execution Entry Point
+	call sub_05a5h		;049f Initialize console buffer system (prepare for single-step I/O)
+	call sub_03ech		;04a2 Process execution counter/step parameters
+l04a5h:					; Single-Step Execution Loop Controller
+	ld hl,(011d6h)		;04a5 Load debug control parameters from system settings
+	ld (011eeh),hl		;04a8 Save debug parameters for restoration after execution
+	ld de,(011eah)		;04ab Load current execution address (where to execute next)
+	ld hl,(011f0h)		;04af Load active breakpoint address from system
+	and a				;04b2 Clear carry flag for 16-bit address comparison
+	sbc hl,de			;04b3 Compare: is execution address same as breakpoint address?
+	ld hl,l04bch		;04b5 Load address of breakpoint handler routine
+	jr z,l0475h			;04b8 If at breakpoint, jump to memory restoration routine
+	jr l0479h			;04ba Otherwise, jump to breakpoint installation routine
+l04bch:
+	ld (011d4h),hl		;04bc
+	pop hl			;04bf
+	ld (011ech),sp		;04c0
+	ld sp,01400h		;04c4
+	call sub_0770h		;04c7
+	call sub_04ebh		;04ca
+	ld hl,l04d3h		;04cd
+	push hl			;04d0
+	reti		;04d1
+l04d3h:
+	ld hl,(011eeh)		;04d3
+	ld (011d6h),hl		;04d6
+	call sub_0582h		;04d9
+	ld hl,011d0h		;04dc
+	dec (hl)			;04df
+	jr nz,l04a5h		;04e0
+	inc (hl)			;04e2
+	call sub_080dh		;04e3
+	jp nz,l02c9h		;04e6
+	jr l04a5h		;04e9
+;==============================================================================
+; MEMORY PAGING RESTORE ROUTINE (0x04EB)
+;==============================================================================
+; Purpose: Restore default memory page and clean up paging state
+; Called during system shutdown or page switching operations
+;
+; Operation:
+; - Switches back to page 3 (likely default/system page)
+; - Restores original memory contents from backup
+; - Cleans up paging state for safe transition
+;==============================================================================
+sub_04ebh:
+	ld a,003h		;04eb ; Load page 3 (default/system page)
+	out (003h),a		;04ed ; PORT 0x003: Switch to page 3
+	ld hl,(011d1h)		;04ef ; Load backup memory address
+	ld a,(011d3h)		;04f2 ; Load original byte value
+	ld (hl),a			;04f5 ; Restore original memory contents
+	ld hl,(011f0h)		;04f6 ; Load cleanup address
+	ld (hl),0ffh		;04f9 ; Mark memory as restored/available
+	ret			;04fb ; Return to caller
+	call sub_0760h		;04fc
+	jp z,l02d9h		;04ff
+	push hl			;0502
+	and a			;0503
+	sbc hl,de		;0504
+	pop hl			;0506
+l0507h:
+	jr c,l050ch		;0507
+l0509h:
+	ldir		;0509
+	ret			;050b
+l050ch:
+	add hl,bc			;050c
+	dec hl			;050d
+	ex de,hl			;050e
+	add hl,bc			;050f
+	dec hl			;0510
+	ex de,hl			;0511
+	lddr		;0512
+	ret			;0514
+	call sub_0662h		;0515
+	jr z,l057fh		;0518
+	ld d,a			;051a
+	call sub_065eh		;051b
+	jr nz,l0522h		;051e
+	ld a,020h		;0520
+l0522h:
+	ld e,a			;0522
+	call sub_05cch		;0523
+	dec hl			;0526
+	dec hl			;0527
+	jp nz,l02d9h		;0528
+l052bh:
+	ld de,01104h		;052b
+	ldi		;052e
+	ldi		;0530
+	push hl			;0532
+	ex de,hl			;0533
+	ld (hl),020h		;0534
+	inc hl			;0536
+	ld (011f2h),hl		;0537
+	ld hl,l060eh		;053a
+	or a			;053d
+	ex de,hl			;053e
+	sbc hl,de		;053f
+	ld e,(ix+000h)		;0541
+	ld d,(ix+001h)		;0544
+	jr nc,l056ah		;0547
+	ld a,(de)			;0549
+	push de			;054a
+	call sub_0708h		;054b
+	pop de			;054e
+	jr z,l0555h		;054f
+	ld (de),a			;0551
+l0552h:
+	call sub_0662h		;0552
+l0555h:
+	cp 051h		;0555
+	pop hl			;0557
+	ret z			;0558
+	inc ix		;0559
+	inc ix		;055b
+	ex de,hl			;055d
+	push hl			;055e
+	ld hl,l0615h		;055f
+	or a			;0562
+	sbc hl,de		;0563
+	pop hl			;0565
+	ex de,hl			;0566
+	jr nz,l052bh		;0567
+	ret			;0569
+l056ah:
+	ld a,(de)			;056a
+	ld l,a			;056b
+	inc de			;056c
+	ld a,(de)			;056d
+	ld h,a			;056e
+	call sub_06b8h		;056f
+	push de			;0572
+	call sub_070bh		;0573
+	pop de			;0576
+	jr z,l0555h		;0577
+	ex de,hl			;0579
+	ld (hl),d			;057a
+	dec hl			;057b
+	ld (hl),e			;057c
+	jr l0552h		;057d
+l057fh:
+	call sub_05a5h		;057f
+sub_0582h:
+	ld b,011h		;0582
+	ld hl,l0615h		;0584
+l0587h:
+	ld e,(hl)			;0587
+	inc hl			;0588
+	ld d,(hl)			;0589
+	inc hl			;058a
+	ld a,(de)			;058b
+	call sub_06c6h		;058c
+	djnz l0587h		;058f
+	ld b,004h		;0591
+l0593h:
+	ld e,(hl)			;0593
+	inc hl			;0594
+	ld d,(hl)			;0595
+	inc hl			;0596
+	ex de,hl			;0597
+	ld a,(hl)			;0598
+	inc hl			;0599
+	ld h,(hl)			;059a
+	ld l,a			;059b
+	call sub_06b8h		;059c
+	ex de,hl			;059f
+	djnz l0593h		;05a0
+l05a2h:
+	jp sub_072ah		;05a2
+
+;==============================================================================
+; CONSOLE BUFFER INITIALIZATION (sub_05a5h) - REGISTER DISPLAY SETUP
+;==============================================================================
+; Purpose: Initialize console buffer system with register name templates
+; Operation: Copy register name strings from ROM table to RAM buffer area
+; Used by: Single-step debugging to prepare register display output
+; Buffer: 0x1104 = console buffer start, filled with register names for display
+;==============================================================================
+sub_05a5h:				; Console Buffer Initialization Entry Point
+	ld de,01104h		;05a5 DE = console buffer start address (0x1104)
+	ld hl,l05ebh		;05a8 HL = register name table in ROM (0x05EB - register names)
+	ld bc,011ffh		;05ab BC = loop count (B=0x01, C=0xFF - copy parameters)
+	ld a,020h		;05ae A = 0x20 (space character for formatting)
+l05b0h:					; Register Name Copy Loop
+	ldi		;05b0 Copy first character from register table to buffer
+	ldi		;05b2 Copy second character from register table to buffer  
+	ld (de),a		;05b4 Store space character (0x20) after register name
+	inc de			;05b5 Advance buffer pointer past space
+	djnz l05b0h		;05b6 Loop until all register names copied (B times)
+	ld b,004h		;05b8 Set loop counter for additional buffer setup (4 iterations)
+l05bah:					; Additional Buffer Formatting Loop
+	ld (de),a		;05ba Store space character in buffer 
+	inc de			;05bb Advance buffer pointer
+	ldi		;05bc Copy character from register table to buffer
+	ldi		;05be Copy second character from register table to buffer
+	ld (de),a		;05c0 Store space character after register name
+	inc de			;05c1 Advance buffer pointer
+	ld (de),a		;05c2 Store another space character (double spacing)
+	inc de			;05c3 Advance buffer pointer
+	djnz l05bah		;05c4 Loop for remaining register names (4 times)
+	ld (011f2h),de		;05c6 Store final buffer pointer at 0x11F2 (buffer end)
+	jr l05a2h		;05ca Jump to buffer completion routine
+sub_05cch:
+	ld ix,l0615h		;05cc
+	ld bc,l002ah		;05d0
+	ld hl,l05ebh		;05d3
+l05d6h:
+	ld a,d			;05d6
+	cpi		;05d7
+	jr z,l05e5h		;05d9
+	xor a			;05db
+	cpi		;05dc
+l05deh:
+	ret po			;05de
+	inc ix		;05df
+	inc ix		;05e1
+	jr l05d6h		;05e3
+l05e5h:
+	ld a,e			;05e5
+	cpi		;05e6
+	ret z			;05e8
+	jr l05deh		;05e9
+
+;==============================================================================
+; Z80 REGISTER NAME TABLE (0x05EB+)
+; Purpose: ASCII string table of Z80 register names for display/debugging
+; Format: Space-separated register names, single quotes for alternate registers
+; Content: "A B C D E F H L I A'B'C'D'E'F'H'L'IXI..."
+;==============================================================================
+;==============================================================================
+; Z80 REGISTER NAME AND ADDRESS LOOKUP TABLE (0x05EB-0x63D)
+; Purpose: Complete register name table with corresponding addresses for debugger/monitor
+; Format: ASCII register names followed by address lookup table
+;==============================================================================
+register_names_05ebh:
+	; Register name strings (space-separated)
+	db "A B C D E F H L I A'B'C'D'E'F'H'L'IXI"	;05eb-060f
+	db "YPCSP"						;0610-0614 (IY, PC, SP registers)
+	
+	; Address lookup table (each entry is 0x11 followed by address)
+	db 0xD9, 0x11, 0xDB, 0x11, 0xDA, 0x11, 0xDD, 0x11	;0615-061c
+	db 0xDC, 0x11, 0xD8, 0x11, 0xD5, 0x11, 0xD4, 0x11	;061d-0624  
+	db 0xD7, 0x11, 0xDF, 0x11, 0xE1, 0x11, 0xE0, 0x11	;0625-062c
+	db 0xE3, 0x11, 0xE2, 0x11, 0xDE, 0x11, 0xE5, 0x11	;062d-0634
+	db 0xE4, 0x11, 0xE6, 0x11, 0xE8, 0x11, 0xEA, 0x11	;0635-063c
+	db 0xEC, 0x11					;063d-063e
+
+;==============================================================================
+; HEX INPUT SEQUENCE (0x063F)
+;==============================================================================
+; Purpose: Parse two hexadecimal values from user input
+; Typical use: Address and data entry for memory operations
+; Example: User types "1000 FF" to store 0xFF at address 0x1000
+;==============================================================================
+sub_063fh:
+	call sub_0680h		;063f ; Parse first hex string (e.g., address)
+	push hl			;0642 ; Save first parsed value on stack
+	call sub_0680h		;0643 ; Parse second hex string (e.g., data)
+	pop hl			;0646 ; Restore first value to HL
+	ret z			;0647 ; Return if second parse failed
+	ld (hl),a		;0648 ; Store second value (data) at first value (address)
+	inc hl			;0649 ; Increment to next address
+	jr $-8			;064a ; Loop back to continue operation
+sub_064ch:
+	ex (sp),hl			;064c
+	ld b,(hl)			;064d
+l064eh:
+	inc hl			;064e
+	cp (hl)			;064f
+	inc hl			;0650
+	ld e,(hl)			;0651
+	inc hl			;0652
+	ld d,(hl)			;0653
+	jr nz,l0659h		;0654
+	ex de,hl			;0656
+	ex (sp),hl			;0657
+	ret			;0658
+l0659h:
+	djnz l064eh		;0659
+	jp l02d9h		;065b
+sub_065eh:
+	inc hl			;065e
+	ld a,(hl)			;065f
+	jr l0677h		;0660
+
+; =============================================================================
+; INPUT BUFFER SCANNER - Skip Spaces and Process Next Character
+; =============================================================================
+; Purpose: Scan input buffer, skip spaces, and return next non-space character
+; Input: (011f4h) points to current position in input buffer
+; Output: A = next non-space character, HL updated to new position
+; Used by: Memory modify command to parse user input after displaying value
+; =============================================================================
+sub_0662h:				; Input Buffer Scanner
+	ld hl,(011f4h)		;0662 Load current input buffer pointer
+l0665h:					; Space-skipping loop
+	ld a,(hl)		;0665 Load character from buffer
+	cp 00dh		;0666 Check for CR (end of line)
+	jr z,l0674h		;0668 If CR, finish and update pointer
+	cp 020h		;066a Check for space character
+l066ch:					; Continue scanning loop
+	inc hl			;066c Move to next character
+	jr nz,l0665h		;066d If not space, check if still space at new position
+	ld a,(hl)		;066f Load next character
+	cp 020h		;0670 Check if it's also a space
+	jr z,l066ch		;0672 If space, continue skipping spaces
+l0674h:					; Update buffer pointer and process character
+	ld (011f4h),hl		;0674 Store updated buffer pointer
+l0677h:					; Character processing
+	bit 6,a		;0677 Check bit 6 (lowercase letter detection)
+	jr z,l067dh		;0679 If not set, skip case conversion
+	res 5,a		;067b Convert lowercase to uppercase (clear bit 5)
+l067dh:					; Final character check
+	cp 00dh		;067d Compare with CR (carriage return)
+	ret			;067f Return with flags set
+;==============================================================================
+; HEXADECIMAL STRING PARSER (0x0680)
+;==============================================================================
+; Purpose: Convert ASCII hexadecimal string to binary value
+; Input: DE points to ASCII hex string (e.g. "1A2F")
+; Output: HL contains parsed binary value, A contains last character processed
+; 
+; Supported formats:
+; - Digits 0-9 (ASCII 0x30-0x39)
+; - Letters A-F (ASCII 0x41-0x46, case insensitive)
+; - Automatically converts lowercase a-f to uppercase A-F
+; 
+; Error handling: Invalid characters cause jump to error handler at l02d9h
+; 
+; Algorithm:
+; 1. Initialize result to 0
+; 2. For each character: validate, convert, pack into result
+; 3. Use RLD instruction for efficient 4-bit nibble packing
+; 4. Continue until non-hex character found
+;==============================================================================
+sub_0680h:
+	ld hl,l0000h		;0680 ; Initialize result to 0
+	push hl			;0683 ; Save initial value on stack
+	add hl,sp		;0684 ; HL = stack pointer (for result storage)
+	ex de,hl		;0685 ; DE = stack pointer, HL = string pointer
+	call sub_0662h		;0686 ; Get next character from input
+	ex de,hl		;0689 ; Restore: HL = stack pointer, DE = string pointer
+	jr nz,l068fh		;068a ; If character available, process it
+l068ch:
+	pop hl			;068c ; Restore result from stack
+	ld a,l			;068d ; Return low byte in A
+	ret			;068e ; Return with parsed value
+l068fh:
+	cp 030h		;068f ; Compare with '0' (0x30)
+	jp c,l02d9h		;0691 ; If < '0', invalid hex character - error
+l0694h:
+	cp 041h		;0694 ; Compare with 'A' (0x41)
+	jr c,l069ah		;0696 ; If < 'A', must be digit 0-9, go convert
+	res 5,a		;0698 ; Convert lowercase to uppercase (clear bit 5)
+l069ah:
+	cp 03ah		;069a ; Compare with ':' (0x3A, one past '9')
+	jr c,l06aah		;069c ; If < ':', it's digit 0-9, go pack
+	cp 041h		;069e ; Compare with 'A' (0x41)
+	jp c,l02d9h		;06a0 ; If between ':' and 'A', invalid - error
+	cp 047h		;06a3 ; Compare with 'G' (0x47, one past 'F')
+	jp nc,l02d9h		;06a5 ; If >= 'G', invalid hex letter - error
+	sub 007h		;06a8 ; Convert A-F to 10-15 (subtract 7)
+l06aah:
+	rld		;06aa ; Rotate left digit: pack nibble into (HL)
+	inc hl			;06ac ; Point to next byte for multi-byte values
+	rld		;06ad ; Pack into high nibble of next byte
+	dec hl			;06af ; Return to original position
+	inc de			;06b0 ; Point to next character in input string
+	ld a,(de)		;06b1 ; Load next character
+	cp 030h		;06b2 ; Check if >= '0'
+	jr nc,l0694h		;06b4 ; If valid hex character, continue parsing
+	jr l068ch		;06b6 ; Otherwise, end parsing and return result
+sub_06b8h:
+	ld a,h			;06b8
+	call sub_06c6h		;06b9
+	push hl			;06bc
+	ld hl,(011f2h)		;06bd
+	dec hl			;06c0
+	ld (011f2h),hl		;06c1
+	pop hl			;06c4
+	ld a,l			;06c5
+sub_06c6h:
+	push hl			;06c6
+	ld hl,(011f2h)		;06c7
+	call sub_06d6h		;06ca
+	inc hl			;06cd
+	ld (hl),020h		;06ce
+	inc hl			;06d0
+	ld (011f2h),hl		;06d1
+	pop hl			;06d4
+	ret			;06d5
+sub_06d6h:
+	push af			;06d6
+	rra			;06d7
+	rra			;06d8
+	rra			;06d9
+	rra			;06da
+	call sub_06e0h		;06db
+	inc hl			;06de
+	pop af			;06df
+sub_06e0h:
+	and 00fh		;06e0
+	cp 00ah		;06e2
+	jr c,l06e8h		;06e4
+	add a,007h		;06e6
+l06e8h:
+	add a,030h		;06e8
+	ld (hl),a			;06ea
+	ret			;06eb
+l06ech:
+	inc hl			;06ec
+	ld c,002h		;06ed
+	call sub_0111h		;06ef
+l06f2h:
+	ld a,(hl)			;06f2
+	cp 020h		;06f3
+	jr z,l0702h		;06f5
+	cp 00dh		;06f7
+	jr z,l0702h		;06f9
+	ld c,a			;06fb
+	call sub_0111h		;06fc
+	inc hl			;06ff
+	jr l06f2h		;0700
+l0702h:
+	ld c,003h		;0702
+	call sub_0111h		;0704
+	ret			;0707
+sub_0708h:
+	call sub_06c6h		;0708
+sub_070bh:
+	call sub_0745h		;070b
+	ld a,020h		;070e
+	ld (011f6h),a		;0710
+	call sub_080dh		;0713
+	cp 051h		;0716
+	ret z			;0718
+	ld hl,01168h		;0719
+	ld (hl),020h		;071c
+	ld (011f4h),hl		;071e
+	push de			;0721
+	call sub_0680h		;0722
+	pop de			;0725
+	ret			;0726
+l0727h:
+	ld (011f2h),hl		;0727
+sub_072ah:
+	push hl			;072a
+	push de			;072b
+	push bc			;072c
+	ld hl,(011f2h)		;072d
+	ld (hl),00dh		;0730
+	inc hl			;0732
+	ld (hl),00ah		;0733
+	inc hl			;0735
+l0736h:
+	ld (hl),000h		;0736
+	ld hl,01104h		;0738
+	ld (011f2h),hl		;073b
+	call l00fdh		;073e
+	pop bc			;0741
+	pop de			;0742
+	pop hl			;0743
+	ret			;0744
+sub_0745h:
+	push hl			;0745
+	push de			;0746
+	push bc			;0747
+	ld hl,(011f2h)		;0748
+	jr l0736h		;074b
+sub_074dh:
+	push hl			;074d
+	push de			;074e
+	ld hl,(011f2h)		;074f
+	ld (hl),000h		;0752
+	ld hl,01104h		;0754
+	ld (011f2h),hl		;0757
+	call l0107h		;075a
+	pop de			;075d
+	pop hl			;075e
+	ret			;075f
+sub_0760h:
+	call sub_0680h		;0760
+sub_0763h:
+	push hl			;0763
+	call sub_0680h		;0764
+	push hl			;0767
+	call sub_0680h		;0768
+	ld b,h			;076b
+	ld c,l			;076c
+	pop hl			;076d
+	pop de			;076e Restore DE register
+	ret			;076f Return to caller
+
+;==============================================================================
+; COMPLETE CPU STATE SAVE ROUTINE (sub_0770h) - CRITICAL SYSTEM COMPONENT
+;==============================================================================
+; Purpose: Save ALL Z80 CPU registers and set up interrupt environment
+; Used by: Interrupt handlers, breakpoint system, system initialization
+; Operation: Saves complete CPU state to stack area, sets up IM2 interrupts
+; Stack Layout: Creates complete register save area for later restoration
+;
+; REGISTER SAVE ORDER (pushed to stack at 0x011EC):
+; 1. HL (main register pair)
+; 2. IY (index register Y) 
+; 3. IX (index register X)
+; 4. HL' (alternate HL)
+; 5. DE' (alternate DE) 
+; 6. BC' (alternate BC)
+; 7. AF' (alternate accumulator/flags)
+; 8. DE (main register pair)
+; 9. BC (main register pair)
+; 10. AF (main accumulator/flags)
+; 11. I register status (interrupt vector register)
+;==============================================================================
+sub_0770h:				; Complete CPU State Save Entry Point
+	ld sp,011ech		;0770 Set stack pointer to register save area (0x011EC)
+	push hl			;0773 Save main HL register pair
+	push iy		;0774 Save IY index register (2 bytes)
+	push ix		;0776 Save IX index register (2 bytes)
+	exx			;0778 Switch to alternate register set
+	push hl			;0779 Save alternate HL register pair
+	push de			;077a Save alternate DE register pair
+	push bc			;077b Save alternate BC register pair
+	ex af,af'		;077c Switch to alternate AF register
+	push af			;077d Save alternate AF (accumulator/flags)
+	exx			;077e Switch back to main register set
+	ex af,af'		;077f Switch back to main AF register
+	push de			;0780 Save main DE register pair
+	push bc			;0781 Save main BC register pair  
+	push af			;0782 Save main AF (accumulator/flags)
+	ld a,i		;0783 Load interrupt vector register into A
+	push af			;0785 Save interrupt vector register status
+	ld a,(011d6h)		;0786 Load debug control parameters from system config
+	rra			;0789 Rotate right bit 0 (extract interrupt enable flag)
+	rra			;078a Rotate right bit 1 (extract trace mode flag)
+	and 001h		;078b Mask to keep only bit 0 (interrupt enable for user)
+	ld (011d6h),a		;078d Store processed debug control back to memory
+	ld a,013h		;0790 Load interrupt vector base 0x13 (table at 0x1300)
+	ld i,a		;0792 Set interrupt vector register for system operation
+	im 2		;0794 Set interrupt mode 2 (vectored interrupts)
+	ei			;0796 Enable interrupts for system operation
+	ld sp,013feh		;0797 Set stack pointer to system stack area (near top of RAM)
+	ret			;079a Return with complete CPU state saved
+
+; =============================================================================
+; USER PROGRAM EXECUTION ENGINE
+; =============================================================================
+; Purpose: Restore all CPU registers and transfer control to user program
+; Operation: Complete register restoration from saved state, then execute
+; Input: Stack contains saved register state, execution address in HL
+;==============================================================================
+; USER PROGRAM EXECUTION ENGINE (sub_079bh) - CRITICAL SYSTEM COMPONENT
+;==============================================================================
+; Purpose: Complete register restoration and user program execution
+; Entry: Called from 0x0467 after breakpoint installation or direct execution
+; Operation: Restore ALL CPU state → Execute user program → Handle completion
+; Exit: User program runs with full CPU state, returns via interrupt/break
+;
+; EXECUTION FLOW:
+; 1. Breakpoint installed at target address (0x0479)
+; 2. Control transferred to execution controller (0x0467)  
+; 3. Register restoration engine called (sub_079bh)
+; 4. Complete CPU state restored from memory (0x011D8)
+; 5. User program executed via jp (hl)
+; 6. Returns via interrupt handler when breakpoint hit or error occurs
+;
+; REGISTER SAVE AREA LAYOUT (0x011D8):
+; • AF  (main accumulator/flags)
+; • BC  (main register pair)  
+; • DE  (main register pair)
+; • AF' (alternate accumulator/flags)
+; • BC' (alternate register pair)
+; • DE' (alternate register pair)
+; • HL' (alternate register pair)
+; • IX  (index register X)
+; • IY  (index register Y)
+; • SP  (user stack pointer at 0x011EC)
+;==============================================================================
+sub_079bh:				; User Program Execution Engine - Heart of debugger execution
+	pop hl			;079b Get return address from stack (user program target address)
+	ld sp,011d8h		;079c Point stack pointer to register save area at 0x011D8
+	pop af			;079f Restore main AF (accumulator + flags) from save area
+	pop bc			;07a0 Restore main BC register pair from save area
+	pop de			;07a1 Restore main DE register pair from save area
+	ex af,af'		;07a2 Switch to alternate AF register (prepare for alt restore)
+	exx			;07a3 Switch to alternate BC,DE,HL registers (prepare for alt restore)
+	pop af			;07a4 Restore alternate AF register from save area
+	pop bc			;07a5 Restore alternate BC register from save area
+	pop de			;07a6 Restore alternate DE register from save area
+	pop hl			;07a7 Restore alternate HL register (contains execution target!)
+	pop ix		;07a8 Restore IX index register from save area
+	pop iy		;07aa Restore IY index register from save area
+	exx			;07ac Switch back to main register set (BC,DE,HL)
+	ex af,af'		;07ad Switch back to main AF register
+	ld sp,(011ech)		;07ae Restore user's original stack pointer from 0x011EC
+	jp (hl)			;07b2 EXECUTE USER PROGRAM! Jump to target in HL register
+;==============================================================================
+; INTERRUPT/ERROR HANDLER (0x07B3)
+;==============================================================================
+; Purpose: Handle interrupts or errors, display "BREAK AT " message
+; Called from 0x0066 during error conditions or break events
+; This appears to be a debugging/error reporting mechanism
+;==============================================================================
+l07b3h:
+	ld (011d4h),hl		;07b3 ; Save HL register for later restoration
+	ld hl,l07c1h		;07b6 ; Load address of continuation routine
+	ex (sp),hl			;07b9 ; Exchange with return address on stack
+	retn		;07ba ; Return from interrupt/error
+l07bch:
+	ld (011d4h),hl		;07bc  ; Save HL register to memory location 011d4h
+	pop hl			;07bf  ; Restore HL from stack
+	dec hl			;07c0  ; Decrement HL (adjust return address or pointer)
+l07c1h:
+	ld (011ech),sp		;07c1  ; Save current stack pointer to 011ech
+	ld sp,01400h		;07c5  ; Set new stack pointer to 0x1400 (top of RAM)
+	call sub_0770h		;07c8  ; Save all CPU registers and setup interrupt mode 2
+	ld de,(011eah)		;07cb  ; Load DE from memory pointer 011eah
+	ld hl,(011f0h)		;07cf  ; Load HL from memory pointer 011f0h
+	and a			;07d2  ; Clear carry flag for subtraction
+	sbc hl,de		;07d3  ; Compare HL and DE (subtract DE from HL)
+	jr nz,l07dfh		;07d5  ; If not equal, jump to boot message routine
+	ld hl,011d0h		;07d7  ; Point to counter at 011d0h
+	dec (hl)			;07da  ; Decrement the counter
+	jp nz,l0472h		;07db  ; If counter not zero, jump to l0472h
+	inc (hl)			;07de  ; Restore counter (prevent underflow)
+
+; =============================================================================
+; BREAKPOINT/INTERRUPT HANDLER - Display Break Location=
+; ============================================================================
+; Purpose: Display "BREAK AT XXXX" message when execution is interrupted
+; Input: DE contains the address where the break/interrupt occurred
+; Output: "BREAK AT XXXX" followed by return to monitor prompt
+; Used by: Breakpoint system, interrupt handlers, debugging features
+; =============================================================================
+l07dfh:					; Breakpoint Display Handler
+	ld hl,l0803h		;07df  ; Point to "BREAK AT " message string
+	call l00fdh		;07e2  ; Output the "BREAK AT " text to console
+	ex de,hl		;07e5  ; DE = address where break occurred
+	call sub_06b8h		;07e6  ; Display break address in 4-digit hex (XXXX format)
+	call sub_072ah		;07e9  ; Output newline/formatting
+	jp l02cch		;07ec  ; Return to monitor command prompt
+l07efh:
+	push hl			;07ef
+	push af			;07f0
+	call sub_04ebh		;07f1
+	ld hl,(011d6h)		;07f4
+	ld a,h			;07f7
+	ld i,a		;07f8
+	bit 0,l		;07fa
+	jr z,l07ffh		;07fc
+	ei			;07fe
+l07ffh:
+	pop af			;07ff
+	pop hl			;0800
+	reti		;0801
+l0803h:
+	defb 0x42			;0803 B
+	defb 0x52			;0804 R
+	defb 0x45			;0805 E
+	defb 0x41			;0806 A
+	defb 0x4b			;0807 K
+	defb 0x20			;0808
+	defb 0x41			;0809 A
+	defb 0x54			;080a T
+	defb 0x20			;080b 
+	defb 0x00			;080c
+sub_080dh:
+	ld a,(011f6h)		;080d
+	ld c,a			;0810
+	call sub_0127h		;0811
+	ld hl,01169h		;0814
+	ld (011f4h),hl		;0817
+	ld b,0ffh		;081a
+l081ch:
+	push bc			;081c ; Save character count and buffer position
+	call l0134h		;081d ; Get character from input (blocks until available)
+	cp 020h		;0820 ; Compare with space character (0x20)
+	jr c,l083ch		;0822 ; Jump to special character handler if control character (0x00-0x1F)
+	cp 07fh		;0824 ; Compare with DEL character (0x7F)
+	jr z,l083ch		;0826 ; Jump to special character handler for DEL (same as backspace)
+	ld (hl),a			;0828
+	inc hl			;0829
+	call sub_0127h		;082a
+	pop bc			;082d
+	djnz l081ch		;082e
+l0830h:
+	ld (hl),00dh		;0830
+	call sub_0862h		;0832
+	ld hl,01169h		;0835
+	ld a,(hl)			;0838
+	jp l0677h		;0839
+l083ch:
+	pop bc			;083c
+	cp 00dh		;083d ; Check for CR (Carriage Return, Enter key)
+	jr z,l0830h		;083f ; Jump to end input processing if Enter pressed
+	cp 008h		;0841 ; Check for Backspace (0x08) - character deletion
+	jr z,l0849h		;0843 ; Jump to backspace handler
+	cp 07fh		;0845 ; Check for DEL (0x7F) - alternative character deletion
+	jr nz,l081ch		;0847 ; Continue input loop if not a special character
+;==============================================================================
+; BACKSPACE/DELETE CHARACTER HANDLER (0x0849)
+;==============================================================================
+; Purpose: Handle character deletion during input (Backspace 0x08 or DEL 0x7F)
+; Implements standard line editing by removing the previous character from both
+; the input buffer and the terminal display.
+;
+; Visual Feedback Sequence:
+; 1. Send Backspace (0x08) - moves cursor left one position
+; 2. Send Space (0x20) - overwrites the character with blank
+; 3. Send Backspace (0x08) - moves cursor back to correct position
+;
+; Buffer Management:
+; - Decrements buffer pointer (HL) to remove character
+; - Increments remaining character count (B) 
+; - Prevents deletion beyond start of input buffer
+;
+; This provides standard terminal line editing behavior expected by users.
+;==============================================================================
+l0849h:
+	ld a,b			;0849 ; Load remaining character count
+	inc a			;084a ; Increment to test for buffer underflow
+l084bh:
+	jr z,l081ch		;084b ; Jump back to input loop if at buffer start (no chars to delete)
+	push bc			;084d ; Save character count and position
+	ld c,008h		;084e ; Load Backspace character (0x08)
+	call sub_0127h		;0850 ; Send backspace to terminal (move cursor left)
+	ld c,020h		;0853 ; Load Space character (0x20)
+	call sub_0127h		;0855 ; Send space to terminal (erase character)
+	ld c,008h		;0858 ; Load Backspace character (0x08) again
+	call sub_0127h		;085a ; Send backspace to terminal (reposition cursor)
+	pop bc			;085d ; Restore character count and position
+	inc b			;085e ; Increment remaining character count (one less char used)
+	dec hl			;085f ; Move buffer pointer back one position
+	jr l081ch		;0860 ; Return to main input loop
+sub_0862h:
+	push bc			;0862
+	ld c,00dh		;0863
+	call sub_0127h		;0865
+	ld c,00ah		;0868
+	call sub_0127h		;086a
+	pop bc			;086d
+	ret			;086e
+	call sub_065eh		;086f
+	cp 055h		;0872
+	jp z,l0924h		;0874
+	call sub_0680h		;0877
+	ld c,l			;087a
+	ld b,h			;087b
+	in a,(c)		;087c
+	push bc			;087e
+	call sub_0708h		;087f
+	pop bc			;0882
+	ret z			;0883
+	out (c),a		;0884
+	ret			;0886
+	call sub_0680h		;0887
+	push hl			;088a
+	call sub_0680h		;088b
+	ex de,hl			;088e
+	pop hl			;088f
+	push hl			;0890
+	add hl,de			;0891
+	call sub_06b8h		;0892
+	pop hl			;0895
+	or a			;0896
+	sbc hl,de		;0897
+	call sub_06b8h		;0899
+	jp sub_072ah		;089c
+
+; =============================================================================
+; LOAD/TRANSFER DATA COMMAND (L command) - Memory/Storage Operations
+; =============================================================================
+; Purpose: Load or transfer data between memory locations or external storage
+; Input: User enters "L" optionally followed by hex parameters
+; Operation: Performs data loading/transfer operations with address management
+; Storage: Working address stored at 0x11CD for ongoing operations
+; Features: Supports data checksums, address calculations, and transfer loops
+; =============================================================================
+l089fh:					; L Command (Load/Transfer) Entry Point
+	call sub_0917h		;089f Initialize/setup routine for load operations
+	call sub_0680h		;08a2 Parse optional hex parameter from user input
+	jr nz,l08aah		;08a5 If parameter provided, use it as load address
+	ld hl,l0000h		;08a7 Default to address 0x0000 if no parameter given
+l08aah:					; Load operation setup
+	ld (011cdh),hl		;08aa Store load/transfer address at 0x11CD (working address)
+	ld c,011h		;08ad Set up for operations (C=0x11, might be record type/command)
+	call sub_099dh		;08af Call data processing routine (load/transfer handler)
+l08b2h:					; Data format parsing loop
+	call sub_0997h		;08b2 Get next character from input stream
+	cp 03ah		;08b5 Compare with ':' character (0x3A = ASCII colon)
+	jr nz,l08b2h		;08b7 Keep searching until ':' found (record start marker)
+	call sub_08f8h		;08b9 Parse hex byte (record length/type)
+	ld b,a			;08bc Store parsed value in B register (byte count)
+	call sub_08efh		;08bd Parse hex address (load destination address)
+	or h			;08c0 Check if address is valid (OR with H register)
+	or b			;08c1 Check if byte count is valid (OR with B register)
+	jr nz,l08cch		;08c2
+	call sub_08efh		;08c4
+	ld a,013h		;08c7
+	jp sub_099dh		;08c9
+l08cch:
+	call sub_08f8h		;08cc
+	add a,b			;08cf
+	add a,l			;08d0
+	add a,h			;08d1
+	ld c,a			;08d2
+	ld de,(011cdh)		;08d3
+	add hl,de			;08d7
+l08d8h:
+	call sub_08f8h		;08d8
+	ld (hl),a			;08db
+	inc hl			;08dc
+	add a,c			;08dd
+	ld c,a			;08de
+	djnz l08d8h		;08df
+	call sub_08f8h		;08e1
+	add a,c			;08e4
+	jr z,l08b2h		;08e5
+	ld c,013h		;08e7
+	call sub_099dh		;08e9
+	jp l02d9h		;08ec
+sub_08efh:
+	call sub_08f8h		;08ef
+	ld h,a			;08f2
+	call sub_08f8h		;08f3
+	ld l,a			;08f6
+	ret			;08f7
+sub_08f8h:
+	push bc			;08f8
+	call sub_0907h		;08f9
+	add a,a			;08fc
+	add a,a			;08fd
+	add a,a			;08fe
+	add a,a			;08ff
+	ld b,a			;0900
+	call sub_0907h		;0901
+	add a,b			;0904
+	pop bc			;0905
+	ret			;0906
+sub_0907h:
+	call sub_0997h		;0907
+	cp 030h		;090a
+	jr c,sub_0907h		;090c
+	cp 03ah		;090e
+	jr c,l0914h		;0910
+	sub 007h		;0912
+l0914h:
+	and 00fh		;0914
+	ret			;0916
+sub_0917h:
+	call sub_0662h		;0917
+	cp 040h		;091a
+	jp z,l06ech		;091c
+	dec hl			;091f
+	ld (011f4h),hl		;0920
+	ret			;0923
+l0924h:
+	call sub_0917h		;0924
+	call sub_0680h		;0927
+	push hl			;092a
+	call sub_0680h		;092b
+	ld c,012h		;092e
+	call sub_099dh				;0930
+	pop de			;0933
+l0934h:
+	push hl			;0934
+
+	ld b,010h		;0935
+	and a			;0937
+	sbc hl,de		;0938
+	jr c,l0970h		;093a
+	ld a,h			;093c
+	and a			;093d
+	jr nz,l0946h		;093e
+	ld a,l			;0940
+	cp b			;0941
+	jr nc,l0946h		;0942
+	ld b,a			;0944
+	inc b			;0945
+l0946h:
+	ex de,hl			;0946
+	ld c,03ah		;0947
+	call sub_099dh		;0949
+	ld a,b			;094c
+	call sub_0985h		;094d
+	add a,h			;0950
+	add a,l			;0951
+	ld c,a			;0952
+	call sub_098ah		;0953
+	sub a			;0956
+	call sub_0985h		;0957
+l095ah:
+	ld a,(hl)			;095a
+	call sub_0985h		;095b
+	add a,c			;095e
+	ld c,a			;095f
+	inc hl			;0960
+	djnz l095ah		;0961
+	ld a,c			;0963
+	neg		;0964
+	call sub_0985h		;0966
+	pop de			;0969
+	ex de,hl			;096a
+	call sub_074dh		;096b
+	jr l0934h		;096e
+l0970h:
+	pop hl			;0970
+	ld c,03ah		;0971
+	call sub_099dh		;0973
+	ld b,00ah		;0976
+	ld c,030h		;0978
+l097ah:
+	call sub_099dh		;097a
+	djnz l097ah		;097d
+	
+	ld c,014h		;097f
+	call sub_099dh		;0981
+	ret			;0984
+sub_0985h:
+	call sub_06c6h		;0985
+	jr l098dh		;0988
+sub_098ah:
+	call sub_06b8h		;098a
+l098dh:
+	push hl			;098d
+	ld hl,(011f2h)		;098e
+	dec hl			;0991
+	ld (011f2h),hl		;0992
+	pop hl			;0995
+	ret			;0996
+sub_0997h:
+	push bc			;0997
+	call l0116h		;0998
+	pop bc			;099b
+	ret			;099c
+sub_099dh:
+	push bc			;099d
+	call sub_0111h		;099e
+	pop bc			;09a1 ; Restore BC register
+	ret			;09a2 ; Return from routine
+;==============================================================================
+; CONTROL CHARACTER HANDLER (0x09A3)
+;==============================================================================
+; Purpose: Process special control characters during input operations
+; This routine intercepts and handles special ASCII control characters that
+; require immediate system response, providing user control over operations.
+;
+; Control Characters Handled:
+; • 0x03 (ETX, Ctrl+C): Emergency system reset/break
+; • 0x13 (XOFF, Ctrl+S): Pause/resume output flow control
+;
+; Character Processing:
+; 1. Call input routine (sub_013ah) to get character
+; 2. Check for zero (no character available)
+; 3. Compare with control character codes
+; 4. Take appropriate action or return
+;
+; Flow Control Features:
+; • Preserves BC register across all operations
+; • Returns immediately if no character or unrecognized character
+; • Provides clean stack management for nested calls
+; • Implements standard terminal control behavior
+;==============================================================================
+sub_09a3h:
+	push bc			;09a3 ; Save BC register
+	call sub_013ah		;09a4 ; Get character from input (keyboard/serial)
+	pop bc			;09a7 ; Restore BC register
+	ret z			;09a8 ; Return if no character available (zero flag set)
+	cp 003h		;09a9 ; Check for ETX (End of Text, Ctrl+C)
+	jr z,l09b6h		;09ab ; Jump to system reset if Ctrl+C pressed
+	cp 013h		;09ad ; Check for XOFF (Ctrl+S, pause)
+	ret nz			;09af ; Return if not XOFF
+	push bc			;09b0 ; Save BC register
+	call l0134h		;09b1 ; Handle XOFF (pause/resume) functionality
+	pop bc			;09b4 ; Restore BC register
+	ret			;09b5 ; Return from XOFF handling
+;==============================================================================
+; SYSTEM RESET/RESTART ROUTINE (0x09B6)
+;==============================================================================
+; Purpose: Emergency system reset triggered by Ctrl+C (ETX) character
+; This routine provides a clean way to abort current operations and return
+; to the monitor command prompt, similar to a "break" or "interrupt" function.
+;
+; Trigger Conditions:
+; • Ctrl+C (0x03 ETX character) received during input processing
+; • User wants to abort current operation and return to monitor
+; • Emergency recovery from hung or problematic operations
+;
+; Reset Actions:
+; 1. Reset stack pointer to system default (0x1400)
+; 2. Jump directly to main monitor command loop
+; 3. Bypass any pending operations or nested calls
+;
+; Technical Details:
+; • Stack Reset: SP = 0x1400 (top of RAM workspace)
+; • Direct Jump: Goes to 0x02CC (main monitor loop entry)
+; • Clean State: Abandons current call stack and variables
+; • User Interface: Provides immediate return to ">" prompt
+;
+; This implements a standard "Ctrl+C break" behavior found in many systems
+; of this era, allowing users to escape from problematic situations.
+;==============================================================================
+l09b6h:
+	ld sp,01400h		;09b6 ; Reset stack pointer to system default
+	jp l02cch		;09b9 ; Jump to main monitor command loop (clean restart)
+	call sub_065eh		;09bc
+	cp 053h		;09bf
+	jp z,l0fbbh		;09c1
+	call sub_0680h		;09c4
+	cp 004h		;09c7 Check if drive number >= 4 (invalid)
+	jp nc,l02d9h		;09c9 Jump to error if invalid drive number
+	ld (01202h),a		;09cc Store valid drive number (0-3)
+	call sub_0680h		;09cf Get next parameter from input
+	cp 002h		;09d2 Check if parameter < 2 (valid range)
+	jp nc,l02d9h		;09d4 Jump to error if parameter >= 2
+	ld (01226h),a		;09d7 Store drive control flags (0 or 1)
+	call sub_0680h		;09da Get next parameter from input
+	cp 04dh		;09dd Check if parameter < 77 (0x4D, max tracks)
+	jp nc,l02d9h		;09df Jump to error if parameter >= 77
+	ld (01225h),a		;09e2 Store drive parameter/selector (track/cylinder)
+	call sub_0680h		;09e5
+	or a			;09e8
+	jp z,l02d9h		;09e9
+	cp 01bh		;09ec
+	jp nc,l02d9h		;09ee
+	ld (01227h),a		;09f1
+	ld a,0ffh		;09f4
+	ld (011f7h),a		;09f6
+	ret			;09f9
+	ld hl,l0db1h		;09fa
+	jr l0a0ah		;09fd
+	call sub_065eh		;09ff
+	cp 04fh		;0a02
+	jp z,l089fh		;0a04
+	ld hl,l0dabh		;0a07
+l0a0ah:
+	ld (011f8h),hl		;0a0a
+	ld hl,011f7h		;0a0d
+	xor a			;0a10
+	cp (hl)			;0a11
+	jp z,l02d9h		;0a12
+	ld (hl),a			;0a15
+	call l0de0h		;0a16
+	call sub_0680h		;0a19
+	push hl			;0a1c
+	call sub_0680h		;0a1d
+	pop de			;0a20
+	ex de,hl			;0a21
+l0a22h:
+	or a			;0a22
+	inc hl			;0a23
+	sbc hl,de		;0a24
+	add hl,de			;0a26
+	dec hl			;0a27
+	ret nc			;0a28
+	ld (01200h),hl		;0a29
+	push de			;0a2c
+	push hl			;0a2d
+	ld hl,(011f8h)		;0a2e
+	call sub_0da8h		;0a31
+	jr nc,l0a60h		;0a34
+	ld hl,01227h		;0a36
+	ld a,(hl)			;0a39
+	inc a			;0a3a
+	ld (hl),a			;0a3b
+	cp 01bh		;0a3c
+	jr c,l0a51h		;0a3e
+	ld (hl),001h		;0a40
+	ld a,(01203h)		;0a42
+	or a			;0a45
+	jr z,l0a4dh		;0a46
+	dec hl			;0a48
+	ld a,(hl)			;0a49
+	xor 001h		;0a4a
+	ld (hl),a			;0a4c
+l0a4dh:
+	jr nz,l0a51h		;0a4d
+	dec hl			;0a4f
+	inc (hl)			;0a50
+l0a51h:
+	ld a,(01203h)		;0a51
+	or a			;0a54
+	ld hl,l0080h		;0a55
+	jr z,l0a5bh		;0a58
+	add hl,hl			;0a5a
+l0a5bh:
+	pop de			;0a5b
+	add hl,de			;0a5c
+	pop de			;0a5d
+	jr l0a22h		;0a5e
+l0a60h:
+	ld hl,l0a69h		;0a60
+	call l00fdh		;0a63
+	jp l02d9h		;0a66
+l0a69h:
+	defb 0x44			;0a69 D
+	defb 0x49			;0a6a I
+	defb 0x53			;0a6b S
+	defb 0x4b			;0a6c K
+	defb 0x20 			;0a6d
+	defb 0x45			;0a6e E
+	defb 0x52			;0a6f R
+	defb 0x52			;0a70 R
+	defb 0x0d			;0a71 RETURN
+	defb 0x0a			;0a72 RETURN
+	defb 0x00			;0a73
+l0a74h:
+	call sub_0680h		;0a74 Get drive number parameter from user input
+	cp 004h		;0a77 Check if drive number >= 4 (invalid)
+	jp nc,l02d9h		;0a79 Jump to error if invalid drive number
+	ld (01202h),a		;0a7c Store current drive number (0-3)
+	call sub_0e43h		;0a7f Execute drive operation
+	jp nc,l0a60h		;0a82
+	ret			;0a85
+l0a86h:
+	call sub_0acbh		;0a86
+	jp nc,l0a60h		;0a89
+	ret			;0a8c
+;==============================================================================
+; FLOPPY DISK CONTROLLER INITIALIZATION (0x0A8D)
+;==============================================================================
+; Purpose: Initialize NEC µPD765A floppy disk controller and Z80 DMA
+; Hardware Setup:
+; - Port 0xF6: FDC command/status register
+; - Port 0xF3: Z80 DMA control register (standalone Z80 DMA chip)
+; - Port 0xF0: FDC main status register
+; - Port 0xF4: FDC data register
+;
+; Z80 DMA Operations:
+; - Value 0x08: Enable Z80 DMA for floppy transfers
+; - Clear bit 3: Modify DMA transfer mode parameters
+; - Two-stage DMA setup for optimal transfer configuration
+;
+; Operation:
+; 1. Send "specify" command to FDC (configure timing parameters)
+; 2. Enable Z80 DMA controller for high-speed transfers
+; 3. Modify DMA transfer mode settings
+; 4. Wait for FDC ready status
+; 5. Configure for read/write operations
+;
+; Returns: Carry flag set if successful, clear if failed
+;==============================================================================
+sub_0a8dh:
+	ld a,003h		;0a8d ; Load FDC "specify" command
+	out (0f6h),a		;0a8f ; Send command to FDC command register
+	ld a,008h		;0a91 ; Load Z80 DMA enable control value
+	out (0f3h),a		;0a93 ; Enable Z80 DMA for floppy operations
+	res 3,a		;0a95 ; Clear bit 3 (modify DMA transfer mode)
+	out (0f3h),a		;0a97 ; Update Z80 DMA control register
+	ld bc,sub_011ch		;0a99 ; Load timeout/delay parameters
+	call sub_0f0ah		;0a9c ; Call delay/timing routine
+	ld bc,l0000h		;0a9f ; Initialize counter for FDC status polling
+;==============================================================================
+; FDC STATUS POLLING LOOP (0x0AA2)
+;==============================================================================
+; Purpose: Wait for FDC to become ready for command execution
+; This is a critical timing loop that ensures the NEC µPD765A FDC is ready
+; to accept commands before proceeding with disk operations.
+;
+; Hardware Details:
+; - Port 0xF0: NEC µPD765A Main Status Register (MSR)
+; - Bit 7 of MSR: RQM (Request for Master) - indicates FDC ready state
+; - Timeout: 65536 iterations (BC=0x0000 decrements to 0xFFFF then 0x0000)
+;
+; Status Register Interpretation:
+; - MSR bit 7 = 1: FDC ready to accept commands/data
+; - MSR bit 7 = 0: FDC busy, continue polling
+; - Expected final state: MSR = 0x80 (only RQM bit set)
+;
+; Returns:
+; - Zero flag set: Timeout occurred (FDC never became ready)
+; - Zero flag clear: FDC ready, A contains final status
+; - A = 0x00: Success (MSR was exactly 0x80)
+; - A ≠ 0x00: Warning (MSR had unexpected bits set)
+;==============================================================================
+l0aa2h:
+	dec bc			;0aa2 ; Decrement timeout counter
+	ld a,b			;0aa3 ; Load high byte of counter
+	or c			;0aa4 ; OR with low byte to test for zero
+	ret z			;0aa5 ; Return if timeout (BC reached 0x0000)
+	in a,(0f0h)		;0aa6 ; Read FDC Main Status Register
+	bit 7,a		;0aa8 ; Test RQM bit (Request for Master)
+	jr z,l0aa2h		;0aaa ; Loop if FDC not ready (RQM=0)
+	xor 080h		;0aac ; XOR with 0x80 to check if only RQM bit set
+	ret nz			;0aae ; Return if other status bits are set (error condition)
+;==============================================================================
+; FDC COMMAND EXECUTION SETUP (0x0AAF)
+;==============================================================================
+; Purpose: Execute FDC commands and wait for completion status
+; This section handles the command execution phase after the FDC is ready.
+; It coordinates with the NEC µPD765A to execute disk operations.
+;
+; Operation Flow:
+; 1. Call command execution routine (sub_0ba7h)
+; 2. Wait for command completion (status 0x80)
+; 3. Setup interrupt vector for DMA completion
+; 4. Configure DMA parameters for data transfer
+;
+; Hardware Configuration:
+; - Port 0xF4: FDC data register for parameter passing
+; - Port 0xF6: FDC command register
+; - Memory 0x1334: Interrupt vector table pointer
+; - Address 0x0BB6: DMA completion handler
+;
+; Status Codes:
+; - 0x80: Command execution successful, ready for data transfer
+; - Other: Command still executing or error condition
+;==============================================================================
+l0aafh:
+	call sub_0ba7h		;0aaf ; Execute FDC command sequence
+	ret nc			;0ab2 ; Return if command execution failed
+	cp 080h		;0ab3 ; Check if execution status is 0x80 (success)
+	jr nz,l0aafh		;0ab5 ; Loop until command completes successfully
+	ld hl,l0bb6h		;0ab7 ; Load address of DMA completion handler
+	ld (01334h),hl		;0aba ; Store in interrupt vector table
+	ld a,030h		;0abd ; Load DMA control parameter
+	out (0f4h),a		;0abf ; Send to FDC data register
+	ld a,0d7h		;0ac1 ; Load FDC command parameter
+	out (0f6h),a		;0ac3 ; Send command to FDC
+	ld a,001h		;0ac5 ; Load final parameter
+	out (0f6h),a		;0ac7 ; Complete command sequence
+	scf			;0ac9 ; Set carry flag (success indicator)
+	ret			;0aca ; Return with success status
+;==============================================================================
+; FLOPPY DISK CONTROLLER MASTER ROUTINE (0x0ACB)
+;==============================================================================
+; Purpose: Main floppy disk operation coordinator
+; Calls sub-routines to:
+; 1. Initialize FDC and prepare for disk operations (sub_0a8dh)
+; 2. Execute disk read/write operations (sub_0ae9h) 
+; 3. Loop through multiple drives/sectors (0x0AD8 loop)
+;
+; This appears to be the high-level disk I/O interface that coordinates
+; multiple disk operations across different drives (up to 4 drives/sectors)
+;==============================================================================
+sub_0acbh:
+	call sub_0a8dh		;0acb ; Initialize FDC hardware and prepare for operation
+	ret nc			;0ace ; Return if FDC initialization failed
+	call sub_0ae9h		;0acf ; Execute the actual disk operation
+	ret nc			;0ad2
+	xor a			;0ad3 A = 0 (start with drive 0)
+	ld iy,01205h		;0ad4 Point IY to drive status table
+l0ad8h:					; Multi-drive boot loop (tries drives 0,1,2,3)
+	push af			;0ad8 Save current drive number
+	ld (01202h),a		;0ad9 Set current drive number (0x1202)
+	call sub_0b1ch		;0adc Attempt to read boot sector from current drive
+	pop af			;0adf Restore drive number
+	inc iy		;0ae0 Move to next drive status entry
+	inc a			;0ae2 Next drive number (0→1→2→3)
+	cp 004h		;0ae3 Check if tried all 4 drives
+	jr nz,l0ad8h		;0ae5 Loop until all drives tested
+	scf			;0ae7 Set carry flag (success)
+	ret			;0ae8 Return from multi-drive scan
+;==============================================================================
+; FDC COMMAND PARAMETER SETUP (0x0AE9)
+;==============================================================================
+; Purpose: Prepare NEC µPD765A command parameters for disk operations
+; This routine builds the command parameter block required by the FDC to
+; execute read/write operations. The parameters are assembled from various
+; system variables and formatted according to NEC µPD765A specifications.
+;
+; Memory Layout - FDC Parameter Block (0x1213-0x1215):
+; • 0x1213: Command byte (0x03 = READ DATA command)
+; • 0x1214: Drive/Head selection and DMA control
+; • 0x1215: Track/Sector/Size parameters
+;
+; Parameter Sources:
+; • 0x120B: Drive geometry configuration (tracks, density)
+; • 0x120A: Head selection and DMA mode settings  
+; • 0x1209: Sector size and format parameters
+; • 0x1204: Additional drive control flags
+;
+; NEC µPD765A Command Format:
+; - Bit manipulation ensures proper head selection and DMA modes
+; - Rotation and masking operations format multi-bit parameters
+; - Command block follows standard FDC command structure
+;==============================================================================
+sub_0ae9h:
+	ld hl,01213h		;0ae9 ; Point to FDC command parameter block
+	push hl			;0aec ; Save base pointer for later use
+	ld (hl),003h		;0aed ; Set command byte: 0x03 = READ DATA command
+	inc hl			;0aef ; Move to drive/head parameter byte (0x1214)
+	ld a,(0120bh)		;0af0 ; Load drive geometry configuration
+	and 00fh		;0af3 ; Mask to get lower 4 bits (drive geometry)
+	sub 011h		;0af5 ; Subtract 0x11 (adjust for FDC format)
+	cpl			;0af7 ; Complement bits (invert for FDC encoding)
+	rlca			;0af8 ; Rotate left 4 positions to place in upper nibble
+	rlca			;0af9 ; (4 rotations = shift left 4 bits)
+	rlca			;0afa
+	rlca			;0afb
+	ld (hl),a			;0afc ; Store formatted drive parameter
+	ld a,(0120ah)		;0afd ; Load head selection and DMA mode
+	rrca			;0b00 ; Rotate right 4 positions to get lower nibble
+	rrca			;0b01 ; (4 rotations = shift right 4 bits)
+	rrca			;0b02
+	rrca			;0b03
+	and 00fh		;0b04 ; Mask to keep only lower 4 bits
+	or (hl)			;0b06 ; Combine with previous drive parameter
+	ld (hl),a			;0b07 ; Store combined drive/head parameter
+	inc hl			;0b08 ; Move to track/sector parameter byte (0x1215)
+	ld a,(01209h)		;0b09 ; Load sector size and format configuration
+	res 0,a		;0b0c ; Clear bit 0 (modify sector size encoding)
+	ld (hl),a			;0b0e ; Store modified sector parameter
+	ld a,(01204h)		;0b0f ; Load additional drive control flags
+	and 001h		;0b12 ; Mask to get only bit 0 (specific control flag)
+	or (hl)			;0b14 ; Combine with sector parameter
+	ld (hl),a			;0b15 ; Store final track/sector/control parameter
+	ld b,003h		;0b16 ; Set parameter count: 3 bytes for FDC command
+	pop hl			;0b18 ; Restore base pointer to command block
+	jp l0b64h		;0b19 ; Jump to FDC command execution routine
+;==============================================================================
+; FDC OPERATION WITH PARAMETER MANAGEMENT (0x0B1C)
+;==============================================================================
+; Purpose: Execute FDC operations with automatic parameter backup/restore
+; This routine provides a higher-level interface for disk operations that
+; temporarily modifies drive parameters and ensures they are properly restored
+; even if the operation fails.
+;
+; Operation Flow:
+; 1. Prepare FDC for operation (sub_0b33h)
+; 2. Backup current drive parameter (0x1225)
+; 3. Set temporary parameter (0x03) for operation
+; 4. Execute disk operation (sub_0c05h)
+; 5. Restore original parameter regardless of operation result
+; 6. Verify FDC is ready for next operation
+;
+; Memory Locations:
+; • 0x1225: Drive parameter/selector register (backed up and restored)
+; • Value 0x03: Temporary parameter setting for this operation type
+;
+; Error Handling:
+; - Parameters are restored even if disk operation fails
+; - Final FDC readiness check before returning
+; - Carry flag indicates overall operation success
+;==============================================================================
+sub_0b1ch:
+	call sub_0b33h		;0b1c ; Prepare FDC for operation
+	ld a,(01225h)		;0b1f ; Load current drive parameter
+	push af			;0b22 ; Save parameter on stack for restoration
+	ld a,003h		;0b23 ; Load temporary parameter value
+	ld (01225h),a		;0b25 ; Set temporary drive parameter
+	call sub_0c05h		;0b28 ; Execute disk operation
+	pop af			;0b2b ; Restore original parameter from stack
+	ld (01225h),a		;0b2c ; Write back original drive parameter
+	call sub_0b33h		;0b2f ; Verify FDC readiness after operation
+	ret c			;0b32 ; Return if FDC is ready (carry set = success)
+;==============================================================================
+; FDC RECALIBRATE AND COMMAND SETUP (0x0B33)
+;==============================================================================
+; Purpose: Prepare FDC for operation with recalibrate command and status monitoring
+; This routine initializes the FDC to a known state and sets up a recalibrate
+; command for reliable disk operations. Used both before and after disk operations
+; to ensure the drive heads are properly positioned.
+;
+; Operation Sequence:
+; 1. Set drive status to 0xFF (reset/initialize state)
+; 2. Execute low-level FDC preparation (sub_0d2eh)
+; 3. Clear status flags and setup command parameters
+; 4. Configure RECALIBRATE command (0x07) with drive parameters
+; 5. Wait for command completion with timeout monitoring
+;
+; Hardware Details:
+; • IY register: Points to drive status table (set by caller)
+; • 0x1226: Drive control flags cleared during operation
+; • 0x1213: Command byte set to 0x07 (RECALIBRATE command)
+; • 0x124A: Operation completion status flag
+;
+; NEC µPD765A RECALIBRATE Command:
+; - Moves drive head to track 0 (cylinder 0)
+; - Establishes known reference position for subsequent seeks
+; - Required after drive selection or power-on sequences
+;==============================================================================
+sub_0b33h:
+	ld (iy+000h),0ffh		;0b33 ; Set drive status to 0xFF (initialize state)
+	call sub_0d2eh		;0b37 ; Execute low-level FDC preparation routine
+	ret nc			;0b3a ; Return if FDC preparation failed (carry clear)
+	xor a			;0b3b ; Load 0 into accumulator
+	ld (01226h),a		;0b3c ; Clear drive control flags
+	ld hl,01213h		;0b3f ; Point to FDC command parameter block
+	push hl			;0b42 ; Save command block pointer
+	ld (hl),007h		;0b43 ; Set command byte: 0x07 = RECALIBRATE command
+	inc hl			;0b45 ; Move to next parameter byte
+	call sub_0b7bh		;0b46 ; Setup additional command parameters
+	xor a			;0b49 ; Load 0 into accumulator
+	ld (0124ah),a		;0b4a ; Clear operation completion status flag
+	ld b,002h		;0b4d ; Set parameter count: 2 bytes for RECALIBRATE command
+	pop hl			;0b4f ; Restore command block pointer
+	call l0b64h		;0b50 ; Send command to FDC
+	ret nc			;0b53 ; Return if command transmission failed
+;==============================================================================
+; RECALIBRATE COMPLETION MONITORING (0x0B54)
+;==============================================================================
+; Purpose: Wait for RECALIBRATE command completion with status validation
+; Monitors the operation completion flag and validates the final status to
+; ensure the recalibrate operation completed successfully.
+;
+; Status Monitoring:
+; • 0x124A: Operation completion flag (0=pending, non-zero=completed)
+; • Expected completion status: 0x20 (recalibrate successful)
+; • Status mask 0xF8: Checks upper 5 bits for error conditions
+;
+; Returns:
+; • Carry set: RECALIBRATE completed successfully, drive ready
+; • Carry clear: RECALIBRATE failed or timeout occurred
+;==============================================================================
+l0b54h:
+	ld a,(0124ah)		;0b54 ; Read operation completion status
+	or a			;0b57 ; Test if operation completed (non-zero)
+	jr z,l0b54h		;0b58 ; Loop until completion flag is set
+	and 0f8h		;0b5a ; Mask upper 5 bits to check for errors
+	xor 020h		;0b5c ; Compare with expected success status (0x20)
+	ret nz			;0b5e ; Return with carry clear if not successful
+	ld (iy+000h),a		;0b5f ; Store final status (0x00) in drive status
+	scf			;0b62 ; Set carry flag (operation successful)
+	ret			;0b63 ; Return with success status
+
+;==============================================================================
+; FLOPPY CONTROLLER I/O TRANSMITTER (0x0B64)
+;==============================================================================
+; Purpose: Send command bytes to floppy controller via I/O ports
+; Input: HL = pointer to command buffer, B = byte count, C = 0xF1 (data port)
+;
+; Function:
+; - Waits for floppy controller ready (port 0xF0 status bits 0-4 clear)
+; - Polls bit 7 of status port 0xF0 for command ready signal
+; - Checks bit 6 for transfer direction/error condition  
+; - Uses OUTI instruction to send bytes from buffer to port 0xF1
+; - Continues until all B bytes transmitted
+;
+; Ports Used:
+; - 0xF0: Floppy controller status register
+;   - Bit 7: Command ready flag
+;   - Bit 6: Direction/error flag  
+;   - Bits 0-4: Various status conditions
+; - 0xF1: Floppy controller data register (via register C)
+;
+; Returns: Carry set on success, clear on error
+;==============================================================================
+l0b64h:
+	ld c,0f1h		;0b64
+l0b66h:
+	in a,(0f0h)		;0b66
+	and 01fh		;0b68
+	jr nz,l0b66h		;0b6a
+l0b6ch:
+	in a,(0f0h)		;0b6c
+	bit 7,a		;0b6e
+	jr z,l0b6ch		;0b70
+	and 040h		;0b72
+	ret nz			;0b74
+	outi		;0b75
+	jr nz,l0b6ch		;0b77
+	scf			;0b79
+	ret			;0b7a
+
+;==============================================================================
+; FLOPPY COMMAND PARAMETER BUILDER (0x0B7B)
+;==============================================================================
+; Purpose: Build drive and head selection parameters for floppy commands
+; Input: HL = pointer to command buffer (pointing to parameter byte location)
+;
+; Function:
+; - Reads drive selection from 0x1226, rotates left twice (bits 6-7 → bits 0-1)
+; - Combines with head selection from 0x1202  
+; - Stores combined drive/head parameter in command buffer
+; - Advances buffer pointer for next parameter
+;
+; Parameter Format:
+; - Bits 0-1: Drive number (from 0x1226 bits 6-7)
+; - Other bits: Head selection and flags (from 0x1202)
+;
+; Memory Locations:
+; - 0x1226: Drive selection (bits 6-7 used)
+; - 0x1202: Head selection and other flags
+;==============================================================================
+sub_0b7bh:
+	ld a,(01226h)		;0b7b
+	rlca			;0b7e
+	rlca			;0b7f
+	ld (hl),a			;0b80
+	ld a,(01202h)		;0b81
+	or (hl)			;0b84
+	ld (hl),a			;0b85
+	inc hl			;0b86
+	ret			;0b87
+
+;==============================================================================
+; FLOPPY CONTROLLER RESPONSE READER (0x0B88)
+;==============================================================================
+; Purpose: Read response bytes from floppy controller after command execution
+; 
+; Function:
+; - Sets up response buffer at 0x121C
+; - Uses port 0xF1 for data input (via register C)
+; - Implements timeout loop (B=0x0A iterations)
+; - Polls port 0xF0 status register:
+;   - Bit 4: Data ready flag
+;   - Bit 7: Controller ready flag  
+;   - Bit 6: Direction/completion flag
+; - Uses INI instruction to read bytes from port 0xF1 to buffer
+; - Returns first response byte and sets carry on success
+;
+; Timeout Handling:
+; - 10-iteration outer loop for timeout protection
+; - Inner delay loop for timing control
+; - Returns with carry clear on timeout
+;
+; Returns: A = first response byte, Carry = success flag
+;==============================================================================
+l0b88h:
+	ld hl,0121ch		;0b88
+	ld c,0f1h		;0b8b
+l0b8dh:
+	ld b,00ah		;0b8d
+l0b8fh:
+	djnz l0b8fh		;0b8f
+l0b91h:
+	in a,(0f0h)		;0b91
+	bit 4,a		;0b93
+	jr z,l0ba2h		;0b95
+	bit 7,a		;0b97
+	jr z,l0b91h		;0b99
+	and 040h		;0b9b
+	ret z			;0b9d
+	ini		;0b9e
+	jr l0b8dh		;0ba0
+l0ba2h:
+	ld a,(0121ch)		;0ba2
+	scf			;0ba5
+	ret			;0ba6
+sub_0ba7h:
+	ld hl,01213h		;0ba7
+	ld (hl),008h		;0baa
+	ld bc,001f1h		;0bac
+	call l0b6ch		;0baf
+	ret nc			;0bb2
+	jp l0b88h		;0bb3
+l0bb6h:
+	push af			;0bb6
+	push hl			;0bb7
+	push bc			;0bb8
+	push de			;0bb9
+l0bbah:
+	in a,(0f0h)		;0bba
+	bit 7,a		;0bbc
+	jr z,l0bbah		;0bbe
+	bit 6,a		;0bc0
+	jr z,l0bd9h		;0bc2
+	ld a,083h		;0bc4
+	out (0fch),a		;0bc6
+	ld (0124bh),a		;0bc8
+	call l0b88h		;0bcb
+	ld hl,0121ch		;0bce
+	ld de,0120ch		;0bd1
+	ld bc,00007h		;0bd4
+	ldir		;0bd7
+l0bd9h:
+	call sub_0ba7h		;0bd9
+	jr nc,l0bebh		;0bdc
+	cp 080h		;0bde
+	jr z,l0bebh		;0be0
+	bit 5,a		;0be2
+	jr z,l0bd9h		;0be4
+	ld (0124ah),a		;0be6
+	jr l0bd9h		;0be9
+l0bebh:
+	pop de			;0beb
+	pop bc			;0bec
+	pop hl			;0bed
+	pop af			;0bee
+	ei			;0bef
+	reti		;0bf0
+
+;==============================================================================
+; FLOPPY CONTROLLER COMMAND SENDER (0x0BF2)
+;==============================================================================
+; Purpose: Send command 0x04 to floppy disk controller and read response
+;
+; Function:
+; - Sets up command buffer at 0x1213 with command 0x04
+; - Calls sub_0b7bh to add drive/head parameters 
+; - Calls l0b64h to transmit command via ports 0xF0/0xF1
+; - Returns status in accumulator for caller processing
+;
+; Command 0x04: Likely "Read Status" or "Sense Drive Status" command
+; Buffer: 0x1213 = command, 0x1214+ = parameters
+; I/O Ports: 0xF0 (status check), 0xF1 (data transfer)
+;==============================================================================
+sub_0bf2h:
+	ld hl,01213h		;0bf2
+	push hl			;0bf5
+	ld (hl),004h		;0bf6
+	inc hl			;0bf8
+	call sub_0b7bh		;0bf9
+	pop hl			;0bfc
+	ld b,002h		;0bfd
+	call l0b64h		;0bff
+	jp l0b88h		;0c02
+sub_0c05h:
+	call sub_0d2eh		;0c05
+	ret nc			;0c08
+	ld hl,01213h		;0c09
+	push hl			;0c0c
+	ld (hl),00fh		;0c0d
+	inc hl			;0c0f
+	call sub_0b7bh		;0c10
+	ld a,(01225h)		;0c13
+	ld (hl),a			;0c16
+	xor a			;0c17
+	ld (0124ah),a		;0c18
+	pop hl			;0c1b
+	ld b,003h		;0c1c
+	call l0b64h		;0c1e
+	ret nc			;0c21
+l0c22h:
+	ld a,(0124ah)		;0c22
+	or a			;0c25
+	jr z,l0c22h		;0c26
+	and 0f8h		;0c28
+	xor 020h		;0c2a
+	ret nz			;0c2c
+	scf			;0c2d
+	ret			;0c2e
+l0c2fh:
+	ld a,006h		;0c2f
+	jr l0c35h		;0c31
+l0c33h:
+	ld a,005h		;0c33
+l0c35h:
+	ld hl,01223h		;0c35
+	ld (hl),a			;0c38
+	ld a,(01204h)		;0c39
+	or a			;0c3c
+	ret nz			;0c3d
+	call sub_0c6ah		;0c3e
+	call sub_0b7bh		;0c41
+	call sub_0c73h		;0c44
+	call sub_0d2eh		;0c47
+	ret nc			;0c4a
+	call sub_0ca0h		;0c4b
+	call sub_0cc5h		;0c4e
+	xor a			;0c51
+	ld (0124bh),a		;0c52
+	ld hl,01223h		;0c55
+	ld b,009h		;0c58
+	call l0b64h		;0c5a
+	ret nc			;0c5d
+	call sub_0d11h		;0c5e
+	ret nc			;0c61
+	ld a,(0120ch)		;0c62
+	and 0c0h		;0c65
+	ret nz			;0c67
+	scf			;0c68
+	ret			;0c69
+sub_0c6ah:
+	ld a,(01203h)		;0c6a
+	rrca			;0c6d
+	rrca			;0c6e
+	or (hl)			;0c6f
+	ld (hl),a			;0c70
+	inc hl			;0c71
+	ret			;0c72
+sub_0c73h:
+	ld hl,l0c90h		;0c73
+	ld de,01228h		;0c76
+	jr l0c81h		;0c79
+sub_0c7bh:
+	ld hl,l0c98h		;0c7b
+	ld de,01215h		;0c7e
+l0c81h:
+	ld a,(01203h)		;0c81
+	add a,a			;0c84
+	add a,a			;0c85
+	ld c,a			;0c86
+	ld b,000h		;0c87
+	add hl,bc			;0c89
+	ld bc,00004h		;0c8a
+	ldir		;0c8d
+	ret			;0c8f
+l0c90h:
+	nop			;0c90
+	ld a,(de)			;0c91
+	rlca			;0c92
+	add a,b			;0c93
+	ld bc,l0e1ah		;0c94
+	rst 38h			;0c97
+l0c98h:
+	nop			;0c98
+	ld a,(de)			;0c99
+	dec de			;0c9a
+	push hl			;0c9b
+	ld bc,0361ah		;0c9c
+	push hl			;0c9f
+sub_0ca0h:
+	ld a,(01203h)		;0ca0
+	inc a			;0ca3
+	ld d,a			;0ca4
+	ld e,080h		;0ca5
+	jr l0cadh		;0ca7
+sub_0ca9h:
+	ld d,001h		;0ca9
+	ld e,068h		;0cab
+l0cadh:
+	ld c,0f4h		;0cad
+	ld a,047h		;0caf
+	out (c),a		;0cb1
+	out (c),d		;0cb3
+	inc c			;0cb5
+	ld a,057h		;0cb6
+	out (c),a		;0cb8
+	out (c),e		;0cba
+	ret			;0cbc
+sub_0cbdh:
+	ld hl,00068h		;0cbd
+	ld a,(01213h)		;0cc0
+	jr l0cd2h		;0cc3
+sub_0cc5h:
+	ld hl,l0080h		;0cc5
+	ld a,(01203h)		;0cc8
+	or a			;0ccb
+	jr z,l0ccfh		;0ccc
+	add hl,hl			;0cce
+l0ccfh:
+	ld a,(01223h)		;0ccf
+l0cd2h:
+	dec hl			;0cd2
+	push hl			;0cd3
+	ld hl,l0cfbh		;0cd4
+	ld de,0122ch		;0cd7
+	ld bc,00016h		;0cda
+	ldir		;0cdd
+	pop hl			;0cdf
+	ld (01235h),hl		;0ce0
+	ld hl,(01200h)		;0ce3
+	ld (01233h),hl		;0ce6
+	and 001h		;0ce9
+	rlca			;0ceb
+	rlca			;0cec
+	ld hl,0123eh		;0ced
+	or (hl)			;0cf0
+	ld (hl),a			;0cf1
+	ld hl,0122ch		;0cf2
+	ld bc,016fch		;0cf5
+	otir		;0cf8
+	ret			;0cfa
+l0cfbh:
+	jp 0c3c3h		;0cfb
+	jp 0c3c3h		;0cfe
+	ld a,c			;0d01
+	nop			;0d02
+	nop			;0d03
+	nop			;0d04
+	nop			;0d05
+	inc d			;0d06
+	jr z,$-121		;0d07
+	jp p,08382h		;0d09
+	rst 8			;0d0c
+	ld bc,0cf83h		;0d0d
+	add a,a			;0d10
+sub_0d11h:
+	ld bc,l0000h		;0d11
+l0d14h:
+	ld a,(0124bh)		;0d14
+	or a			;0d17
+	scf			;0d18
+	ret nz			;0d19
+	ld a,(0124bh)		;0d1a
+	or a			;0d1d
+	scf			;0d1e
+	ret nz			;0d1f
+	djnz l0d14h		;0d20
+	dec c			;0d22
+	jr nz,l0d14h		;0d23
+	ld a,083h		;0d25
+	out (0fch),a		;0d27
+	call sub_0a8dh		;0d29
+	or a			;0d2c
+	ret			;0d2d
+sub_0d2eh:
+	call sub_0bf2h		;0d2e
+	ret nc			;0d31
+	and 020h		;0d32
+	ret z			;0d34
+	scf			;0d35
+	ret			;0d36
+sub_0d37h:
+	call sub_0d2eh		;0d37
+	ret nc			;0d3a
+	ld b,002h		;0d3b
+l0d3dh:
+	push bc			;0d3d
+	call sub_0c05h		;0d3e
+	pop bc			;0d41
+	ld a,(01225h)		;0d42
+	ld (iy+000h),a		;0d45
+	ret c			;0d48
+	push bc			;0d49
+	call sub_0b1ch		;0d4a
+	pop bc			;0d4d
+	ret nc			;0d4e
+	ld hl,(01244h)		;0d4f
+	inc hl			;0d52
+	ld (01244h),hl		;0d53
+	djnz l0d3dh		;0d56
+	or a			;0d58
+	ret			;0d59
+l0d5ah:
+	call sub_0bf2h		;0d5a
+	xor 020h		;0d5d
+	and 060h		;0d5f
+	ret nz			;0d61
+	ld hl,l0c33h		;0d62
+	jr l0d6eh		;0d65
+l0d67h:
+	call sub_0d2eh		;0d67
+	ret nc			;0d6a
+	ld hl,l0c2fh		;0d6b
+l0d6eh:
+	ld b,005h		;0d6e
+l0d70h:
+	push bc			;0d70
+	push hl			;0d71
+	call sub_0da8h		;0d72
+	pop hl			;0d75
+	pop bc			;0d76
+	ret c			;0d77
+	push hl			;0d78
+	ld a,(0120dh)		;0d79
+	and 085h		;0d7c
+	jr z,l0d87h		;0d7e
+	ld hl,(01246h)		;0d80
+	inc hl			;0d83
+	ld (01246h),hl		;0d84
+l0d87h:
+	ld a,(0120dh)		;0d87
+	and 020h		;0d8a
+	jr z,l0d95h		;0d8c
+	ld hl,(01248h)		;0d8e
+	inc hl			;0d91
+	ld (01248h),hl		;0d92
+l0d95h:
+	ld a,(0120eh)		;0d95
+	and 012h		;0d98
+	jr z,l0da3h		;0d9a
+	ld hl,(01244h)		;0d9c
+	inc hl			;0d9f
+	ld (01244h),hl		;0da0
+l0da3h:
+	pop hl			;0da3
+	djnz l0d70h		;0da4
+	or a			;0da6
+	ret			;0da7
+sub_0da8h:
+	jp (hl)			;0da8
+sub_0da9h:
+	jp (ix)		;0da9
+l0dabh:
+	ld ix,l0d67h		;0dab
+	jr l0db5h		;0daf
+l0db1h:
+	ld ix,l0d5ah		;0db1
+l0db5h:
+	ld iy,01205h		;0db5
+	ld b,002h		;0db9
+	ld a,(01202h)		;0dbb
+	ld e,a			;0dbe
+	ld d,000h		;0dbf
+	add iy,de		;0dc1
+	ld a,(01225h)		;0dc3
+	cp (iy+000h)		;0dc6
+	jr z,l0dd1h		;0dc9
+l0dcbh:
+	push bc			;0dcb
+	call sub_0d37h		;0dcc
+	pop bc			;0dcf
+	ret nc			;0dd0
+l0dd1h:
+	push bc			;0dd1
+	call sub_0da9h		;0dd2
+	pop bc			;0dd5
+	ret c			;0dd6
+	push bc			;0dd7
+	call sub_0b1ch		;0dd8
+	pop bc			;0ddb
+	djnz l0dcbh		;0ddc
+	or a			;0dde
+	ret			;0ddf
+
+;==============================================================================
+; FLOPPY DISK STATUS CHECK ROUTINE (0x0DE0)
+;==============================================================================
+; Purpose: Check floppy disk controller status and extract specific status bit
+; Entry Point: l0de0h - Called from interrupt vector 0x000B and multiple locations
+; 
+; Function:
+; - Sends status command (0x04) to floppy controller via ports 0xF0/0xF1
+; - Reads back status response from floppy controller
+; - Extracts bit 3 from status (rotated to bit 0) 
+; - Stores extracted bit at memory location 0x1203
+;
+; Status bit extracted (original bit 3) likely indicates:
+; - Drive ready condition, Track 0 detection, Write protect, or Index pulse
+;
+; Used as: Interrupt service routine and general floppy status check
+; Ports: 0xF0 (status), 0xF1 (data), 0xFC (control)
+;==============================================================================
+l0de0h:
+	call sub_0bf2h		;0de0
+	rrca			;0de3
+	rrca			;0de4
+	rrca			;0de5
+	and 001h		;0de6
+	ld (01203h),a		;0de8
+	ret			;0deb
+sub_0dech:
+	call sub_0d2eh		;0dec
+	ret nc			;0def
+	ld hl,01213h		;0df0
+	ld (hl),00dh		;0df3
+	call sub_0c6ah		;0df5
+	call sub_0b7bh		;0df8
+	call sub_0e1fh		;0dfb
+	call sub_0ca9h		;0dfe
+	call sub_0cbdh		;0e01
+	xor a			;0e04
+	ld (0124bh),a		;0e05
+	ld hl,01213h		;0e08
+	ld b,006h		;0e0b
+	call l0b64h		;0e0d
+	ret nc			;0e10
+l0e11h:
+	ld a,(0124bh)		;0e11
+	or a			;0e14
+	jr z,l0e11h		;0e15
+	ld a,(0120ch)		;0e17
+l0e1ah:
+	and 0c0h		;0e1a
+	ret nz			;0e1c
+	scf			;0e1d
+	ret			;0e1e
+sub_0e1fh:
+	call sub_0c7bh		;0e1f
+	ld a,(01203h)		;0e22
+	ld e,a			;0e25
+	ld a,(01226h)		;0e26
+	ld c,a			;0e29
+	ld a,(01225h)		;0e2a
+	ld d,001h		;0e2d
+	ld b,01ah		;0e2f
+	ld hl,01000h		;0e31
+	ld (01200h),hl		;0e34
+l0e37h:
+	ld (hl),a			;0e37
+	inc hl			;0e38
+	ld (hl),c			;0e39
+	inc hl			;0e3a
+	ld (hl),d			;0e3b
+	inc hl			;0e3c
+	ld (hl),e			;0e3d
+	inc hl			;0e3e
+	inc d			;0e3f
+	djnz l0e37h		;0e40
+	ret			;0e42
+sub_0e43h:
+	call sub_0bf2h		;0e43
+	xor 020h		;0e46
+	and 060h		;0e48
+	ret nz			;0e4a
+	call l0de0h		;0e4b
+	ld iy,01205h		;0e4e
+	ld a,(01202h)		;0e52
+	ld e,a			;0e55
+	ld d,000h		;0e56
+	add iy,de		;0e58
+	call sub_0b1ch		;0e5a
+	ret nc			;0e5d
+	xor a			;0e5e
+	ld (01225h),a		;0e5f
+l0e62h:
+	call sub_0c05h		;0e62
+	ret nc			;0e65
+	xor a			;0e66
+	ld (01226h),a		;0e67
+	call sub_0dech		;0e6a
+	ret nc			;0e6d
+	ld a,(01203h)		;0e6e
+	or a			;0e71
+	jr z,l0e7bh		;0e72
+	ld (01226h),a		;0e74
+	call sub_0dech		;0e77
+	ret nc			;0e7a
+l0e7bh:
+	ld a,(01225h)		;0e7b
+	inc a			;0e7e
+	ld (01225h),a		;0e7f
+	cp 04dh		;0e82
+	jr c,l0e62h		;0e84
+	jp sub_0b1ch		;0e86
+sub_0e89h:
+	call sub_0ea2h		;0e89
+	call nz,sub_0f6bh		;0e8c
+	call sub_0ecch		;0e8f
+	call nz,sub_0f70h		;0e92
+	call sub_0a8dh		;0e95
+	call nc,sub_0f75h		;0e98
+	call sub_0f10h		;0e9b
+	call nz,sub_0f7ah		;0e9e
+	ret			;0ea1
+
+;==============================================================================
+; RAM MEMORY DIAGNOSTIC TEST (0x0EA2)
+;==============================================================================
+; Purpose: Test available RAM and detect memory boundaries  
+; Tests RAM starting from 0x1400 (above 1KB base RAM) to find additional memory
+; 
+; Memory Layout:
+; - 0x0000-0x0FFF: EPROM
+; - 0x1000-0x13FF: Base 1KB RAM (1024 bytes)
+; - 0x1400+: Extended RAM (if present) or memory-mapped I/O
+;
+; Test Method:
+; - Starts at 0x1400 (beyond base 1KB RAM)
+; - Tests each location with multiple bit patterns
+; - Continues until test fails (indicating no more RAM or different hardware)
+;
+; Purpose: Detect extended RAM modules or memory-mapped peripherals
+; Returns: Z flag clear when memory boundary reached, Z set if wraps to 0x0000
+;==============================================================================
+sub_0ea2h:
+	ld de,l0000h		;0ea2 Set DE = 0x0000 (used for wrap-around detection)
+	ld hl,01400h		;0ea5 Start at 0x1400 (beyond 1KB base RAM)
+
+; Test each memory location above base RAM
+l0ea8h:
+	call sub_0eb3h		;0ea8 Test current memory location with bit patterns
+	ret nz			;0eab Return when memory test fails (found boundary)
+	inc hl			;0eac Move to next higher memory address
+	sbc hl,de		;0ead Check if wrapped around to 0x0000
+	add hl,de		;0eaf Restore HL value  
+	jr nz,l0ea8h		;0eb0 Continue until boundary found or wrap-around
+	ret			;0eb2 Return if wrapped to 0x0000 (full 64K RAM)
+
+;==============================================================================
+; MEMORY LOCATION TEST WITH MULTIPLE PATTERNS (0x0EB3)
+;==============================================================================
+; Purpose: Test single memory location with all bit patterns from test table
+; Input: HL = memory address to test
+; 
+; Test Procedure:
+; 1. Load test pattern count and pattern table pointer
+; 2. For each pattern: save original data, write pattern, read back, verify
+; 3. Restore original data, test next pattern
+; 4. Interrupts disabled during write/read/verify to prevent corruption
+;
+; Test Patterns (at l0ec9h):
+; - 0x02: Tests bit 1 (and others as 0)
+; - 0x55: Alternating bits pattern (01010101)  
+; - 0xAA: Inverse alternating pattern (10101010)
+;
+; Returns: Z flag set if all patterns pass, Z clear if any pattern fails
+;==============================================================================
+sub_0eb3h:
+	ld ix,l0ec9h		;0eb3 Point IX to test pattern table
+	ld b,(ix+000h)		;0eb7 Load pattern count (first byte of table)
+
+; Test each pattern from the table
+l0ebah:
+	inc ix		;0eba Advance to next test pattern
+	ld a,(ix+000h)		;0ebc Load test pattern into A
+	ld c,(hl)			;0ebf Save original memory contents in C
+	di			;0ec0 Disable interrupts (critical memory test section)
+	ld (hl),a			;0ec1 Write test pattern to memory
+	cp (hl)			;0ec2 Read back and compare with expected pattern
+	ld (hl),c			;0ec3 Restore original memory contents
+	ei			;0ec4 Re-enable interrupts
+	ret nz			;0ec5 Return with error if pattern didn't match
+	djnz l0ebah		;0ec6 Test next pattern (decrement B, loop if not zero)
+	ret			;0ec8 Return with Z set (all patterns passed)
+
+;==============================================================================
+; MEMORY TEST PATTERN TABLE (0x0EC9)
+;==============================================================================
+; Format: [Count] [Pattern1] [Pattern2] [Pattern3]
+; These patterns test different failure modes:
+; - 0x02: Tests if bit 1 can be set while others stay clear
+; - 0x55: Tests alternating bit pattern (detects adjacent bit interference)
+; - 0xAA: Inverse alternating (detects stuck bits and crosstalk)
+;==============================================================================
+l0ec9h:
+	defb 0x03		;0ec9 Number of test patterns
+	defb 0x55		;0eca Test pattern 1: 01010101 (alternating bits)
+	defb 0xAA		;0ecb Test pattern 2: 10101010 (inverse alternating)
+sub_0ecch:
+	ld hl,l0f3fh		;0ecc
+	ld (01330h),hl		;0ecf
+	ld (01332h),hl		;0ed2
+	ld (01334h),hl		;0ed5
+	ld (01336h),hl		;0ed8
+	ld c,0f4h		;0edb
+	ld a,030h		;0edd
+	out (c),a		;0edf
+l0ee1h:
+	ld a,0ffh		;0ee1
+	ld (01103h),a		;0ee3
+	call sub_0f01h		;0ee6
+	push bc			;0ee9
+	ld bc,01900h		;0eea
+	call sub_0f0ah		;0eed
+	pop bc			;0ef0
+	ld a,003h		;0ef1
+	out (c),a		;0ef3
+	ld a,(01103h)		;0ef5
+	or a			;0ef8
+	ret nz			;0ef9
+	inc c			;0efa
+	ld a,c			;0efb
+	cp 0f8h		;0efc
+	jr nz,l0ee1h		;0efe
+	ret			;0f00
+sub_0f01h:
+	ld a,028h		;0f01
+	ld b,087h		;0f03
+	out (c),b		;0f05
+	out (c),a		;0f07
+	ret			;0f09
+; --------------------------------------------------
+; sub_0f0ah: Wait/Delay Loop
+; Burns CPU cycles by decrementing BC until it reaches zero.
+; Used for timing delays, hardware settling, or pacing init steps.
+; Entry: BC = delay value
+; Exit: BC = 0
+; No hardware interaction, pure software delay
+; --------------------------------------------------
+sub_0f0ah:
+	dec bc			;0f0a
+	ld a,c			;0f0b
+	or b			;0f0c
+	jr nz,sub_0f0ah		;0f0d
+	ret			;0f0f
+
+; --------------------------------------------------
+; sub_0f10h: Hardware Initialization & Memory Test Routine
+; - Clears accumulator and sets 01204h to 0
+; - Sets up pointer at 0133ch to l0f48h
+; - Sets 01103h to 0xFF (error/status flag)
+; - Calls setup_peripherals_01a1h with l0f55h (hardware setup)
+; - Waits using delay loop (sub_0f0ah, BC=0x1000)
+; - If 01103h is nonzero, returns (error)
+; - If zero, compares 256 bytes at HL and DE (memory test), returns if mismatch
+; Called at 0e9b as part of system initialization/test sequence
+; --------------------------------------------------
+sub_0f10h:
+	xor a			;0f10
+	ld (01204h),a		;0f11
+	ld hl,l0f48h		;0f14
+	ld (0133ch),hl		;0f17
+	dec a			;0f1a
+	ld (01103h),a		;0f1b
+	ld hl,l0f55h		;0f1e
+	call setup_peripherals_01a1h		;0f21
+	ld bc,01000h		;0f24
+	call sub_0f0ah		;0f27
+	ld a,(01103h)		;0f2a
+	or a			;0f2d
+	ret nz			;0f2e
+	ld hl,01000h		;0f2f
+	ld de,l0000h		;0f32
+	ld b,0ffh		;0f35
+l0f37h:
+	ld a,(de)			;0f37
+	cp (hl)			;0f38
+	ret nz			;0f39
+	inc hl			;0f3a
+	inc de			;0f3b
+	djnz l0f37h		;0f3c
+	ret			;0f3e
+l0f3fh:
+	push af			;0f3f
+l0f40h:
+	xor a			;0f40
+	ld (01103h),a		;0f41
+	pop af			;0f44
+	ei			;0f45
+	reti		;0f46
+l0f48h:
+	push af			;0f48
+	push bc			;0f49
+	ld a,0c3h		;0f4a
+	ld b,006h		;0f4c
+l0f4eh:
+	out (0fch),a		;0f4e
+	djnz l0f4eh		;0f50
+	pop bc			;0f52
+	jr l0f40h		;0f53
+l0f55h:
+	inc de			;0f55
+	call m,sub_0079h		;0f56
+	nop			;0f59
+	cp 000h		;0f5a
+	djnz $+22		;0f5c
+	cp l			;0f5e
+	nop			;0f5f
+	djnz $+20		;0f60
+	inc a			;0f62
+	add a,d			;0f63
+	rst 8			;0f64
+	dec b			;0f65
+	rst 8			;0f66
+	or e			;0f67
+	xor e			;0f68
+	add a,a			;0f69
+	nop			;0f6a
+sub_0f6bh:
+	ld hl,l0f85h		;0f6b
+	jr l0f82h		;0f6e
+sub_0f70h:
+	ld hl,l0f8fh		;0f70
+	jr l0f82h		;0f73
+sub_0f75h:
+	ld hl,l0fa0h		;0f75
+	jr l0f82h		;0f78
+sub_0f7ah:
+	ld a,001h		;0f7a
+	ld (01204h),a		;0f7c
+	ld hl,l0fb1h		;0f7f
+l0f82h:
+	jp l00fdh		;0f82
+l0f85h:
+	defb 0x4d 	;0f85 'M'
+	defb 0x45 	;0f86 'E'
+	defb 0x4d 	;0f87 'M'
+	defb 0x20 	;0f88 ' '
+	defb 0x45 	;0f89 'E'
+	defb 0x52 	;0f8a 'R'
+	defb 0x52 	;0f8b 'R'
+	defb 0x0d 	;0f8c <CR>
+	defb 0x0a 	;0f8d <LF>
+	defb 0x00 	;0f8e <NUL>
+l0f8fh:
+	defb 0x46 	;0f8f 'F' 
+	defb 0x4c 	;0f90 'L'
+	defb 0x4f 	;0f91 'O'
+	defb 0x50 	;0f92 'P'
+	defb 0x50 	;0f93 'P' 
+	defb 0x59 	;0f94 'Y' 
+	defb 0x20 	;0f95 ' '
+	defb 0x43 	;0f96 'C' 
+	defb 0x54 	;0f97 'T' 
+	defb 0x43 	;0f98 'C' 
+	defb 0x20	;0f99 ' ' 
+	defb 0x45 	;0f9a 'E' 
+	defb 0x52 	;0f9b 'R' 
+	defb 0x52 	;0f9c 'R' 
+	defb 0x0d 	;0f9d <CR> 
+	defb 0x0a 	;0f9e <LF> 
+	defb 0x00 	;0f9f <NUL> 
+l0fa0h:
+	defb 0x46 ;0fa0 'F'
+	defb 0x4c ;0fa1 'L'
+	defb 0x4f ;0fa2 'O'
+	defb 0x50 ;0fa3 'P'
+	defb 0x50 ;0fa4 'P'
+	defb 0x59 ;0fa5 'Y'
+	defb 0x20 ;0fa6 ' '
+	defb 0x4e ;0fa7 'N'
+	defb 0x45 ;0fa8 'E'
+	defb 0x43 ;0fa9 'C'
+	defb 0x20 ;0faa ' '
+	defb 0x45 ;0fab 'E'
+	defb 0x52 ;0fac 'R'
+	defb 0x52 ;0fad 'R'
+	defb 0x0d ;0fae <CR>
+	defb 0x0a ;0faf <LF>
+	defb 0x00 ;0fb0 <NUL>
+l0fb1h:
+	defb 0x44 ;0fb1 'D'
+	defb 0x4d ;0fb2 'M'
+	defb 0x41 ;0fb3 'A'
+	defb 0x20 ;0fb4 ' '
+	defb 0x45 ;0fb5 'E'
+	defb 0x52 ;0fb6 'R'
+	defb 0x52 ;0fb7 'R'
+	defb 0x0d ;0fb8 <CR>
+	defb 0x0a ;0fb9 <LF>
+	defb 0x00 ;0fba <NUL>
+l0fbbh:
+	xor a			;0fbb Clear A register (A = 0)
+	ld (01226h),a		;0fbc Clear drive control flags
+	ld (01202h),a		;0fbf Set current drive number to 0 (start with drive A:)
+	ld (01225h),a		;0fc2 Clear drive parameter/selector
+	inc a			;0fc5 A = 1
+	ld (01227h),a		;0fc6 Enable drive operations (1 = enabled)
+	call l0de0h		;0fc9 Initialize FDC and check drive status
+	ld hl,01000h		;0fcc Set boot load address to 0x1000
+l0fcfh:
+	ld (01200h),hl		;0fcf Store DMA/buffer address for disk operations
+	call l0dabh		;0fd2 Attempt to read boot sector from current drive
+	jp c,01000h		;0fd5
+	ld hl,l0fe1h		;0fd8
+	call l00fdh		;0fdb
+	jp l0294h		;0fde
+l0fe1h:
+	defb 0x42 		;0fe1 'B'
+	defb 0x4f 		;0fe2 'O'
+	defb 0x4f 		;0fe3 'O'
+	defb 0x54 		;0fe4 'T'
+	defb 0x20 		;0fe5 ' '
+	defb 0x45 		;0fe6 'E'
+	defb 0x52 		;0fe7 'R'
+	defb 0x52 		;0fe8 'R'
+	defb 0x0d 		;0fe9 <CR>
+	defb 0x0a 		;0fea <LF>
+	defb 0x00 		;0feb <NUL>
+l0fec:					; VERSION STRING - Displayed during system initialization
+	defb 0x56 		;0fec 'V'
+	defb 0x65 		;0fed 'e'
+	defb 0x72 		;0fee 'r'
+	defb 0x20		;0fef ' '
+	defb 0x31 		;0ff0 '1'
+l0ff1h:
+	defb 0x2e		;0ff1 '.'
+	defb 0x32		;0ff2 '2'
+	defb 0x78		;0ff3 'x'
+	defb 0x20		;0ff4 ' '
+	defb 0x38		;0ff5 '8'
+l0ff6h:
+	defb 0x20		;0ff6 ' '
+	defb 0x69		;0ff7 'i'
+	defb 0x6e		;0ff8 'n'
+	defb 0x63		;0ff9 'c'
+	defb 0x68		;0ffa 'h'
+l0ffbh:
+	defb 0x0d		;0ffb <CR>
+	defb 0x0a		;0ffc <LF>
+	defb 0x0a		;0ffd <LF>
+	defb 0x00		;0ffe <NUL> - String terminator for print routine
+	defb 0xff		;0ffe FF
+

roms/metric_8_u16_6306_78d8812f.bin

@@ -0,0 +1 @@
+				

roms/metric_8_u17_7611_7e9d9df4.bin

@@ -0,0 +1 @@
+

schematic_cpu-s/New_Library.kicad_sym

@@ -0,0 +1,518 @@
+(kicad_symbol_lib
+	(version 20241209)
+	(generator "kicad_symbol_editor")
+	(generator_version "9.0")
+	(symbol "2708"
+		(exclude_from_sim no)
+		(in_bom yes)
+		(on_board yes)
+		(property "Reference" "U"
+			(at -7.62 24.13 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Value" "2708"
+			(at 2.54 -26.67 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(justify left)
+			)
+		)
+		(property "Footprint" "Package_DIP:DIP-24_W15.24mm"
+			(at 0 0 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(property "Datasheet" ""
+			(at 0 0 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(property "Description" "OTP EPROM 4 KiBit, [Obsolete 2004-01]"
+			(at 0 0 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(property "ki_keywords" "OTP EPROM 4 KiBit"
+			(at 0 0 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(property "ki_fp_filters" "DIP*W15.24mm*"
+			(at 0 0 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(symbol "2708_1_1"
+			(rectangle
+				(start -7.62 22.86)
+				(end 7.62 -25.4)
+				(stroke
+					(width 0.254)
+					(type default)
+				)
+				(fill
+					(type background)
+				)
+			)
+			(pin input line
+				(at -10.16 20.32 0)
+				(length 2.54)
+				(name "A0"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "8"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at -10.16 17.78 0)
+				(length 2.54)
+				(name "A1"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "7"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at -10.16 15.24 0)
+				(length 2.54)
+				(name "A2"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "6"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at -10.16 12.7 0)
+				(length 2.54)
+				(name "A3"
+					(effects
+						(font
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+			(pin input line
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+				(name "~{CE}"
+					(effects
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+			(pin power_in line
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+				(name "VCC"
+					(effects
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+					)
+				)
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+					(effects
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+					)
+				)
+			)
+			(pin power_in line
+				(at 0 -27.94 90)
+				(length 2.54)
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+					(effects
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+						)
+					)
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+					)
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+			)
+			(pin tri_state line
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+				(length 2.54)
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+						)
+					)
+				)
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+						)
+					)
+				)
+			)
+			(pin tri_state line
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+				(length 2.54)
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+						)
+					)
+				)
+			)
+			(pin tri_state line
+				(at 10.16 12.7 180)
+				(length 2.54)
+				(name "D3"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "13"
+					(effects
+						(font
+							(size 1.27 1.27)
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+					)
+				)
+			)
+			(pin tri_state line
+				(at 10.16 10.16 180)
+				(length 2.54)
+				(name "D4"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "14"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin tri_state line
+				(at 10.16 7.62 180)
+				(length 2.54)
+				(name "D5"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "15"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin tri_state line
+				(at 10.16 5.08 180)
+				(length 2.54)
+				(name "D6"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "16"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin tri_state line
+				(at 10.16 2.54 180)
+				(length 2.54)
+				(name "D7"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "17"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+		)
+		(embedded_fonts no)
+	)
+)

schematic_cpu-s/cpu_s.kicad_pcb

@@ -0,0 +1,2 @@
+(kicad_pcb (version 20241229) (generator "pcbnew") (generator_version "9.0")
+)

schematic_cpu-s/cpu_s.kicad_prl

@@ -0,0 +1,98 @@
+{
+  "board": {
+    "active_layer": 0,
+    "active_layer_preset": "",
+    "auto_track_width": true,
+    "hidden_netclasses": [],
+    "hidden_nets": [],
+    "high_contrast_mode": 0,
+    "net_color_mode": 1,
+    "opacity": {
+      "images": 0.6,
+      "pads": 1.0,
+      "shapes": 1.0,
+      "tracks": 1.0,
+      "vias": 1.0,
+      "zones": 0.6
+    },
+    "selection_filter": {
+      "dimensions": true,
+      "footprints": true,
+      "graphics": true,
+      "keepouts": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pads": true,
+      "text": true,
+      "tracks": true,
+      "vias": true,
+      "zones": true
+    },
+    "visible_items": [
+      "vias",
+      "footprint_text",
+      "footprint_anchors",
+      "ratsnest",
+      "grid",
+      "footprints_front",
+      "footprints_back",
+      "footprint_values",
+      "footprint_references",
+      "tracks",
+      "drc_errors",
+      "drawing_sheet",
+      "bitmaps",
+      "pads",
+      "zones",
+      "drc_warnings",
+      "drc_exclusions",
+      "locked_item_shadows",
+      "conflict_shadows",
+      "shapes"
+    ],
+    "visible_layers": "ffffffff_ffffffff_ffffffff_ffffffff",
+    "zone_display_mode": 0
+  },
+  "git": {
+    "repo_type": "",
+    "repo_username": "",
+    "ssh_key": ""
+  },
+  "meta": {
+    "filename": "temp_mtric.kicad_prl",
+    "version": 5
+  },
+  "net_inspector_panel": {
+    "col_hidden": [],
+    "col_order": [],
+    "col_widths": [],
+    "custom_group_rules": [],
+    "expanded_rows": [],
+    "filter_by_net_name": true,
+    "filter_by_netclass": true,
+    "filter_text": "",
+    "group_by_constraint": false,
+    "group_by_netclass": false,
+    "show_unconnected_nets": false,
+    "show_zero_pad_nets": false,
+    "sort_ascending": true,
+    "sorting_column": -1
+  },
+  "open_jobsets": [],
+  "project": {
+    "files": []
+  },
+  "schematic": {
+    "selection_filter": {
+      "graphics": true,
+      "images": true,
+      "labels": true,
+      "lockedItems": false,
+      "otherItems": true,
+      "pins": true,
+      "symbols": true,
+      "text": true,
+      "wires": true
+    }
+  }
+}

schematic_cpu-s/cpu_s.kicad_pro

@@ -0,0 +1,418 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {},
+      "diff_pair_dimensions": [],
+      "drc_exclusions": [],
+      "rules": {},
+      "track_widths": [],
+      "via_dimensions": []
+    },
+    "ipc2581": {
+      "dist": "",
+      "distpn": "",
+      "internal_id": "",
+      "mfg": "",
+      "mpn": ""
+    },
+    "layer_pairs": [],
+    "layer_presets": [],
+    "viewports": []
+  },
+  "boards": [],
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
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+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        1,
+        1,
+        2,
+        1,
+        1,
+        2
+      ],
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+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "endpoint_off_grid": "warning",
+      "extra_units": "error",
+      "footprint_filter": "ignore",
+      "footprint_link_issues": "warning",
+      "four_way_junction": "ignore",
+      "global_label_dangling": "warning",
+      "hier_label_mismatch": "error",
+      "label_dangling": "error",
+      "label_multiple_wires": "warning",
+      "lib_symbol_issues": "warning",
+      "lib_symbol_mismatch": "warning",
+      "missing_bidi_pin": "warning",
+      "missing_input_pin": "warning",
+      "missing_power_pin": "error",
+      "missing_unit": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "same_local_global_label": "warning",
+      "similar_label_and_power": "warning",
+      "similar_labels": "warning",
+      "similar_power": "warning",
+      "simulation_model_issue": "ignore",
+      "single_global_label": "ignore",
+      "unannotated": "error",
+      "unconnected_wire_endpoint": "warning",
+      "undefined_netclass": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "cpu_s.kicad_pro",
+    "version": 3
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12,
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.2,
+        "line_style": 0,
+        "microvia_diameter": 0.3,
+        "microvia_drill": 0.1,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 2147483647,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.2,
+        "via_diameter": 0.6,
+        "via_drill": 0.3,
+        "wire_width": 6
+      }
+    ],
+    "meta": {
+      "version": 4
+    },
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": []
+  },
+  "pcbnew": {
+    "last_paths": {
+      "gencad": "",
+      "idf": "",
+      "netlist": "",
+      "plot": "",
+      "pos_files": "",
+      "specctra_dsn": "",
+      "step": "",
+      "svg": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "bom_export_filename": "${PROJECTNAME}.csv",
+    "bom_fmt_presets": [],
+    "bom_fmt_settings": {
+      "field_delimiter": ",",
+      "keep_line_breaks": false,
+      "keep_tabs": false,
+      "name": "CSV",
+      "ref_delimiter": ",",
+      "ref_range_delimiter": "",
+      "string_delimiter": "\""
+    },
+    "bom_presets": [],
+    "bom_settings": {
+      "exclude_dnp": false,
+      "fields_ordered": [
+        {
+          "group_by": false,
+          "label": "Reference",
+          "name": "Reference",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Qty",
+          "name": "${QUANTITY}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Value",
+          "name": "Value",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "DNP",
+          "name": "${DNP}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from BOM",
+          "name": "${EXCLUDE_FROM_BOM}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from Board",
+          "name": "${EXCLUDE_FROM_BOARD}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Footprint",
+          "name": "Footprint",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Datasheet",
+          "name": "Datasheet",
+          "show": true
+        }
+      ],
+      "filter_string": "",
+      "group_symbols": true,
+      "include_excluded_from_bom": true,
+      "name": "Default Editing",
+      "sort_asc": true,
+      "sort_field": "Reference"
+    },
+    "connection_grid_size": 50.0,
+    "drawing": {
+      "dashed_lines_dash_length_ratio": 12.0,
+      "dashed_lines_gap_length_ratio": 3.0,
+      "default_line_thickness": 6.0,
+      "default_text_size": 50.0,
+      "field_names": [],
+      "intersheets_ref_own_page": false,
+      "intersheets_ref_prefix": "",
+      "intersheets_ref_short": false,
+      "intersheets_ref_show": false,
+      "intersheets_ref_suffix": "",
+      "junction_size_choice": 3,
+      "label_size_ratio": 0.375,
+      "operating_point_overlay_i_precision": 3,
+      "operating_point_overlay_i_range": "~A",
+      "operating_point_overlay_v_precision": 3,
+      "operating_point_overlay_v_range": "~V",
+      "overbar_offset_ratio": 1.23,
+      "pin_symbol_size": 25.0,
+      "text_offset_ratio": 0.15
+    },
+    "legacy_lib_dir": "",
+    "legacy_lib_list": [],
+    "meta": {
+      "version": 1
+    },
+    "net_format_name": "KiCad",
+    "page_layout_descr_file": "",
+    "plot_directory": "",
+    "space_save_all_events": true,
+    "spice_current_sheet_as_root": false,
+    "spice_external_command": "spice \"%I\"",
+    "spice_model_current_sheet_as_root": true,
+    "spice_save_all_currents": false,
+    "spice_save_all_dissipations": false,
+    "spice_save_all_voltages": false,
+    "subpart_first_id": 65,
+    "subpart_id_separator": 0
+  },
+  "sheets": [
+    [
+      "65785a6c-7e93-4c63-aaec-5466bd4c0ac2",
+      "Root"
+    ]
+  ],
+  "text_variables": {}
+}

schematic_cpu-s/cpu_s.kicad_sch

@@ -0,0 +1,28550 @@
+(kicad_sch
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+	(text "OUTPUT Memory decoding\n0x03 EPROM2\n0x05 MEMORY\n0x06 EPROM1\n\nOnly address 0x1x in use 0x92 blocks the second part of the 2k block for memory\n0x40-0x7f and 0xc0-0xff can not happen due to a6 low\n2kb blocks\n\nbus pin4 disable eprom and ram\n0x0000-0x07ff eprom1\n0x0800-0x0fff eprom2\n0x1000-0x17ff memory 1kb\n"
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+			(project ""
+				(path "/65785a6c-7e93-4c63-aaec-5466bd4c0ac2"
+					(reference "#PWR08")
+					(unit 1)
+				)
+			)
+		)
+	)
+	(symbol
+		(lib_id "Device:R_Small")
+		(at 78.74 325.12 90)
+		(unit 1)
+		(exclude_from_sim no)
+		(in_bom yes)
+		(on_board yes)
+		(dnp no)
+		(fields_autoplaced yes)
+		(uuid "ff9de699-b86a-4b42-98ca-09ee0b22e8a1")
+		(property "Reference" "R7"
+			(at 78.74 320.04 90)
+			(effects
+				(font
+					(size 1.016 1.016)
+				)
+			)
+		)
+		(property "Value" "22"
+			(at 78.74 322.58 90)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Footprint" ""
+			(at 78.74 325.12 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(property "Datasheet" "~"
+			(at 78.74 325.12 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(property "Description" "Resistor, small symbol"
+			(at 78.74 325.12 0)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+				(hide yes)
+			)
+		)
+		(pin "2"
+			(uuid "1f8ad4b5-eae3-4e46-914f-0e70850abbff")
+		)
+		(pin "1"
+			(uuid "89627ca4-fbb6-4235-a817-c14fcd31b4ac")
+		)
+		(instances
+			(project "temp_mtric"
+				(path "/65785a6c-7e93-4c63-aaec-5466bd4c0ac2"
+					(reference "R7")
+					(unit 1)
+				)
+			)
+		)
+	)
+	(sheet_instances
+		(path "/"
+			(page "1")
+		)
+	)
+	(embedded_fonts no)
+)

schematic_cpu-s/sym-lib-table

@@ -0,0 +1,5 @@
+(sym_lib_table
+  (version 7)
+  (lib (name "New_Library")(type "KiCad")(uri "${KIPRJMOD}/New_Library.kicad_sym")(options "")(descr ""))
+  (lib (name "sm6uax")(type "KiCad")(uri "/home/pm/local/dalsroit/kicad/sm6uax.kicad_sym")(options "")(descr ""))
+)