Added missed line

superbasic.pro

@@ -1,4 +1,4 @@
-update=lör 31 jul 2021 17:29:22
+update=lör 31 jul 2021 22:26:17
 version=1
 last_client=kicad
 [general]
@@ -236,3 +236,13 @@ uViaDrill=0.1
 dPairWidth=0.2
 dPairGap=0.25
 dPairViaGap=0.25
+[schematic_editor]
+version=1
+PageLayoutDescrFile=
+PlotDirectoryName=
+SubpartIdSeparator=0
+SubpartFirstId=65
+NetFmtName=Pcbnew
+SpiceAjustPassiveValues=0
+LabSize=50
+ERC_TestSimilarLabels=1

superbasic.sch

@@ -235,7 +235,7 @@ L Device:C_Small C2
 U 1 1 61087E48
 P 10650 5150
 F 0 "C2" H 10742 5196 50  0000 L CNN
-F 1 "100nf" H 10742 5105 50  0000 L CNN
+F 1 "100nF" H 10742 5105 50  0000 L CNN
 F 2 "Capacitor_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 10650 5150 50  0001 C CNN
 F 3 "~" H 10650 5150 50  0001 C CNN
 	1    10650 5150
@@ -676,7 +676,7 @@ L Device:C_Small C3
 U 1 1 6155FFC8
 P 10200 5150
 F 0 "C3" H 10292 5196 50  0000 L CNN
-F 1 "100nf" H 10292 5105 50  0000 L CNN
+F 1 "100nF" H 10292 5105 50  0000 L CNN
 F 2 "Capacitor_THT:C_Disc_D4.7mm_W2.5mm_P5.00mm" H 10200 5150 50  0001 C CNN
 F 3 "~" H 10200 5150 50  0001 C CNN
 	1    10200 5150
@@ -2076,4 +2076,10 @@ Wire Bus Line
 	6500 600  6500 4450
 Wire Bus Line
 	650  600  650  4350
+Entry Wire Line
+	2500 1650 2600 1550
+Entry Wire Line
+	4450 1650 4550 1550
+Entry Wire Line
+	6400 1650 6500 1550
 $EndSCHEMATC