output_i2s.c 22 KB

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  1. /*
  2. * Squeezelite for esp32
  3. *
  4. * (c) Sebastien 2019
  5. * Philippe G. 2019, philippe_44@outlook.com
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation, either version 3 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. */
  21. /*
  22. Synchronisation is a bit of a hack with i2s. The esp32 driver is always
  23. full when it starts, so there is a delay of the total length of buffers.
  24. In other words, i2w_write blocks at first call, until at least one buffer
  25. has been written (it uses a queue with produce / consume).
  26. The first hack is to consume that length at the beginning of tracks when
  27. synchronization is active. It's about ~180ms @ 44.1kHz
  28. The second hack is that we never know exactly the number of frames in the
  29. DMA buffers when we update the output.frames_played_dmp. We assume that
  30. after i2s_write, these buffers are always full so by measuring the gap
  31. between time after i2s_write and update of frames_played_dmp, we have a
  32. good idea of the error.
  33. The third hack is when sample rate changes, buffers are reset and we also
  34. do the change too early, but can't do that exaclty at the right time. So
  35. there might be a pop and a de-sync when sampling rate change happens. Not
  36. sure that using rate_delay would fix that
  37. */
  38. #include "squeezelite.h"
  39. #include "driver/i2s.h"
  40. #include "driver/i2c.h"
  41. #include "driver/gpio.h"
  42. #include "perf_trace.h"
  43. #include <signal.h>
  44. #include "time.h"
  45. #include "led.h"
  46. #define LOCK mutex_lock(outputbuf->mutex)
  47. #define UNLOCK mutex_unlock(outputbuf->mutex)
  48. #define FRAME_BLOCK MAX_SILENCE_FRAMES
  49. // Prevent compile errors if dac output is
  50. // included in the build and not actually activated in menuconfig
  51. #ifndef CONFIG_I2S_BCK_IO
  52. #define CONFIG_I2S_BCK_IO -1
  53. #endif
  54. #ifndef CONFIG_I2S_WS_IO
  55. #define CONFIG_I2S_WS_IO -1
  56. #endif
  57. #ifndef CONFIG_I2S_DO_IO
  58. #define CONFIG_I2S_DO_IO -1
  59. #endif
  60. #ifndef CONFIG_I2S_NUM
  61. #define CONFIG_I2S_NUM -1
  62. #endif
  63. #ifndef CONFIG_SPDIF_BCK_IO
  64. #define CONFIG_SPDIF_BCK_IO -1
  65. #endif
  66. #ifndef CONFIG_SPDIF_WS_IO
  67. #define CONFIG_SPDIF_WS_IO -1
  68. #endif
  69. #ifndef CONFIG_SPDIF_DO_IO
  70. #define CONFIG_SPDIF_DO_IO -1
  71. #endif
  72. #ifndef CONFIG_SPDIF_NUM
  73. #define CONFIG_SPDIF_NUM -1
  74. #endif
  75. typedef enum { DAC_ON = 0, DAC_OFF, DAC_POWERDOWN, DAC_VOLUME } dac_cmd_e;
  76. // must have an integer ratio with FRAME_BLOCK
  77. #define DMA_BUF_LEN 512
  78. #define DMA_BUF_COUNT 12
  79. #define DECLARE_ALL_MIN_MAX \
  80. DECLARE_MIN_MAX(o); \
  81. DECLARE_MIN_MAX(s); \
  82. DECLARE_MIN_MAX(rec); \
  83. DECLARE_MIN_MAX(i2s_time); \
  84. DECLARE_MIN_MAX(buffering);
  85. #define RESET_ALL_MIN_MAX \
  86. RESET_MIN_MAX(o); \
  87. RESET_MIN_MAX(s); \
  88. RESET_MIN_MAX(rec); \
  89. RESET_MIN_MAX(i2s_time); \
  90. RESET_MIN_MAX(buffering);
  91. #define STATS_PERIOD_MS 5000
  92. extern struct outputstate output;
  93. extern struct buffer *streambuf;
  94. extern struct buffer *outputbuf;
  95. extern u8_t *silencebuf;
  96. static log_level loglevel;
  97. static bool running, isI2SStarted;
  98. static i2s_config_t i2s_config;
  99. static int bytes_per_frame;
  100. static thread_type thread, stats_thread;
  101. static u8_t *obuf;
  102. static bool spdif;
  103. DECLARE_ALL_MIN_MAX;
  104. static int _i2s_write_frames(frames_t out_frames, bool silence, s32_t gainL, s32_t gainR,
  105. s32_t cross_gain_in, s32_t cross_gain_out, ISAMPLE_T **cross_ptr);
  106. static void *output_thread_i2s();
  107. static void *output_thread_i2s_stats();
  108. static void dac_cmd(dac_cmd_e cmd, ...);
  109. static void spdif_convert(ISAMPLE_T *src, size_t frames, u32_t *dst, size_t *count);
  110. #ifdef CONFIG_SQUEEZEAMP
  111. #define TAS575x
  112. #undef CONFIG_I2S_BCK_IO
  113. #define CONFIG_I2S_BCK_IO 33
  114. #undef CONFIG_I2S_WS_IO
  115. #define CONFIG_I2S_WS_IO 25
  116. #undef CONFIG_I2S_DO_IO
  117. #define CONFIG_I2S_DO_IO 32
  118. #undef CONFIG_I2S_NUM
  119. #define CONFIG_I2S_NUM 0
  120. #undef CONFIG_SPDIF_BCK_IO
  121. #define CONFIG_SPDIF_BCK_IO 33
  122. #undef CONFIG_SPDIF_WS_IO
  123. #define CONFIG_SPDIF_WS_IO 25
  124. #undef CONFIG_SPDIF_DO_IO
  125. #define CONFIG_SPDIF_DO_IO 15
  126. #undef CONFIG_SPDIF_NUM
  127. #define CONFIG_SPDIF_NUM 0
  128. #define I2C_PORT 0
  129. #define I2C_ADDR 0x4c
  130. #define VOLUME_GPIO 33
  131. #define JACK_GPIO 34
  132. struct tas575x_cmd_s {
  133. u8_t reg;
  134. u8_t value;
  135. };
  136. u8_t config_spdif_gpio = CONFIG_SPDIF_DO_IO;
  137. static const struct tas575x_cmd_s tas575x_init_sequence[] = {
  138. { 0x00, 0x00 }, // select page 0
  139. { 0x02, 0x10 }, // standby
  140. { 0x0d, 0x10 }, // use SCK for PLL
  141. { 0x25, 0x08 }, // ignore SCK halt
  142. { 0x02, 0x00 }, // restart
  143. { 0xff, 0xff } // end of table
  144. };
  145. static const i2c_config_t i2c_config = {
  146. .mode = I2C_MODE_MASTER,
  147. .sda_io_num = 27,
  148. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  149. .scl_io_num = 26,
  150. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  151. .master.clk_speed = 100000,
  152. };
  153. static const struct tas575x_cmd_s tas575x_cmd[] = {
  154. { 0x02, 0x00 }, // DAC_ON
  155. { 0x02, 0x10 }, // DAC_OFF
  156. { 0x02, 0x01 }, // DAC_POWERDOWN
  157. };
  158. #endif
  159. /****************************************************************************************
  160. * Initialize the DAC output
  161. */
  162. void output_init_i2s(log_level level, char *device, unsigned output_buf_size, char *params, unsigned rates[], unsigned rate_delay, unsigned idle) {
  163. loglevel = level;
  164. #ifdef TAS575x
  165. gpio_pad_select_gpio(JACK_GPIO);
  166. gpio_set_direction(JACK_GPIO, GPIO_MODE_INPUT);
  167. adc1_config_width(ADC_WIDTH_BIT_12);
  168. adc1_config_channel_atten(ADC1_CHANNEL_7, ADC_ATTEN_DB_0);
  169. // init volume & mute
  170. gpio_pad_select_gpio(VOLUME_GPIO);
  171. gpio_set_direction(VOLUME_GPIO, GPIO_MODE_OUTPUT);
  172. gpio_set_level(VOLUME_GPIO, 0);
  173. // configure i2c
  174. i2c_param_config(I2C_PORT, &i2c_config);
  175. i2c_driver_install(I2C_PORT, I2C_MODE_MASTER, false, false, false);
  176. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  177. for (int i = 0; tas575x_init_sequence[i].reg != 0xff; i++) {
  178. i2c_master_start(i2c_cmd);
  179. i2c_master_write_byte(i2c_cmd, I2C_ADDR << 1 | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  180. i2c_master_write_byte(i2c_cmd, tas575x_init_sequence[i].reg, I2C_MASTER_NACK);
  181. i2c_master_write_byte(i2c_cmd, tas575x_init_sequence[i].value, I2C_MASTER_NACK);
  182. LOG_DEBUG("i2c write %x at %u", tas575x_init_sequence[i].reg, tas575x_init_sequence[i].value);
  183. }
  184. i2c_master_stop(i2c_cmd);
  185. esp_err_t ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 500 / portTICK_RATE_MS);
  186. i2c_cmd_link_delete(i2c_cmd);
  187. if (ret != ESP_OK) {
  188. LOG_ERROR("could not intialize TAS575x %d", ret);
  189. }
  190. #endif
  191. #ifdef CONFIG_I2S_BITS_PER_CHANNEL
  192. switch (CONFIG_I2S_BITS_PER_CHANNEL) {
  193. case 24:
  194. output.format = S24_BE;
  195. bytes_per_frame = 2*3;
  196. break;
  197. case 16:
  198. output.format = S16_BE;
  199. bytes_per_frame = 2*2;
  200. break;
  201. case 8:
  202. output.format = S8_BE;
  203. bytes_per_frame = 2*4;
  204. break;
  205. default:
  206. LOG_ERROR("Unsupported bit depth %d",CONFIG_I2S_BITS_PER_CHANNEL);
  207. break;
  208. }
  209. #else
  210. output.format = S16_LE;
  211. bytes_per_frame = 2*2;
  212. #endif
  213. if (strcasestr(device, "spdif")) spdif = true;
  214. output.write_cb = &_i2s_write_frames;
  215. obuf = malloc(FRAME_BLOCK * bytes_per_frame);
  216. if (!obuf) {
  217. LOG_ERROR("Cannot allocate i2s buffer");
  218. return;
  219. }
  220. running=true;
  221. i2s_pin_config_t pin_config;
  222. if (spdif) {
  223. pin_config = (i2s_pin_config_t) { .bck_io_num = CONFIG_SPDIF_BCK_IO, .ws_io_num = CONFIG_SPDIF_WS_IO,
  224. .data_out_num = CONFIG_SPDIF_DO_IO, .data_in_num = -1 //Not used
  225. };
  226. i2s_config.sample_rate = output.current_sample_rate * 2;
  227. i2s_config.bits_per_sample = 32;
  228. } else {
  229. pin_config = (i2s_pin_config_t) { .bck_io_num = CONFIG_I2S_BCK_IO, .ws_io_num = CONFIG_I2S_WS_IO,
  230. .data_out_num = CONFIG_I2S_DO_IO, .data_in_num = -1 //Not used
  231. };
  232. i2s_config.sample_rate = output.current_sample_rate;
  233. i2s_config.bits_per_sample = bytes_per_frame * 8 / 2;
  234. #ifdef TAS575x
  235. gpio_pad_select_gpio(CONFIG_SPDIF_DO_IO);
  236. gpio_set_direction(CONFIG_SPDIF_DO_IO, GPIO_MODE_OUTPUT);
  237. gpio_set_level(CONFIG_SPDIF_DO_IO, 0);
  238. #endif
  239. }
  240. i2s_config.mode = I2S_MODE_MASTER | I2S_MODE_TX;
  241. i2s_config.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT;
  242. i2s_config.communication_format = I2S_COMM_FORMAT_I2S| I2S_COMM_FORMAT_I2S_MSB;
  243. // in case of overflow, do not replay old buffer
  244. i2s_config.tx_desc_auto_clear = true;
  245. i2s_config.dma_buf_count = DMA_BUF_COUNT;
  246. // Counted in frames (but i2s allocates a buffer <= 4092 bytes)
  247. i2s_config.dma_buf_len = DMA_BUF_LEN;
  248. i2s_config.use_apll = true;
  249. i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1; //Interrupt level 1
  250. LOG_INFO("Initializing I2S mode %s with rate: %d, bits per sample: %d, buffer frames: %d, number of buffers: %d ",
  251. spdif ? "S/PDIF" : "normal",
  252. i2s_config.sample_rate, i2s_config.bits_per_sample, i2s_config.dma_buf_len, i2s_config.dma_buf_count);
  253. i2s_driver_install(CONFIG_I2S_NUM, &i2s_config, 0, NULL);
  254. i2s_set_pin(CONFIG_I2S_NUM, &pin_config);
  255. i2s_stop(CONFIG_I2S_NUM);
  256. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  257. isI2SStarted=false;
  258. dac_cmd(DAC_OFF);
  259. pthread_attr_t attr;
  260. pthread_attr_init(&attr);
  261. pthread_attr_setstacksize(&attr, PTHREAD_STACK_MIN + OUTPUT_THREAD_STACK_SIZE);
  262. pthread_create_name(&thread, &attr, output_thread_i2s, NULL, "output_i2s");
  263. pthread_attr_destroy(&attr);
  264. // leave stack size to default
  265. pthread_create_name(&stats_thread, NULL, output_thread_i2s_stats, NULL, "output_i2s_sts");
  266. }
  267. /****************************************************************************************
  268. * Terminate DAC output
  269. */
  270. void output_close_i2s(void) {
  271. LOCK;
  272. running = false;
  273. UNLOCK;
  274. pthread_join(thread, NULL);
  275. pthread_join(stats_thread, NULL);
  276. i2s_driver_uninstall(CONFIG_I2S_NUM);
  277. free(obuf);
  278. #ifdef TAS575x
  279. i2c_driver_delete(I2C_PORT);
  280. #endif
  281. }
  282. /****************************************************************************************
  283. * change volume
  284. */
  285. bool output_volume_i2s(unsigned left, unsigned right) {
  286. #ifdef TAS575x
  287. if (!spdif) gpio_set_level(VOLUME_GPIO, left || right);
  288. #endif
  289. return false;
  290. }
  291. /****************************************************************************************
  292. * Write frames to the output buffer
  293. */
  294. static int _i2s_write_frames(frames_t out_frames, bool silence, s32_t gainL, s32_t gainR,
  295. s32_t cross_gain_in, s32_t cross_gain_out, ISAMPLE_T **cross_ptr) {
  296. #if BYTES_PER_FRAME == 8
  297. s32_t *optr;
  298. #endif
  299. if (!silence) {
  300. if (output.fade == FADE_ACTIVE && output.fade_dir == FADE_CROSS && *cross_ptr) {
  301. _apply_cross(outputbuf, out_frames, cross_gain_in, cross_gain_out, cross_ptr);
  302. }
  303. #if BYTES_PER_FRAME == 4
  304. if (gainL != FIXED_ONE || gainR!= FIXED_ONE) {
  305. _apply_gain(outputbuf, out_frames, gainL, gainR);
  306. }
  307. memcpy(obuf, outputbuf->readp, out_frames * bytes_per_frame);
  308. #else
  309. optr = (s32_t*) outputbuf->readp;
  310. #endif
  311. } else {
  312. #if BYTES_PER_FRAME == 4
  313. memcpy(obuf, silencebuf, out_frames * bytes_per_frame);
  314. #else
  315. optr = (s32_t*) silencebuf;
  316. #endif
  317. }
  318. #if BYTES_PER_FRAME == 8
  319. IF_DSD(
  320. if (output.outfmt == DOP) {
  321. update_dop((u32_t *) optr, out_frames, output.invert);
  322. } else if (output.outfmt != PCM && output.invert)
  323. dsd_invert((u32_t *) optr, out_frames);
  324. )
  325. _scale_and_pack_frames(obuf, optr, out_frames, gainL, gainR, output.format);
  326. #endif
  327. return out_frames;
  328. }
  329. /****************************************************************************************
  330. * Main output thread
  331. */
  332. static void *output_thread_i2s() {
  333. size_t count = 0, bytes;
  334. frames_t iframes = FRAME_BLOCK, oframes;
  335. uint32_t timer_start = 0;
  336. int discard = 0;
  337. uint32_t fullness = gettime_ms();
  338. bool synced;
  339. output_state state = OUTPUT_OFF;
  340. char *sbuf = NULL;
  341. // spdif needs 16 bytes per frame : 32 bits/sample, 2 channels, BMC encoded
  342. if (spdif && (sbuf = malloc(FRAME_BLOCK * 16)) == NULL) {
  343. LOG_ERROR("Cannot allocate SPDIF buffer");
  344. }
  345. while (running) {
  346. TIME_MEASUREMENT_START(timer_start);
  347. LOCK;
  348. // manage led display
  349. if (state != output.state) {
  350. LOG_INFO("Output state is %d", output.state);
  351. if (output.state == OUTPUT_OFF) led_blink(LED_GREEN, 100, 2500);
  352. else if (output.state == OUTPUT_STOPPED) led_blink(LED_GREEN, 200, 1000);
  353. else if (output.state == OUTPUT_RUNNING) led_on(LED_GREEN);
  354. }
  355. state = output.state;
  356. if (output.state == OUTPUT_OFF) {
  357. UNLOCK;
  358. if (isI2SStarted) {
  359. isI2SStarted = false;
  360. i2s_stop(CONFIG_I2S_NUM);
  361. if (!spdif) dac_cmd(DAC_OFF);
  362. count = 0;
  363. }
  364. usleep(200000);
  365. continue;
  366. } else if (output.state == OUTPUT_STOPPED) {
  367. synced = false;
  368. }
  369. output.updated = gettime_ms();
  370. output.frames_played_dmp = output.frames_played;
  371. // try to estimate how much we have consumed from the DMA buffer
  372. output.device_frames = DMA_BUF_COUNT * DMA_BUF_LEN - ((output.updated - fullness) * output.current_sample_rate) / 1000;
  373. oframes = _output_frames( iframes );
  374. output.frames_in_process = oframes;
  375. SET_MIN_MAX_SIZED(oframes,rec,iframes);
  376. SET_MIN_MAX_SIZED(_buf_used(outputbuf),o,outputbuf->size);
  377. SET_MIN_MAX_SIZED(_buf_used(streambuf),s,streambuf->size);
  378. SET_MIN_MAX( TIME_MEASUREMENT_GET(timer_start),buffering);
  379. /* must skip first whatever is in the pipe (but not when resuming).
  380. This test is incorrect when we pause a track that has just started,
  381. but this is higly unlikely and I don't have a better one for now */
  382. if (output.state == OUTPUT_START_AT) {
  383. discard = output.frames_played_dmp ? 0 : output.device_frames;
  384. synced = true;
  385. } else if (discard) {
  386. discard -= oframes;
  387. iframes = discard ? min(FRAME_BLOCK, discard) : FRAME_BLOCK;
  388. UNLOCK;
  389. continue;
  390. }
  391. UNLOCK;
  392. // now send all the data
  393. TIME_MEASUREMENT_START(timer_start);
  394. if (!isI2SStarted ) {
  395. isI2SStarted = true;
  396. LOG_INFO("Restarting I2S.");
  397. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  398. i2s_start(CONFIG_I2S_NUM);
  399. if (!spdif) dac_cmd(DAC_ON);
  400. }
  401. // this does not work well as set_sample_rates resets the fifos (and it's too early)
  402. if (i2s_config.sample_rate != output.current_sample_rate) {
  403. LOG_INFO("changing sampling rate %u to %u", i2s_config.sample_rate, output.current_sample_rate);
  404. /*
  405. if (synced)
  406. // can sleep for a buffer_queue - 1 and then eat a buffer (discard) if we are synced
  407. usleep(((DMA_BUF_COUNT - 1) * DMA_BUF_LEN * bytes_per_frame * 1000) / 44100 * 1000);
  408. discard = DMA_BUF_COUNT * DMA_BUF_LEN * bytes_per_frame;
  409. }
  410. */
  411. i2s_config.sample_rate = output.current_sample_rate;
  412. i2s_set_sample_rates(CONFIG_I2S_NUM, spdif ? i2s_config.sample_rate * 2 : i2s_config.sample_rate);
  413. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  414. //return;
  415. }
  416. // we assume that here we have been able to entirely fill the DMA buffers
  417. if (spdif) {
  418. spdif_convert((ISAMPLE_T*) obuf, oframes, (u32_t*) sbuf, &count);
  419. i2s_write(CONFIG_I2S_NUM, sbuf, oframes * 16, &bytes, portMAX_DELAY);
  420. bytes /= 4;
  421. } else {
  422. i2s_write(CONFIG_I2S_NUM, obuf, oframes * bytes_per_frame, &bytes, portMAX_DELAY);
  423. }
  424. fullness = gettime_ms();
  425. if (bytes != oframes * bytes_per_frame) {
  426. LOG_WARN("I2S DMA Overflow! available bytes: %d, I2S wrote %d bytes", oframes * bytes_per_frame, bytes);
  427. }
  428. SET_MIN_MAX( TIME_MEASUREMENT_GET(timer_start),i2s_time);
  429. }
  430. if (spdif) free(sbuf);
  431. return 0;
  432. }
  433. /****************************************************************************************
  434. * Stats output thread
  435. */
  436. static void *output_thread_i2s_stats() {
  437. while (running) {
  438. #ifdef TAS575x
  439. LOG_ERROR("Jack %d Voltage %.2fV", !gpio_get_level(JACK_GPIO), adc1_get_raw(ADC1_CHANNEL_7) / 4095. * (10+174)/10. * 1.1);
  440. #endif
  441. LOCK;
  442. output_state state = output.state;
  443. UNLOCK;
  444. if(state>OUTPUT_STOPPED){
  445. LOG_INFO( "Output State: %d, current sample rate: %d, bytes per frame: %d",state,output.current_sample_rate, bytes_per_frame);
  446. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD1);
  447. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD2);
  448. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD3);
  449. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD4);
  450. LOG_INFO(LINE_MIN_MAX_FORMAT_STREAM, LINE_MIN_MAX_STREAM("stream",s));
  451. LOG_INFO(LINE_MIN_MAX_FORMAT,LINE_MIN_MAX("output",o));
  452. LOG_INFO(LINE_MIN_MAX_FORMAT_FOOTER);
  453. LOG_INFO(LINE_MIN_MAX_FORMAT,LINE_MIN_MAX("received",rec));
  454. LOG_INFO(LINE_MIN_MAX_FORMAT_FOOTER);
  455. LOG_INFO("");
  456. LOG_INFO(" ----------+----------+-----------+-----------+ ");
  457. LOG_INFO(" max (us) | min (us) | avg(us) | count | ");
  458. LOG_INFO(" ----------+----------+-----------+-----------+ ");
  459. LOG_INFO(LINE_MIN_MAX_DURATION_FORMAT,LINE_MIN_MAX_DURATION("Buffering(us)",buffering));
  460. LOG_INFO(LINE_MIN_MAX_DURATION_FORMAT,LINE_MIN_MAX_DURATION("i2s tfr(us)",i2s_time));
  461. LOG_INFO(" ----------+----------+-----------+-----------+");
  462. RESET_ALL_MIN_MAX;
  463. }
  464. usleep(STATS_PERIOD_MS *1000);
  465. }
  466. return NULL;
  467. }
  468. /****************************************************************************************
  469. * DAC specific commands
  470. */
  471. void dac_cmd(dac_cmd_e cmd, ...) {
  472. va_list args;
  473. esp_err_t ret = ESP_OK;
  474. va_start(args, cmd);
  475. #ifdef TAS575x
  476. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  477. switch(cmd) {
  478. case DAC_VOLUME:
  479. LOG_ERROR("volume not handled yet");
  480. break;
  481. default:
  482. i2c_master_start(i2c_cmd);
  483. i2c_master_write_byte(i2c_cmd, I2C_ADDR << 1 | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  484. i2c_master_write_byte(i2c_cmd, tas575x_cmd[cmd].reg, I2C_MASTER_NACK);
  485. i2c_master_write_byte(i2c_cmd, tas575x_cmd[cmd].value, I2C_MASTER_NACK);
  486. i2c_master_stop(i2c_cmd);
  487. ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 50 / portTICK_RATE_MS);
  488. }
  489. i2c_cmd_link_delete(i2c_cmd);
  490. if (ret != ESP_OK) {
  491. LOG_ERROR("could not intialize TAS575x %d", ret);
  492. }
  493. #endif
  494. va_end(args);
  495. }
  496. /****************************************************************************************
  497. * SPDIF support
  498. */
  499. #define PREAMBLE_B (0xE8) //11101000
  500. #define PREAMBLE_M (0xE2) //11100010
  501. #define PREAMBLE_W (0xE4) //11100100
  502. #define VUCP ((0xCC) << 24)
  503. #define VUCP_MUTE ((0xD4) << 24) // To mute PCM, set VUCP = invalid.
  504. extern const u16_t spdif_bmclookup[256];
  505. /*
  506. SPDIF is supposed to be (before BMC encoding, from LSB to MSB)
  507. PPPP AAAA SSSS SSSS SSSS SSSS SSSS VUCP
  508. after BMC encoding, each bits becomes 2 hence this becomes a 64 bits word. The
  509. the trick is to start not with a PPPP sequence but with an VUCP sequence to that
  510. the 16 bits samples are aligned with a BMC word boundary. Note that the LSB of the
  511. audio is transmitted first (not the MSB) and that ESP32 libray sends R then L,
  512. contrary to what seems to be usually done, so (dst) order had to be changed
  513. */
  514. void spdif_convert(ISAMPLE_T *src, size_t frames, u32_t *dst, size_t *count) {
  515. u16_t hi, lo, aux;
  516. // frames are 2 channels of 16 bits
  517. frames *= 2;
  518. while (frames--) {
  519. #if BYTES_PER_FRAME == 4
  520. hi = spdif_bmclookup[(u8_t)(*src >> 8)];
  521. lo = spdif_bmclookup[(u8_t) *src];
  522. #else
  523. hi = spdif_bmclookup[(u8_t)(*src >> 24)];
  524. lo = spdif_bmclookup[(u8_t) *src >> 16];
  525. #endif
  526. lo ^= ~((s16_t)hi) >> 16;
  527. // 16 bits sample:
  528. *(dst+0) = ((u32_t)lo << 16) | hi;
  529. // 4 bits auxillary-audio-databits, the first used as parity
  530. aux = 0xb333 ^ (((u32_t)((s16_t)lo)) >> 17);
  531. // VUCP-Bits: Valid, Subcode, Channelstatus, Parity = 0
  532. // As parity is always 0, we can use fixed preambles
  533. if (++(*count) > 383) {
  534. *(dst+1) = VUCP | (PREAMBLE_B << 16 ) | aux; //special preamble for one of 192 frames
  535. *count = 0;
  536. } else {
  537. *(dst+1) = VUCP | ((((*count) & 0x01) ? PREAMBLE_W : PREAMBLE_M) << 16) | aux;
  538. }
  539. src++;
  540. dst += 2;
  541. }
  542. }
  543. const u16_t spdif_bmclookup[256] = { //biphase mark encoded values (least significant bit first)
  544. 0xcccc, 0x4ccc, 0x2ccc, 0xaccc, 0x34cc, 0xb4cc, 0xd4cc, 0x54cc,
  545. 0x32cc, 0xb2cc, 0xd2cc, 0x52cc, 0xcacc, 0x4acc, 0x2acc, 0xaacc,
  546. 0x334c, 0xb34c, 0xd34c, 0x534c, 0xcb4c, 0x4b4c, 0x2b4c, 0xab4c,
  547. 0xcd4c, 0x4d4c, 0x2d4c, 0xad4c, 0x354c, 0xb54c, 0xd54c, 0x554c,
  548. 0x332c, 0xb32c, 0xd32c, 0x532c, 0xcb2c, 0x4b2c, 0x2b2c, 0xab2c,
  549. 0xcd2c, 0x4d2c, 0x2d2c, 0xad2c, 0x352c, 0xb52c, 0xd52c, 0x552c,
  550. 0xccac, 0x4cac, 0x2cac, 0xacac, 0x34ac, 0xb4ac, 0xd4ac, 0x54ac,
  551. 0x32ac, 0xb2ac, 0xd2ac, 0x52ac, 0xcaac, 0x4aac, 0x2aac, 0xaaac,
  552. 0x3334, 0xb334, 0xd334, 0x5334, 0xcb34, 0x4b34, 0x2b34, 0xab34,
  553. 0xcd34, 0x4d34, 0x2d34, 0xad34, 0x3534, 0xb534, 0xd534, 0x5534,
  554. 0xccb4, 0x4cb4, 0x2cb4, 0xacb4, 0x34b4, 0xb4b4, 0xd4b4, 0x54b4,
  555. 0x32b4, 0xb2b4, 0xd2b4, 0x52b4, 0xcab4, 0x4ab4, 0x2ab4, 0xaab4,
  556. 0xccd4, 0x4cd4, 0x2cd4, 0xacd4, 0x34d4, 0xb4d4, 0xd4d4, 0x54d4,
  557. 0x32d4, 0xb2d4, 0xd2d4, 0x52d4, 0xcad4, 0x4ad4, 0x2ad4, 0xaad4,
  558. 0x3354, 0xb354, 0xd354, 0x5354, 0xcb54, 0x4b54, 0x2b54, 0xab54,
  559. 0xcd54, 0x4d54, 0x2d54, 0xad54, 0x3554, 0xb554, 0xd554, 0x5554,
  560. 0x3332, 0xb332, 0xd332, 0x5332, 0xcb32, 0x4b32, 0x2b32, 0xab32,
  561. 0xcd32, 0x4d32, 0x2d32, 0xad32, 0x3532, 0xb532, 0xd532, 0x5532,
  562. 0xccb2, 0x4cb2, 0x2cb2, 0xacb2, 0x34b2, 0xb4b2, 0xd4b2, 0x54b2,
  563. 0x32b2, 0xb2b2, 0xd2b2, 0x52b2, 0xcab2, 0x4ab2, 0x2ab2, 0xaab2,
  564. 0xccd2, 0x4cd2, 0x2cd2, 0xacd2, 0x34d2, 0xb4d2, 0xd4d2, 0x54d2,
  565. 0x32d2, 0xb2d2, 0xd2d2, 0x52d2, 0xcad2, 0x4ad2, 0x2ad2, 0xaad2,
  566. 0x3352, 0xb352, 0xd352, 0x5352, 0xcb52, 0x4b52, 0x2b52, 0xab52,
  567. 0xcd52, 0x4d52, 0x2d52, 0xad52, 0x3552, 0xb552, 0xd552, 0x5552,
  568. 0xccca, 0x4cca, 0x2cca, 0xacca, 0x34ca, 0xb4ca, 0xd4ca, 0x54ca,
  569. 0x32ca, 0xb2ca, 0xd2ca, 0x52ca, 0xcaca, 0x4aca, 0x2aca, 0xaaca,
  570. 0x334a, 0xb34a, 0xd34a, 0x534a, 0xcb4a, 0x4b4a, 0x2b4a, 0xab4a,
  571. 0xcd4a, 0x4d4a, 0x2d4a, 0xad4a, 0x354a, 0xb54a, 0xd54a, 0x554a,
  572. 0x332a, 0xb32a, 0xd32a, 0x532a, 0xcb2a, 0x4b2a, 0x2b2a, 0xab2a,
  573. 0xcd2a, 0x4d2a, 0x2d2a, 0xad2a, 0x352a, 0xb52a, 0xd52a, 0x552a,
  574. 0xccaa, 0x4caa, 0x2caa, 0xacaa, 0x34aa, 0xb4aa, 0xd4aa, 0x54aa,
  575. 0x32aa, 0xb2aa, 0xd2aa, 0x52aa, 0xcaaa, 0x4aaa, 0x2aaa, 0xaaaa
  576. };