output_i2s.c 20 KB

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  1. /*
  2. * Squeezelite for esp32
  3. *
  4. * (c) Sebastien 2019
  5. * Philippe G. 2019, philippe_44@outlook.com
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation, either version 3 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. */
  21. /*
  22. Synchronisation is a bit of a hack with i2s. The esp32 driver is always
  23. full when it starts, so there is a delay of the total length of buffers.
  24. In other words, i2w_write blocks at first call, until at least one buffer
  25. has been written (it uses a queue with produce / consume).
  26. The first hack is to consume that length at the beginning of tracks when
  27. synchronization is active. It's about ~180ms @ 44.1kHz
  28. The second hack is that we never know exactly the number of frames in the
  29. DMA buffers when we update the output.frames_played_dmp. We assume that
  30. after i2s_write, these buffers are always full so by measuring the gap
  31. between time after i2s_write and update of frames_played_dmp, we have a
  32. good idea of the error.
  33. The third hack is when sample rate changes, buffers are reset and we also
  34. do the change too early, but can't do that exaclty at the right time. So
  35. there might be a pop and a de-sync when sampling rate change happens. Not
  36. sure that using rate_delay would fix that
  37. */
  38. #include "squeezelite.h"
  39. #include "driver/i2s.h"
  40. #include "driver/i2c.h"
  41. #include "driver/gpio.h"
  42. #include "perf_trace.h"
  43. #include <signal.h>
  44. #include "time.h"
  45. #include "led.h"
  46. #define LOCK mutex_lock(outputbuf->mutex)
  47. #define UNLOCK mutex_unlock(outputbuf->mutex)
  48. #define FRAME_BLOCK MAX_SILENCE_FRAMES
  49. // Prevent compile errors if dac output is
  50. // included in the build and not actually activated in menuconfig
  51. #ifndef CONFIG_I2S_BCK_IO
  52. #define CONFIG_I2S_BCK_IO -1
  53. #endif
  54. #ifndef CONFIG_I2S_WS_IO
  55. #define CONFIG_I2S_WS_IO -1
  56. #endif
  57. #ifndef CONFIG_I2S_DO_IO
  58. #define CONFIG_I2S_DO_IO -1
  59. #endif
  60. #ifndef CONFIG_I2S_NUM
  61. #define CONFIG_I2S_NUM -1
  62. #endif
  63. typedef enum { DAC_ON = 0, DAC_OFF, DAC_POWERDOWN, DAC_VOLUME } dac_cmd_e;
  64. // must have an integer ratio with FRAME_BLOCK
  65. #define DMA_BUF_LEN 512
  66. #define DMA_BUF_COUNT 16
  67. #define DECLARE_ALL_MIN_MAX \
  68. DECLARE_MIN_MAX(o); \
  69. DECLARE_MIN_MAX(s); \
  70. DECLARE_MIN_MAX(rec); \
  71. DECLARE_MIN_MAX(i2s_time); \
  72. DECLARE_MIN_MAX(buffering);
  73. #define RESET_ALL_MIN_MAX \
  74. RESET_MIN_MAX(o); \
  75. RESET_MIN_MAX(s); \
  76. RESET_MIN_MAX(rec); \
  77. RESET_MIN_MAX(i2s_time); \
  78. RESET_MIN_MAX(buffering);
  79. #define STATS_PERIOD_MS 5000
  80. extern struct outputstate output;
  81. extern struct buffer *streambuf;
  82. extern struct buffer *outputbuf;
  83. extern u8_t *silencebuf;
  84. static log_level loglevel;
  85. static bool running, isI2SStarted;
  86. static i2s_config_t i2s_config;
  87. static int bytes_per_frame;
  88. static thread_type thread, stats_thread;
  89. static u8_t *obuf;
  90. static bool spdif;
  91. DECLARE_ALL_MIN_MAX;
  92. static int _i2s_write_frames(frames_t out_frames, bool silence, s32_t gainL, s32_t gainR,
  93. s32_t cross_gain_in, s32_t cross_gain_out, ISAMPLE_T **cross_ptr);
  94. static void *output_thread_i2s();
  95. static void *output_thread_i2s_stats();
  96. static void dac_cmd(dac_cmd_e cmd, ...);
  97. static void spdif_convert(ISAMPLE_T *src, size_t frames, u32_t *dst, size_t *count);
  98. #ifdef CONFIG_SQUEEZEAMP
  99. #define TAS575x
  100. #undef CONFIG_I2S_BCK_IO
  101. #define CONFIG_I2S_BCK_IO 33
  102. #undef CONFIG_I2S_WS_IO
  103. #define CONFIG_I2S_WS_IO 25
  104. #undef CONFIG_I2S_DO_IO
  105. #define CONFIG_I2S_DO_IO 32
  106. #undef CONFIG_I2S_NUM
  107. #define CONFIG_I2S_NUM 0
  108. #define I2C_PORT 0
  109. #define I2C_ADDR 0x4c
  110. #define VOLUME_GPIO 33
  111. #define JACK_GPIO 39
  112. struct tas575x_cmd_s {
  113. u8_t reg;
  114. u8_t value;
  115. };
  116. static const struct tas575x_cmd_s tas575x_init_sequence[] = {
  117. { 0x00, 0x00 }, // select page 0
  118. { 0x02, 0x10 }, // standby
  119. { 0x0d, 0x10 }, // use SCK for PLL
  120. { 0x25, 0x08 }, // ignore SCK halt
  121. { 0x02, 0x00 }, // restart
  122. { 0xff, 0xff } // end of table
  123. };
  124. static const i2c_config_t i2c_config = {
  125. .mode = I2C_MODE_MASTER,
  126. .sda_io_num = 27,
  127. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  128. .scl_io_num = 26,
  129. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  130. .master.clk_speed = 100000,
  131. };
  132. static const struct tas575x_cmd_s tas575x_cmd[] = {
  133. { 0x02, 0x00 }, // DAC_ON
  134. { 0x02, 0x10 }, // DAC_OFF
  135. { 0x02, 0x01 }, // DAC_POWERDOWN
  136. };
  137. #endif
  138. /****************************************************************************************
  139. * Initialize the DAC output
  140. */
  141. void output_init_i2s(log_level level, char *device, unsigned output_buf_size, char *params, unsigned rates[], unsigned rate_delay, unsigned idle) {
  142. loglevel = level;
  143. #ifdef TAS575x
  144. spdif = 0;
  145. gpio_pad_select_gpio(JACK_GPIO);
  146. gpio_set_direction(JACK_GPIO, GPIO_MODE_INPUT);
  147. adc1_config_width(ADC_WIDTH_BIT_12);
  148. adc1_config_channel_atten(ADC1_CHANNEL_0,ADC_ATTEN_DB_0);
  149. // init volume & mute
  150. gpio_pad_select_gpio(VOLUME_GPIO);
  151. gpio_set_direction(VOLUME_GPIO, GPIO_MODE_OUTPUT);
  152. gpio_set_level(VOLUME_GPIO, 0);
  153. // configure i2c
  154. i2c_param_config(I2C_PORT, &i2c_config);
  155. i2c_driver_install(I2C_PORT, I2C_MODE_MASTER, false, false, false);
  156. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  157. for (int i = 0; tas575x_init_sequence[i].reg != 0xff; i++) {
  158. i2c_master_start(i2c_cmd);
  159. i2c_master_write_byte(i2c_cmd, I2C_ADDR << 1 | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  160. i2c_master_write_byte(i2c_cmd, tas575x_init_sequence[i].reg, I2C_MASTER_NACK);
  161. i2c_master_write_byte(i2c_cmd, tas575x_init_sequence[i].value, I2C_MASTER_NACK);
  162. LOG_DEBUG("i2c write %x at %u", tas575x_init_sequence[i].reg, tas575x_init_sequence[i].value);
  163. }
  164. i2c_master_stop(i2c_cmd);
  165. esp_err_t ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 500 / portTICK_RATE_MS);
  166. i2c_cmd_link_delete(i2c_cmd);
  167. if (ret != ESP_OK) {
  168. LOG_ERROR("could not intialize TAS575x %d", ret);
  169. }
  170. #endif
  171. #ifdef CONFIG_I2S_BITS_PER_CHANNEL
  172. switch (CONFIG_I2S_BITS_PER_CHANNEL) {
  173. case 24:
  174. output.format = S24_BE;
  175. bytes_per_frame = 2*3;
  176. break;
  177. case 16:
  178. output.format = S16_BE;
  179. bytes_per_frame = 2*2;
  180. break;
  181. case 8:
  182. output.format = S8_BE;
  183. bytes_per_frame = 2*4;
  184. break;
  185. default:
  186. LOG_ERROR("Unsupported bit depth %d",CONFIG_I2S_BITS_PER_CHANNEL);
  187. break;
  188. }
  189. #else
  190. output.format = S16_LE;
  191. bytes_per_frame = 2*2;
  192. #endif
  193. output.write_cb = &_i2s_write_frames;
  194. // spdif needs 16 bytes per frame : 32 bits/sample, 2 channels, BMC encoded
  195. if (spdif) obuf = malloc(FRAME_BLOCK * 16);
  196. else obuf = malloc(FRAME_BLOCK * bytes_per_frame);
  197. if (!obuf) {
  198. LOG_ERROR("Cannot allocate i2s buffer");
  199. return;
  200. }
  201. running=true;
  202. i2s_config.mode = I2S_MODE_MASTER | I2S_MODE_TX;
  203. i2s_config.sample_rate = output.current_sample_rate;
  204. i2s_config.bits_per_sample = bytes_per_frame * 8 / 2;
  205. i2s_config.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT;
  206. i2s_config.communication_format = I2S_COMM_FORMAT_I2S| I2S_COMM_FORMAT_I2S_MSB;
  207. // in case of overflow, do not replay old buffer
  208. i2s_config.tx_desc_auto_clear = true;
  209. i2s_config.dma_buf_count = DMA_BUF_COUNT;
  210. // Counted in frames (but i2s allocates a buffer <= 4092 bytes)
  211. i2s_config.dma_buf_len = DMA_BUF_LEN;
  212. i2s_config.use_apll = true;
  213. i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1; //Interrupt level 1
  214. i2s_pin_config_t pin_config = { .bck_io_num = CONFIG_I2S_BCK_IO, .ws_io_num =
  215. CONFIG_I2S_WS_IO, .data_out_num = CONFIG_I2S_DO_IO, .data_in_num = -1 //Not used
  216. };
  217. LOG_INFO("Initializing I2S with rate: %d, bits per sample: %d, buffer frames: %d, number of buffers: %d ",
  218. i2s_config.sample_rate, i2s_config.bits_per_sample, i2s_config.dma_buf_len, i2s_config.dma_buf_count);
  219. i2s_driver_install(CONFIG_I2S_NUM, &i2s_config, 0, NULL);
  220. i2s_set_pin(CONFIG_I2S_NUM, &pin_config);
  221. i2s_stop(CONFIG_I2S_NUM);
  222. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  223. isI2SStarted=false;
  224. /*
  225. i2s_set_clk(pll, 48000 * 2, 32, 2);
  226. i2s_set_clk(pll, 44100 * 2, 32, 2);
  227. */
  228. pthread_attr_t attr;
  229. pthread_attr_init(&attr);
  230. pthread_attr_setstacksize(&attr, PTHREAD_STACK_MIN + OUTPUT_THREAD_STACK_SIZE);
  231. pthread_create_name(&thread, &attr, output_thread_i2s, NULL, "output_i2s");
  232. pthread_attr_destroy(&attr);
  233. // leave stack size to default
  234. pthread_create_name(&stats_thread, NULL, output_thread_i2s_stats, NULL, "output_i2s_sts");
  235. }
  236. /****************************************************************************************
  237. * Terminate DAC output
  238. */
  239. void output_close_i2s(void) {
  240. LOCK;
  241. running = false;
  242. UNLOCK;
  243. pthread_join(thread, NULL);
  244. pthread_join(stats_thread, NULL);
  245. i2s_driver_uninstall(CONFIG_I2S_NUM);
  246. free(obuf);
  247. #ifdef TAS575x
  248. i2c_driver_delete(I2C_PORT);
  249. #endif
  250. }
  251. /****************************************************************************************
  252. * change volume
  253. */
  254. bool output_volume_i2s(unsigned left, unsigned right) {
  255. #ifdef TAS575x
  256. gpio_set_level(VOLUME_GPIO, left || right);
  257. #endif
  258. return false;
  259. }
  260. /****************************************************************************************
  261. * Write frames to the output buffer
  262. */
  263. static int _i2s_write_frames(frames_t out_frames, bool silence, s32_t gainL, s32_t gainR,
  264. s32_t cross_gain_in, s32_t cross_gain_out, ISAMPLE_T **cross_ptr) {
  265. #if BYTES_PER_FRAME == 8
  266. s32_t *optr;
  267. #endif
  268. if (!silence) {
  269. if (output.fade == FADE_ACTIVE && output.fade_dir == FADE_CROSS && *cross_ptr) {
  270. _apply_cross(outputbuf, out_frames, cross_gain_in, cross_gain_out, cross_ptr);
  271. }
  272. #if BYTES_PER_FRAME == 4
  273. if (gainL != FIXED_ONE || gainR!= FIXED_ONE) {
  274. _apply_gain(outputbuf, out_frames, gainL, gainR);
  275. }
  276. memcpy(obuf, outputbuf->readp, out_frames * bytes_per_frame);
  277. #else
  278. optr = (s32_t*) outputbuf->readp;
  279. #endif
  280. } else {
  281. #if BYTES_PER_FRAME == 4
  282. memcpy(obuf, silencebuf, out_frames * bytes_per_frame);
  283. #else
  284. optr = (s32_t*) silencebuf;
  285. #endif
  286. }
  287. #if BYTES_PER_FRAME == 8
  288. IF_DSD(
  289. if (output.outfmt == DOP) {
  290. update_dop((u32_t *) optr, out_frames, output.invert);
  291. } else if (output.outfmt != PCM && output.invert)
  292. dsd_invert((u32_t *) optr, out_frames);
  293. )
  294. _scale_and_pack_frames(obuf, optr, out_frames, gainL, gainR, output.format);
  295. #endif
  296. return out_frames;
  297. }
  298. /****************************************************************************************
  299. * Main output thread
  300. */
  301. static void *output_thread_i2s() {
  302. size_t count = 0, bytes;
  303. frames_t iframes = FRAME_BLOCK, oframes;
  304. uint32_t timer_start = 0;
  305. int discard = 0;
  306. uint32_t fullness = gettime_ms();
  307. bool synced;
  308. output_state state = OUTPUT_OFF;
  309. while (running) {
  310. TIME_MEASUREMENT_START(timer_start);
  311. LOCK;
  312. // manage led display
  313. if (state != output.state) {
  314. if (output.state == OUTPUT_OFF) led_blink(LED_GREEN, 100, 2500);
  315. else if (output.state == OUTPUT_STOPPED) led_blink(LED_GREEN, 200, 1000);
  316. else if (output.state == OUTPUT_RUNNING) led_on(LED_GREEN);
  317. }
  318. state = output.state;
  319. if (output.state == OUTPUT_OFF) {
  320. UNLOCK;
  321. LOG_INFO("Output state is off.");
  322. if (isI2SStarted) {
  323. isI2SStarted = false;
  324. i2s_stop(CONFIG_I2S_NUM);
  325. dac_cmd(DAC_OFF);
  326. count = 0;
  327. }
  328. usleep(200000);
  329. continue;
  330. } else if (output.state == OUTPUT_STOPPED) {
  331. synced = false;
  332. }
  333. output.updated = gettime_ms();
  334. output.frames_played_dmp = output.frames_played;
  335. // try to estimate how much we have consumed from the DMA buffer
  336. output.device_frames = DMA_BUF_COUNT * DMA_BUF_LEN - ((output.updated - fullness) * output.current_sample_rate) / 1000;
  337. oframes = _output_frames( iframes );
  338. SET_MIN_MAX_SIZED(oframes,rec,iframes);
  339. SET_MIN_MAX_SIZED(_buf_used(outputbuf),o,outputbuf->size);
  340. SET_MIN_MAX_SIZED(_buf_used(streambuf),s,streambuf->size);
  341. SET_MIN_MAX( TIME_MEASUREMENT_GET(timer_start),buffering);
  342. /* must skip first whatever is in the pipe (but not when resuming).
  343. This test is incorrect when we pause a track that has just started,
  344. but this is higly unlikely and I don't have a better one for now */
  345. if (output.state == OUTPUT_START_AT) {
  346. discard = output.frames_played_dmp ? 0 : output.device_frames;
  347. synced = true;
  348. } else if (discard) {
  349. discard -= oframes;
  350. iframes = discard ? min(FRAME_BLOCK, discard) : FRAME_BLOCK;
  351. UNLOCK;
  352. continue;
  353. }
  354. UNLOCK;
  355. // now send all the data
  356. TIME_MEASUREMENT_START(timer_start);
  357. if (!isI2SStarted ) {
  358. isI2SStarted = true;
  359. LOG_INFO("Restarting I2S.");
  360. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  361. i2s_start(CONFIG_I2S_NUM);
  362. dac_cmd(DAC_ON);
  363. }
  364. // this does not work well as set_sample_rates resets the fifos (and it's too early)
  365. if (i2s_config.sample_rate != output.current_sample_rate) {
  366. LOG_INFO("changing sampling rate %u to %u", i2s_config.sample_rate, output.current_sample_rate);
  367. /*
  368. if (synced)
  369. // can sleep for a buffer_queue - 1 and then eat a buffer (discard) if we are synced
  370. usleep(((DMA_BUF_COUNT - 1) * DMA_BUF_LEN * bytes_per_frame * 1000) / 44100 * 1000);
  371. discard = DMA_BUF_COUNT * DMA_BUF_LEN * bytes_per_frame;
  372. }
  373. */
  374. i2s_config.sample_rate = output.current_sample_rate;
  375. i2s_set_sample_rates(CONFIG_I2S_NUM, i2s_config.sample_rate);
  376. // in spif mode, each sample is a 32 bits value and because of BMC, clock rate must be doubled
  377. //i2s_set_clk(0, i2s_config.sample_rate * 2, 32, 2);
  378. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  379. //return;
  380. }
  381. // we assume that here we have been able to entirely fill the DMA buffers
  382. if (spdif) {
  383. spdif_convert((ISAMPLE_T*) obuf, oframes, (u32_t*) obuf, &count);
  384. i2s_write(CONFIG_I2S_NUM, obuf, oframes * 16, &bytes, portMAX_DELAY);
  385. } else {
  386. i2s_write(CONFIG_I2S_NUM, obuf, oframes * bytes_per_frame, &bytes, portMAX_DELAY);
  387. }
  388. fullness = gettime_ms();
  389. if (bytes != oframes * bytes_per_frame) {
  390. LOG_WARN("I2S DMA Overflow! available bytes: %d, I2S wrote %d bytes", oframes * bytes_per_frame, bytes);
  391. }
  392. SET_MIN_MAX( TIME_MEASUREMENT_GET(timer_start),i2s_time);
  393. }
  394. return 0;
  395. }
  396. /****************************************************************************************
  397. * Stats output thread
  398. */
  399. static void *output_thread_i2s_stats() {
  400. while (running) {
  401. LOG_ERROR("Jack %d Voltage %.2fV", !gpio_get_level(JACK_GPIO), adc1_get_raw(ADC1_CHANNEL_0) / 4095. * (10+169)/10. * 1.1);
  402. LOCK;
  403. output_state state = output.state;
  404. UNLOCK;
  405. if(state>OUTPUT_STOPPED){
  406. LOG_INFO( "Output State: %d, current sample rate: %d, bytes per frame: %d",state,output.current_sample_rate, bytes_per_frame);
  407. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD1);
  408. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD2);
  409. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD3);
  410. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD4);
  411. LOG_INFO(LINE_MIN_MAX_FORMAT_STREAM, LINE_MIN_MAX_STREAM("stream",s));
  412. LOG_INFO(LINE_MIN_MAX_FORMAT,LINE_MIN_MAX("output",o));
  413. LOG_INFO(LINE_MIN_MAX_FORMAT_FOOTER);
  414. LOG_INFO(LINE_MIN_MAX_FORMAT,LINE_MIN_MAX("received",rec));
  415. LOG_INFO(LINE_MIN_MAX_FORMAT_FOOTER);
  416. LOG_INFO("");
  417. LOG_INFO(" ----------+----------+-----------+-----------+ ");
  418. LOG_INFO(" max (us) | min (us) | avg(us) | count | ");
  419. LOG_INFO(" ----------+----------+-----------+-----------+ ");
  420. LOG_INFO(LINE_MIN_MAX_DURATION_FORMAT,LINE_MIN_MAX_DURATION("Buffering(us)",buffering));
  421. LOG_INFO(LINE_MIN_MAX_DURATION_FORMAT,LINE_MIN_MAX_DURATION("i2s tfr(us)",i2s_time));
  422. LOG_INFO(" ----------+----------+-----------+-----------+");
  423. RESET_ALL_MIN_MAX;
  424. }
  425. usleep(STATS_PERIOD_MS *1000);
  426. }
  427. return NULL;
  428. }
  429. /****************************************************************************************
  430. * DAC specific commands
  431. */
  432. void dac_cmd(dac_cmd_e cmd, ...) {
  433. va_list args;
  434. esp_err_t ret = ESP_OK;
  435. va_start(args, cmd);
  436. #ifdef TAS575x
  437. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  438. switch(cmd) {
  439. case DAC_VOLUME:
  440. LOG_ERROR("volume not handled yet");
  441. break;
  442. default:
  443. i2c_master_start(i2c_cmd);
  444. i2c_master_write_byte(i2c_cmd, I2C_ADDR << 1 | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  445. i2c_master_write_byte(i2c_cmd, tas575x_cmd[cmd].reg, I2C_MASTER_NACK);
  446. i2c_master_write_byte(i2c_cmd, tas575x_cmd[cmd].value, I2C_MASTER_NACK);
  447. i2c_master_stop(i2c_cmd);
  448. ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 50 / portTICK_RATE_MS);
  449. }
  450. i2c_cmd_link_delete(i2c_cmd);
  451. if (ret != ESP_OK) {
  452. LOG_ERROR("could not intialize TAS575x %d", ret);
  453. }
  454. #endif
  455. va_end(args);
  456. }
  457. #define PREAMBLE_B (0xE8) //11101000
  458. #define PREAMBLE_M (0xE2) //11100010
  459. #define PREAMBLE_W (0xE4) //11100100
  460. #define VUCP ((0xCC) << 24)
  461. #define VUCP_MUTE ((0xD4) << 24) // To mute PCM, set VUCP = invalid.
  462. extern const u16_t spdif_bmclookup[256];
  463. void spdif_convert(ISAMPLE_T *src, size_t frames, u32_t *dst, size_t *count) {
  464. u16_t hi, lo, aux;
  465. size_t pos;
  466. // frames are 2 channels of 16 bits
  467. frames *= 2;
  468. // update frame counter for next call
  469. *count = (*count + frames) % 384;
  470. // start at the end so that we can do in-place
  471. src += frames - 1;
  472. dst += (frames - 1) * 2;
  473. pos = *count ? *count - 1 : 383;
  474. while (frames--) {
  475. #if BYTES_PER_FRAME == 4
  476. hi = spdif_bmclookup[(u8_t)(*src >> 8)];
  477. lo = spdif_bmclookup[(u8_t) *src];
  478. #else
  479. hi = spdif_bmclookup[(u8_t)(*src >> 24)];
  480. lo = spdif_bmclookup[(u8_t) *src >> 16];
  481. #endif
  482. // TODO: verify this cast
  483. lo ^= ~((s16_t)hi) >> 16;
  484. // 16 bits sample:
  485. *(dst+1) = ((u32_t)lo << 16) | hi;
  486. // 4 bits auxillary-audio-databits, the first used as parity
  487. // TODO: verify this cast
  488. aux = 0xb333 ^ (((u32_t)((s16_t)lo)) >> 17);
  489. // VUCP-Bits: Valid, Subcode, Channelstatus, Parity = 0
  490. // As parity is always 0, we can use fixed preambles
  491. if (!pos) {
  492. *dst = VUCP | (PREAMBLE_B << 16 ) | aux; //special preamble for one of 192 frames
  493. pos = 384 - 1;
  494. } else {
  495. *dst = VUCP | (((pos & 0x01) ? PREAMBLE_M : PREAMBLE_W) << 16) | aux;
  496. pos--;
  497. }
  498. src--;
  499. dst -= 2;
  500. }
  501. }
  502. const u16_t spdif_bmclookup[256] = { //biphase mark encoded values (least significant bit first)
  503. 0xcccc, 0x4ccc, 0x2ccc, 0xaccc, 0x34cc, 0xb4cc, 0xd4cc, 0x54cc,
  504. 0x32cc, 0xb2cc, 0xd2cc, 0x52cc, 0xcacc, 0x4acc, 0x2acc, 0xaacc,
  505. 0x334c, 0xb34c, 0xd34c, 0x534c, 0xcb4c, 0x4b4c, 0x2b4c, 0xab4c,
  506. 0xcd4c, 0x4d4c, 0x2d4c, 0xad4c, 0x354c, 0xb54c, 0xd54c, 0x554c,
  507. 0x332c, 0xb32c, 0xd32c, 0x532c, 0xcb2c, 0x4b2c, 0x2b2c, 0xab2c,
  508. 0xcd2c, 0x4d2c, 0x2d2c, 0xad2c, 0x352c, 0xb52c, 0xd52c, 0x552c,
  509. 0xccac, 0x4cac, 0x2cac, 0xacac, 0x34ac, 0xb4ac, 0xd4ac, 0x54ac,
  510. 0x32ac, 0xb2ac, 0xd2ac, 0x52ac, 0xcaac, 0x4aac, 0x2aac, 0xaaac,
  511. 0x3334, 0xb334, 0xd334, 0x5334, 0xcb34, 0x4b34, 0x2b34, 0xab34,
  512. 0xcd34, 0x4d34, 0x2d34, 0xad34, 0x3534, 0xb534, 0xd534, 0x5534,
  513. 0xccb4, 0x4cb4, 0x2cb4, 0xacb4, 0x34b4, 0xb4b4, 0xd4b4, 0x54b4,
  514. 0x32b4, 0xb2b4, 0xd2b4, 0x52b4, 0xcab4, 0x4ab4, 0x2ab4, 0xaab4,
  515. 0xccd4, 0x4cd4, 0x2cd4, 0xacd4, 0x34d4, 0xb4d4, 0xd4d4, 0x54d4,
  516. 0x32d4, 0xb2d4, 0xd2d4, 0x52d4, 0xcad4, 0x4ad4, 0x2ad4, 0xaad4,
  517. 0x3354, 0xb354, 0xd354, 0x5354, 0xcb54, 0x4b54, 0x2b54, 0xab54,
  518. 0xcd54, 0x4d54, 0x2d54, 0xad54, 0x3554, 0xb554, 0xd554, 0x5554,
  519. 0x3332, 0xb332, 0xd332, 0x5332, 0xcb32, 0x4b32, 0x2b32, 0xab32,
  520. 0xcd32, 0x4d32, 0x2d32, 0xad32, 0x3532, 0xb532, 0xd532, 0x5532,
  521. 0xccb2, 0x4cb2, 0x2cb2, 0xacb2, 0x34b2, 0xb4b2, 0xd4b2, 0x54b2,
  522. 0x32b2, 0xb2b2, 0xd2b2, 0x52b2, 0xcab2, 0x4ab2, 0x2ab2, 0xaab2,
  523. 0xccd2, 0x4cd2, 0x2cd2, 0xacd2, 0x34d2, 0xb4d2, 0xd4d2, 0x54d2,
  524. 0x32d2, 0xb2d2, 0xd2d2, 0x52d2, 0xcad2, 0x4ad2, 0x2ad2, 0xaad2,
  525. 0x3352, 0xb352, 0xd352, 0x5352, 0xcb52, 0x4b52, 0x2b52, 0xab52,
  526. 0xcd52, 0x4d52, 0x2d52, 0xad52, 0x3552, 0xb552, 0xd552, 0x5552,
  527. 0xccca, 0x4cca, 0x2cca, 0xacca, 0x34ca, 0xb4ca, 0xd4ca, 0x54ca,
  528. 0x32ca, 0xb2ca, 0xd2ca, 0x52ca, 0xcaca, 0x4aca, 0x2aca, 0xaaca,
  529. 0x334a, 0xb34a, 0xd34a, 0x534a, 0xcb4a, 0x4b4a, 0x2b4a, 0xab4a,
  530. 0xcd4a, 0x4d4a, 0x2d4a, 0xad4a, 0x354a, 0xb54a, 0xd54a, 0x554a,
  531. 0x332a, 0xb32a, 0xd32a, 0x532a, 0xcb2a, 0x4b2a, 0x2b2a, 0xab2a,
  532. 0xcd2a, 0x4d2a, 0x2d2a, 0xad2a, 0x352a, 0xb52a, 0xd52a, 0x552a,
  533. 0xccaa, 0x4caa, 0x2caa, 0xacaa, 0x34aa, 0xb4aa, 0xd4aa, 0x54aa,
  534. 0x32aa, 0xb2aa, 0xd2aa, 0x52aa, 0xcaaa, 0x4aaa, 0x2aaa, 0xaaaa
  535. };