output_i2s.c 25 KB

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  1. /*
  2. * Squeezelite for esp32
  3. *
  4. * (c) Sebastien 2019
  5. * Philippe G. 2019, philippe_44@outlook.com
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation, either version 3 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  19. *
  20. */
  21. /*
  22. Synchronisation is a bit of a hack with i2s. The esp32 driver is always
  23. full when it starts, so there is a delay of the total length of buffers.
  24. In other words, i2s_write blocks at first call, until at least one buffer
  25. has been written (it uses a queue with produce / consume).
  26. The first hack is to consume that length at the beginning of tracks when
  27. synchronization is active. It's about ~180ms @ 44.1kHz
  28. The second hack is that we never know exactly the number of frames in the
  29. DMA buffers when we update the output.frames_played_dmp. We assume that
  30. after i2s_write, these buffers are always full so by measuring the gap
  31. between time after i2s_write and update of frames_played_dmp, we have a
  32. good idea of the error.
  33. The third hack is when sample rate changes, buffers are reset and we also
  34. do the change too early, but can't do that exaclty at the right time. So
  35. there might be a pop and a de-sync when sampling rate change happens. Not
  36. sure that using rate_delay would fix that
  37. */
  38. #include "squeezelite.h"
  39. #include "esp_pthread.h"
  40. #include "driver/i2s.h"
  41. #include "driver/i2c.h"
  42. #include "driver/gpio.h"
  43. #include "perf_trace.h"
  44. #include <signal.h>
  45. #include "time.h"
  46. #include "led.h"
  47. #include "monitor.h"
  48. #include "config.h"
  49. #define LOCK mutex_lock(outputbuf->mutex)
  50. #define UNLOCK mutex_unlock(outputbuf->mutex)
  51. #define FRAME_BLOCK MAX_SILENCE_FRAMES
  52. // Prevent compile errors if dac output is
  53. // included in the build and not actually activated in menuconfig
  54. #ifndef CONFIG_I2S_BCK_IO
  55. #define CONFIG_I2S_BCK_IO -1
  56. #endif
  57. #ifndef CONFIG_I2S_WS_IO
  58. #define CONFIG_I2S_WS_IO -1
  59. #endif
  60. #ifndef CONFIG_I2S_DO_IO
  61. #define CONFIG_I2S_DO_IO -1
  62. #endif
  63. #ifndef CONFIG_I2S_NUM
  64. #define CONFIG_I2S_NUM -1
  65. #endif
  66. #ifndef CONFIG_SPDIF_BCK_IO
  67. #define CONFIG_SPDIF_BCK_IO -1
  68. #endif
  69. #ifndef CONFIG_SPDIF_WS_IO
  70. #define CONFIG_SPDIF_WS_IO -1
  71. #endif
  72. #ifndef CONFIG_SPDIF_DO_IO
  73. #define CONFIG_SPDIF_DO_IO -1
  74. #endif
  75. #ifndef CONFIG_SPDIF_NUM
  76. #define CONFIG_SPDIF_NUM -1
  77. #endif
  78. typedef enum { DAC_ACTIVE = 0, DAC_STANDBY, DAC_DOWN, DAC_ANALOGUE_OFF, DAC_ANALOGUE_ON, DAC_VOLUME } dac_cmd_e;
  79. // must have an integer ratio with FRAME_BLOCK (see spdif comment)
  80. #define DMA_BUF_LEN 512
  81. #define DMA_BUF_COUNT 12
  82. #define DECLARE_ALL_MIN_MAX \
  83. DECLARE_MIN_MAX(o); \
  84. DECLARE_MIN_MAX(s); \
  85. DECLARE_MIN_MAX(rec); \
  86. DECLARE_MIN_MAX(i2s_time); \
  87. DECLARE_MIN_MAX(buffering);
  88. #define RESET_ALL_MIN_MAX \
  89. RESET_MIN_MAX(o); \
  90. RESET_MIN_MAX(s); \
  91. RESET_MIN_MAX(rec); \
  92. RESET_MIN_MAX(i2s_time); \
  93. RESET_MIN_MAX(buffering);
  94. #define STATS_PERIOD_MS 5000
  95. extern struct outputstate output;
  96. extern struct buffer *streambuf;
  97. extern struct buffer *outputbuf;
  98. extern u8_t *silencebuf;
  99. static log_level loglevel;
  100. static bool jack_mutes_amp;
  101. static bool running, isI2SStarted;
  102. static i2s_config_t i2s_config;
  103. static int bytes_per_frame;
  104. static thread_type thread, stats_thread;
  105. static u8_t *obuf;
  106. static frames_t oframes;
  107. static bool spdif;
  108. static size_t dma_buf_frames;
  109. DECLARE_ALL_MIN_MAX;
  110. static int _i2s_write_frames(frames_t out_frames, bool silence, s32_t gainL, s32_t gainR,
  111. s32_t cross_gain_in, s32_t cross_gain_out, ISAMPLE_T **cross_ptr);
  112. static void *output_thread_i2s();
  113. static void *output_thread_i2s_stats();
  114. static void dac_cmd(dac_cmd_e cmd, ...);
  115. static int tas57_detect(void);
  116. static void spdif_convert(ISAMPLE_T *src, size_t frames, u32_t *dst, size_t *count);
  117. static void (*jack_handler_chain)(bool inserted);
  118. #ifdef CONFIG_SQUEEZEAMP
  119. #define TAS57xx
  120. #undef CONFIG_I2S_BCK_IO
  121. #define CONFIG_I2S_BCK_IO 33
  122. #undef CONFIG_I2S_WS_IO
  123. #define CONFIG_I2S_WS_IO 25
  124. #undef CONFIG_I2S_DO_IO
  125. #define CONFIG_I2S_DO_IO 32
  126. #undef CONFIG_I2S_NUM
  127. #define CONFIG_I2S_NUM 0
  128. #undef CONFIG_SPDIF_BCK_IO
  129. #define CONFIG_SPDIF_BCK_IO 33
  130. #undef CONFIG_SPDIF_WS_IO
  131. #define CONFIG_SPDIF_WS_IO 25
  132. #undef CONFIG_SPDIF_DO_IO
  133. #define CONFIG_SPDIF_DO_IO 15
  134. #undef CONFIG_SPDIF_NUM
  135. #define CONFIG_SPDIF_NUM 0
  136. #define I2C_PORT 0
  137. #define VOLUME_GPIO 14
  138. #define TAS575x 0x98
  139. #define TAS578x 0x90
  140. struct tas57xx_cmd_s {
  141. u8_t reg;
  142. u8_t value;
  143. };
  144. u8_t config_spdif_gpio = CONFIG_SPDIF_DO_IO;
  145. static const struct tas57xx_cmd_s tas57xx_init_sequence[] = {
  146. { 0x00, 0x00 }, // select page 0
  147. { 0x02, 0x10 }, // standby
  148. { 0x0d, 0x10 }, // use SCK for PLL
  149. { 0x25, 0x08 }, // ignore SCK halt
  150. { 0x08, 0x10 }, // Mute control enable (from TAS5780)
  151. { 0x54, 0x02 }, // Mute output control (from TAS5780)
  152. { 0x02, 0x00 }, // restart
  153. { 0xff, 0xff } // end of table
  154. };
  155. static const i2c_config_t i2c_config = {
  156. .mode = I2C_MODE_MASTER,
  157. .sda_io_num = 27,
  158. .sda_pullup_en = GPIO_PULLUP_ENABLE,
  159. .scl_io_num = 26,
  160. .scl_pullup_en = GPIO_PULLUP_ENABLE,
  161. .master.clk_speed = 100000,
  162. };
  163. static const struct tas57xx_cmd_s tas57xx_cmd[] = {
  164. { 0x02, 0x00 }, // DAC_ACTIVE
  165. { 0x02, 0x10 }, // DAC_STANDBY
  166. { 0x02, 0x01 }, // DAC_DOWN
  167. { 0x56, 0x10 }, // DAC_ANALOGUE_OFF
  168. { 0x56, 0x00 }, // DAC_ANALOGUE_ON
  169. };
  170. static u8_t tas57_addr;
  171. #endif
  172. /****************************************************************************************
  173. * jack insertion handler
  174. */
  175. static void jack_handler(bool inserted) {
  176. // jack detection bounces a bit but that seems fine
  177. if (jack_mutes_amp) {
  178. LOG_INFO("switching amplifier %s", inserted ? "OFF" : "ON");
  179. if (inserted) dac_cmd(DAC_ANALOGUE_OFF);
  180. else dac_cmd(DAC_ANALOGUE_ON);
  181. }
  182. if (jack_handler_chain) (jack_handler_chain)(inserted);
  183. }
  184. /****************************************************************************************
  185. * Initialize the DAC output
  186. */
  187. void output_init_i2s(log_level level, char *device, unsigned output_buf_size, char *params, unsigned rates[], unsigned rate_delay, unsigned idle) {
  188. loglevel = level;
  189. char *p;
  190. p = config_alloc_get_default(NVS_TYPE_STR, "jack_mutes_amp", "n", 0);
  191. jack_mutes_amp = (strcmp(p,"1") == 0 ||strcasecmp(p,"y") == 0);
  192. free(p);
  193. #ifdef TAS57xx
  194. LOG_INFO("Initializing TAS57xx ");
  195. adc1_config_width(ADC_WIDTH_BIT_12);
  196. adc1_config_channel_atten(ADC1_CHANNEL_7, ADC_ATTEN_DB_0);
  197. // init volume & mute
  198. gpio_pad_select_gpio(VOLUME_GPIO);
  199. gpio_set_direction(VOLUME_GPIO, GPIO_MODE_OUTPUT);
  200. gpio_set_level(VOLUME_GPIO, 0);
  201. // configure i2c
  202. i2c_param_config(I2C_PORT, &i2c_config);
  203. i2c_driver_install(I2C_PORT, I2C_MODE_MASTER, false, false, false);
  204. // find which TAS we are using
  205. tas57_addr = tas57_detect();
  206. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  207. for (int i = 0; tas57xx_init_sequence[i].reg != 0xff; i++) {
  208. i2c_master_start(i2c_cmd);
  209. i2c_master_write_byte(i2c_cmd, tas57_addr | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  210. i2c_master_write_byte(i2c_cmd, tas57xx_init_sequence[i].reg, I2C_MASTER_NACK);
  211. i2c_master_write_byte(i2c_cmd, tas57xx_init_sequence[i].value, I2C_MASTER_NACK);
  212. LOG_DEBUG("i2c write %x at %u", tas57xx_init_sequence[i].reg, tas57xx_init_sequence[i].value);
  213. }
  214. i2c_master_stop(i2c_cmd);
  215. esp_err_t ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 500 / portTICK_RATE_MS);
  216. i2c_cmd_link_delete(i2c_cmd);
  217. if (ret != ESP_OK) {
  218. LOG_ERROR("could not intialize TAS57xx %d", ret);
  219. }
  220. #endif
  221. #ifdef CONFIG_I2S_BITS_PER_CHANNEL
  222. switch (CONFIG_I2S_BITS_PER_CHANNEL) {
  223. case 24:
  224. output.format = S24_BE;
  225. bytes_per_frame = 2*3;
  226. break;
  227. case 16:
  228. output.format = S16_BE;
  229. bytes_per_frame = 2*2;
  230. break;
  231. case 8:
  232. output.format = S8_BE;
  233. bytes_per_frame = 2*4;
  234. break;
  235. default:
  236. LOG_ERROR("Unsupported bit depth %d",CONFIG_I2S_BITS_PER_CHANNEL);
  237. break;
  238. }
  239. #else
  240. output.format = S16_LE;
  241. bytes_per_frame = 2*2;
  242. #endif
  243. if (strcasestr(device, "spdif")) spdif = true;
  244. output.write_cb = &_i2s_write_frames;
  245. obuf = malloc(FRAME_BLOCK * bytes_per_frame);
  246. if (!obuf) {
  247. LOG_ERROR("Cannot allocate i2s buffer");
  248. return;
  249. }
  250. running=true;
  251. i2s_pin_config_t pin_config;
  252. if (spdif) {
  253. pin_config = (i2s_pin_config_t) { .bck_io_num = CONFIG_SPDIF_BCK_IO, .ws_io_num = CONFIG_SPDIF_WS_IO,
  254. .data_out_num = CONFIG_SPDIF_DO_IO, .data_in_num = -1 //Not used
  255. };
  256. i2s_config.sample_rate = output.current_sample_rate * 2;
  257. i2s_config.bits_per_sample = 32;
  258. // Normally counted in frames, but 16 sample are transformed into 32 bits in spdif
  259. i2s_config.dma_buf_len = DMA_BUF_LEN / 2;
  260. i2s_config.dma_buf_count = DMA_BUF_COUNT * 2;
  261. /*
  262. In DMA, we have room for (LEN * COUNT) frames of 32 bits samples that
  263. we push at sample_rate * 2. Each of these peuso-frames is a single true
  264. audio frame. So the real depth is true frames is (LEN * COUNT / 2)
  265. */
  266. dma_buf_frames = DMA_BUF_COUNT * DMA_BUF_LEN / 2;
  267. } else {
  268. pin_config = (i2s_pin_config_t) { .bck_io_num = CONFIG_I2S_BCK_IO, .ws_io_num = CONFIG_I2S_WS_IO,
  269. .data_out_num = CONFIG_I2S_DO_IO, .data_in_num = -1 //Not used
  270. };
  271. i2s_config.sample_rate = output.current_sample_rate;
  272. i2s_config.bits_per_sample = bytes_per_frame * 8 / 2;
  273. // Counted in frames (but i2s allocates a buffer <= 4092 bytes)
  274. i2s_config.dma_buf_len = DMA_BUF_LEN;
  275. i2s_config.dma_buf_count = DMA_BUF_COUNT;
  276. dma_buf_frames = DMA_BUF_COUNT * DMA_BUF_LEN;
  277. #ifdef TAS57xx
  278. gpio_pad_select_gpio(CONFIG_SPDIF_DO_IO);
  279. gpio_set_direction(CONFIG_SPDIF_DO_IO, GPIO_MODE_OUTPUT);
  280. gpio_set_level(CONFIG_SPDIF_DO_IO, 0);
  281. #endif
  282. }
  283. i2s_config.mode = I2S_MODE_MASTER | I2S_MODE_TX;
  284. i2s_config.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT;
  285. i2s_config.communication_format = I2S_COMM_FORMAT_I2S| I2S_COMM_FORMAT_I2S_MSB;
  286. // in case of overflow, do not replay old buffer
  287. i2s_config.tx_desc_auto_clear = true;
  288. i2s_config.use_apll = true;
  289. i2s_config.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1; //Interrupt level 1
  290. LOG_INFO("Initializing I2S mode %s with rate: %d, bits per sample: %d, buffer frames: %d, number of buffers: %d ",
  291. spdif ? "S/PDIF" : "normal",
  292. i2s_config.sample_rate, i2s_config.bits_per_sample, i2s_config.dma_buf_len, i2s_config.dma_buf_count);
  293. i2s_driver_install(CONFIG_I2S_NUM, &i2s_config, 0, NULL);
  294. i2s_set_pin(CONFIG_I2S_NUM, &pin_config);
  295. i2s_stop(CONFIG_I2S_NUM);
  296. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  297. isI2SStarted=false;
  298. dac_cmd(DAC_STANDBY);
  299. jack_handler_chain = jack_handler_svc;
  300. jack_handler_svc = jack_handler;
  301. if (jack_mutes_amp && jack_inserted_svc()) dac_cmd(DAC_ANALOGUE_OFF);
  302. else dac_cmd(DAC_ANALOGUE_ON);
  303. esp_pthread_cfg_t cfg = esp_pthread_get_default_config();
  304. cfg.thread_name= "output_i2s";
  305. cfg.inherit_cfg = false;
  306. cfg.prio = CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT + 1;
  307. cfg.stack_size = PTHREAD_STACK_MIN + OUTPUT_THREAD_STACK_SIZE;
  308. esp_pthread_set_cfg(&cfg);
  309. pthread_create(&thread, NULL, output_thread_i2s, NULL);
  310. cfg.thread_name= "output_i2s_sts";
  311. cfg.prio = CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT - 1;
  312. cfg.stack_size = 2048;
  313. esp_pthread_set_cfg(&cfg);
  314. pthread_create(&stats_thread, NULL, output_thread_i2s_stats, NULL);
  315. }
  316. /****************************************************************************************
  317. * Terminate DAC output
  318. */
  319. void output_close_i2s(void) {
  320. LOCK;
  321. running = false;
  322. UNLOCK;
  323. pthread_join(thread, NULL);
  324. pthread_join(stats_thread, NULL);
  325. i2s_driver_uninstall(CONFIG_I2S_NUM);
  326. free(obuf);
  327. #ifdef TAS57xx
  328. i2c_driver_delete(I2C_PORT);
  329. #endif
  330. }
  331. /****************************************************************************************
  332. * change volume
  333. */
  334. bool output_volume_i2s(unsigned left, unsigned right) {
  335. #ifdef TAS57xx
  336. if (!spdif) {
  337. LOG_INFO("TAS57xx volume (L:%u R:%u)", left, right);
  338. gpio_set_level(VOLUME_GPIO, left || right);
  339. }
  340. #endif
  341. return false;
  342. }
  343. /****************************************************************************************
  344. * Write frames to the output buffer
  345. */
  346. static int _i2s_write_frames(frames_t out_frames, bool silence, s32_t gainL, s32_t gainR,
  347. s32_t cross_gain_in, s32_t cross_gain_out, ISAMPLE_T **cross_ptr) {
  348. #if BYTES_PER_FRAME == 8
  349. s32_t *optr;
  350. #endif
  351. if (!silence) {
  352. if (output.fade == FADE_ACTIVE && output.fade_dir == FADE_CROSS && *cross_ptr) {
  353. _apply_cross(outputbuf, out_frames, cross_gain_in, cross_gain_out, cross_ptr);
  354. }
  355. #if BYTES_PER_FRAME == 4
  356. if (gainL != FIXED_ONE || gainR!= FIXED_ONE) {
  357. _apply_gain(outputbuf, out_frames, gainL, gainR);
  358. }
  359. memcpy(obuf + oframes * bytes_per_frame, outputbuf->readp, out_frames * bytes_per_frame);
  360. #else
  361. optr = (s32_t*) outputbuf->readp;
  362. #endif
  363. } else {
  364. #if BYTES_PER_FRAME == 4
  365. memcpy(obuf + oframes * bytes_per_frame, silencebuf, out_frames * bytes_per_frame);
  366. #else
  367. optr = (s32_t*) silencebuf;
  368. #endif
  369. }
  370. #if BYTES_PER_FRAME == 8
  371. IF_DSD(
  372. if (output.outfmt == DOP) {
  373. update_dop((u32_t *) optr, out_frames, output.invert);
  374. } else if (output.outfmt != PCM && output.invert)
  375. dsd_invert((u32_t *) optr, out_frames);
  376. )
  377. _scale_and_pack_frames(obuf + oframes * bytes_per_frame, optr, out_frames, gainL, gainR, output.format);
  378. #endif
  379. oframes += out_frames;
  380. return out_frames;
  381. }
  382. /****************************************************************************************
  383. * Main output thread
  384. */
  385. static void *output_thread_i2s() {
  386. size_t count = 0, bytes;
  387. frames_t iframes = FRAME_BLOCK;
  388. uint32_t timer_start = 0;
  389. int discard = 0;
  390. uint32_t fullness = gettime_ms();
  391. bool synced;
  392. output_state state = OUTPUT_OFF;
  393. char *sbuf = NULL;
  394. // spdif needs 16 bytes per frame : 32 bits/sample, 2 channels, BMC encoded
  395. if (spdif && (sbuf = malloc(FRAME_BLOCK * 16)) == NULL) {
  396. LOG_ERROR("Cannot allocate SPDIF buffer");
  397. }
  398. while (running) {
  399. TIME_MEASUREMENT_START(timer_start);
  400. LOCK;
  401. // manage led display & analogue
  402. if (state != output.state) {
  403. LOG_INFO("Output state is %d", output.state);
  404. if (output.state == OUTPUT_OFF) led_blink(LED_GREEN, 100, 2500);
  405. else if (output.state == OUTPUT_STOPPED) {
  406. #ifdef TAS57xx
  407. dac_cmd(DAC_ANALOGUE_OFF);
  408. #endif
  409. led_blink(LED_GREEN, 200, 1000);
  410. } else if (output.state == OUTPUT_RUNNING) {
  411. #ifdef TAS57xx
  412. if (!jack_mutes_amp || !jack_inserted_svc()) dac_cmd(DAC_ANALOGUE_ON);
  413. #endif
  414. led_on(LED_GREEN);
  415. }
  416. }
  417. state = output.state;
  418. if (output.state == OUTPUT_OFF) {
  419. UNLOCK;
  420. if (isI2SStarted) {
  421. isI2SStarted = false;
  422. i2s_stop(CONFIG_I2S_NUM);
  423. if (!spdif) dac_cmd(DAC_STANDBY);
  424. count = 0;
  425. }
  426. usleep(200000);
  427. continue;
  428. } else if (output.state == OUTPUT_STOPPED) {
  429. synced = false;
  430. }
  431. oframes = 0;
  432. output.updated = gettime_ms();
  433. output.frames_played_dmp = output.frames_played;
  434. // try to estimate how much we have consumed from the DMA buffer (calculation is incorrect at the very beginning ...)
  435. output.device_frames = dma_buf_frames - ((output.updated - fullness) * output.current_sample_rate) / 1000;
  436. _output_frames( iframes );
  437. // oframes must be a global updated by the write callback
  438. output.frames_in_process = oframes;
  439. SET_MIN_MAX_SIZED(oframes,rec,iframes);
  440. SET_MIN_MAX_SIZED(_buf_used(outputbuf),o,outputbuf->size);
  441. SET_MIN_MAX_SIZED(_buf_used(streambuf),s,streambuf->size);
  442. SET_MIN_MAX( TIME_MEASUREMENT_GET(timer_start),buffering);
  443. /* must skip first whatever is in the pipe (but not when resuming).
  444. This test is incorrect when we pause a track that has just started,
  445. but this is higly unlikely and I don't have a better one for now */
  446. if (output.state == OUTPUT_START_AT) {
  447. discard = output.frames_played_dmp ? 0 : output.device_frames;
  448. synced = true;
  449. } else if (discard) {
  450. discard -= oframes;
  451. iframes = discard ? min(FRAME_BLOCK, discard) : FRAME_BLOCK;
  452. UNLOCK;
  453. continue;
  454. }
  455. UNLOCK;
  456. // now send all the data
  457. TIME_MEASUREMENT_START(timer_start);
  458. if (!isI2SStarted ) {
  459. isI2SStarted = true;
  460. LOG_INFO("Restarting I2S.");
  461. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  462. i2s_start(CONFIG_I2S_NUM);
  463. if (!spdif) dac_cmd(DAC_ACTIVE);
  464. }
  465. // this does not work well as set_sample_rates resets the fifos (and it's too early)
  466. if (i2s_config.sample_rate != output.current_sample_rate) {
  467. LOG_INFO("changing sampling rate %u to %u", i2s_config.sample_rate, output.current_sample_rate);
  468. /*
  469. if (synced)
  470. // can sleep for a buffer_queue - 1 and then eat a buffer (discard) if we are synced
  471. usleep(((DMA_BUF_COUNT - 1) * DMA_BUF_LEN * bytes_per_frame * 1000) / 44100 * 1000);
  472. discard = DMA_BUF_COUNT * DMA_BUF_LEN * bytes_per_frame;
  473. }
  474. */
  475. i2s_config.sample_rate = output.current_sample_rate;
  476. i2s_set_sample_rates(CONFIG_I2S_NUM, spdif ? i2s_config.sample_rate * 2 : i2s_config.sample_rate);
  477. i2s_zero_dma_buffer(CONFIG_I2S_NUM);
  478. //return;
  479. }
  480. // we assume that here we have been able to entirely fill the DMA buffers
  481. if (spdif) {
  482. spdif_convert((ISAMPLE_T*) obuf, oframes, (u32_t*) sbuf, &count);
  483. i2s_write(CONFIG_I2S_NUM, sbuf, oframes * 16, &bytes, portMAX_DELAY);
  484. bytes /= 4;
  485. } else {
  486. i2s_write(CONFIG_I2S_NUM, obuf, oframes * bytes_per_frame, &bytes, portMAX_DELAY);
  487. }
  488. fullness = gettime_ms();
  489. if (bytes != oframes * bytes_per_frame) {
  490. LOG_WARN("I2S DMA Overflow! available bytes: %d, I2S wrote %d bytes", oframes * bytes_per_frame, bytes);
  491. }
  492. SET_MIN_MAX( TIME_MEASUREMENT_GET(timer_start),i2s_time);
  493. }
  494. if (spdif) free(sbuf);
  495. return 0;
  496. }
  497. /****************************************************************************************
  498. * Stats output thread
  499. */
  500. static void *output_thread_i2s_stats() {
  501. while (running) {
  502. LOCK;
  503. output_state state = output.state;
  504. UNLOCK;
  505. if(state>OUTPUT_STOPPED){
  506. LOG_INFO( "Output State: %d, current sample rate: %d, bytes per frame: %d",state,output.current_sample_rate, bytes_per_frame);
  507. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD1);
  508. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD2);
  509. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD3);
  510. LOG_INFO( LINE_MIN_MAX_FORMAT_HEAD4);
  511. LOG_INFO(LINE_MIN_MAX_FORMAT_STREAM, LINE_MIN_MAX_STREAM("stream",s));
  512. LOG_INFO(LINE_MIN_MAX_FORMAT,LINE_MIN_MAX("output",o));
  513. LOG_INFO(LINE_MIN_MAX_FORMAT_FOOTER);
  514. LOG_INFO(LINE_MIN_MAX_FORMAT,LINE_MIN_MAX("received",rec));
  515. LOG_INFO(LINE_MIN_MAX_FORMAT_FOOTER);
  516. LOG_INFO("");
  517. LOG_INFO(" ----------+----------+-----------+-----------+ ");
  518. LOG_INFO(" max (us) | min (us) | avg(us) | count | ");
  519. LOG_INFO(" ----------+----------+-----------+-----------+ ");
  520. LOG_INFO(LINE_MIN_MAX_DURATION_FORMAT,LINE_MIN_MAX_DURATION("Buffering(us)",buffering));
  521. LOG_INFO(LINE_MIN_MAX_DURATION_FORMAT,LINE_MIN_MAX_DURATION("i2s tfr(us)",i2s_time));
  522. LOG_INFO(" ----------+----------+-----------+-----------+");
  523. RESET_ALL_MIN_MAX;
  524. }
  525. usleep(STATS_PERIOD_MS *1000);
  526. }
  527. return NULL;
  528. }
  529. /****************************************************************************************
  530. * DAC specific commands
  531. */
  532. void dac_cmd(dac_cmd_e cmd, ...) {
  533. va_list args;
  534. esp_err_t ret = ESP_OK;
  535. va_start(args, cmd);
  536. #ifdef TAS57xx
  537. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  538. switch(cmd) {
  539. case DAC_VOLUME:
  540. LOG_ERROR("volume not handled yet");
  541. break;
  542. default:
  543. i2c_master_start(i2c_cmd);
  544. i2c_master_write_byte(i2c_cmd, tas57_addr | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  545. i2c_master_write_byte(i2c_cmd, tas57xx_cmd[cmd].reg, I2C_MASTER_NACK);
  546. i2c_master_write_byte(i2c_cmd, tas57xx_cmd[cmd].value, I2C_MASTER_NACK);
  547. i2c_master_stop(i2c_cmd);
  548. ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 50 / portTICK_RATE_MS);
  549. }
  550. i2c_cmd_link_delete(i2c_cmd);
  551. if (ret != ESP_OK) {
  552. LOG_ERROR("could not intialize TAS57xx %d", ret);
  553. }
  554. #endif
  555. va_end(args);
  556. }
  557. /****************************************************************************************
  558. * TAS57 detection
  559. */
  560. #ifdef TAS57xx
  561. static int tas57_detect(void) {
  562. u8_t data, addr[] = {TAS578x, TAS575x};
  563. int ret;
  564. for (int i = 0; i < sizeof(addr); i++) {
  565. i2c_cmd_handle_t i2c_cmd = i2c_cmd_link_create();
  566. i2c_master_start(i2c_cmd);
  567. i2c_master_write_byte(i2c_cmd, addr[i] | I2C_MASTER_WRITE, I2C_MASTER_NACK);
  568. i2c_master_write_byte(i2c_cmd, 00, I2C_MASTER_NACK);
  569. i2c_master_start(i2c_cmd);
  570. i2c_master_write_byte(i2c_cmd, addr[i] | I2C_MASTER_READ, I2C_MASTER_NACK);
  571. i2c_master_read_byte(i2c_cmd, &data, I2C_MASTER_NACK);
  572. i2c_master_stop(i2c_cmd);
  573. ret = i2c_master_cmd_begin(I2C_PORT, i2c_cmd, 50 / portTICK_RATE_MS);
  574. i2c_cmd_link_delete(i2c_cmd);
  575. if (ret == ESP_OK) {
  576. LOG_INFO("Detected TAS @0x%x", addr[i]);
  577. return addr[i];
  578. }
  579. }
  580. return 0;
  581. }
  582. #endif
  583. /****************************************************************************************
  584. * SPDIF support
  585. */
  586. #define PREAMBLE_B (0xE8) //11101000
  587. #define PREAMBLE_M (0xE2) //11100010
  588. #define PREAMBLE_W (0xE4) //11100100
  589. #define VUCP ((0xCC) << 24)
  590. #define VUCP_MUTE ((0xD4) << 24) // To mute PCM, set VUCP = invalid.
  591. extern const u16_t spdif_bmclookup[256];
  592. /*
  593. SPDIF is supposed to be (before BMC encoding, from LSB to MSB)
  594. PPPP AAAA SSSS SSSS SSSS SSSS SSSS VUCP
  595. after BMC encoding, each bits becomes 2 hence this becomes a 64 bits word. The
  596. the trick is to start not with a PPPP sequence but with an VUCP sequence to that
  597. the 16 bits samples are aligned with a BMC word boundary. Note that the LSB of the
  598. audio is transmitted first (not the MSB) and that ESP32 libray sends R then L,
  599. contrary to what seems to be usually done, so (dst) order had to be changed
  600. */
  601. void spdif_convert(ISAMPLE_T *src, size_t frames, u32_t *dst, size_t *count) {
  602. u16_t hi, lo, aux;
  603. // frames are 2 channels of 16 bits
  604. frames *= 2;
  605. while (frames--) {
  606. #if BYTES_PER_FRAME == 4
  607. hi = spdif_bmclookup[(u8_t)(*src >> 8)];
  608. lo = spdif_bmclookup[(u8_t) *src];
  609. #else
  610. hi = spdif_bmclookup[(u8_t)(*src >> 24)];
  611. lo = spdif_bmclookup[(u8_t) *src >> 16];
  612. #endif
  613. lo ^= ~((s16_t)hi) >> 16;
  614. // 16 bits sample:
  615. *(dst+0) = ((u32_t)lo << 16) | hi;
  616. // 4 bits auxillary-audio-databits, the first used as parity
  617. aux = 0xb333 ^ (((u32_t)((s16_t)lo)) >> 17);
  618. // VUCP-Bits: Valid, Subcode, Channelstatus, Parity = 0
  619. // As parity is always 0, we can use fixed preambles
  620. if (++(*count) > 383) {
  621. *(dst+1) = VUCP | (PREAMBLE_B << 16 ) | aux; //special preamble for one of 192 frames
  622. *count = 0;
  623. } else {
  624. *(dst+1) = VUCP | ((((*count) & 0x01) ? PREAMBLE_W : PREAMBLE_M) << 16) | aux;
  625. }
  626. src++;
  627. dst += 2;
  628. }
  629. }
  630. const u16_t spdif_bmclookup[256] = { //biphase mark encoded values (least significant bit first)
  631. 0xcccc, 0x4ccc, 0x2ccc, 0xaccc, 0x34cc, 0xb4cc, 0xd4cc, 0x54cc,
  632. 0x32cc, 0xb2cc, 0xd2cc, 0x52cc, 0xcacc, 0x4acc, 0x2acc, 0xaacc,
  633. 0x334c, 0xb34c, 0xd34c, 0x534c, 0xcb4c, 0x4b4c, 0x2b4c, 0xab4c,
  634. 0xcd4c, 0x4d4c, 0x2d4c, 0xad4c, 0x354c, 0xb54c, 0xd54c, 0x554c,
  635. 0x332c, 0xb32c, 0xd32c, 0x532c, 0xcb2c, 0x4b2c, 0x2b2c, 0xab2c,
  636. 0xcd2c, 0x4d2c, 0x2d2c, 0xad2c, 0x352c, 0xb52c, 0xd52c, 0x552c,
  637. 0xccac, 0x4cac, 0x2cac, 0xacac, 0x34ac, 0xb4ac, 0xd4ac, 0x54ac,
  638. 0x32ac, 0xb2ac, 0xd2ac, 0x52ac, 0xcaac, 0x4aac, 0x2aac, 0xaaac,
  639. 0x3334, 0xb334, 0xd334, 0x5334, 0xcb34, 0x4b34, 0x2b34, 0xab34,
  640. 0xcd34, 0x4d34, 0x2d34, 0xad34, 0x3534, 0xb534, 0xd534, 0x5534,
  641. 0xccb4, 0x4cb4, 0x2cb4, 0xacb4, 0x34b4, 0xb4b4, 0xd4b4, 0x54b4,
  642. 0x32b4, 0xb2b4, 0xd2b4, 0x52b4, 0xcab4, 0x4ab4, 0x2ab4, 0xaab4,
  643. 0xccd4, 0x4cd4, 0x2cd4, 0xacd4, 0x34d4, 0xb4d4, 0xd4d4, 0x54d4,
  644. 0x32d4, 0xb2d4, 0xd2d4, 0x52d4, 0xcad4, 0x4ad4, 0x2ad4, 0xaad4,
  645. 0x3354, 0xb354, 0xd354, 0x5354, 0xcb54, 0x4b54, 0x2b54, 0xab54,
  646. 0xcd54, 0x4d54, 0x2d54, 0xad54, 0x3554, 0xb554, 0xd554, 0x5554,
  647. 0x3332, 0xb332, 0xd332, 0x5332, 0xcb32, 0x4b32, 0x2b32, 0xab32,
  648. 0xcd32, 0x4d32, 0x2d32, 0xad32, 0x3532, 0xb532, 0xd532, 0x5532,
  649. 0xccb2, 0x4cb2, 0x2cb2, 0xacb2, 0x34b2, 0xb4b2, 0xd4b2, 0x54b2,
  650. 0x32b2, 0xb2b2, 0xd2b2, 0x52b2, 0xcab2, 0x4ab2, 0x2ab2, 0xaab2,
  651. 0xccd2, 0x4cd2, 0x2cd2, 0xacd2, 0x34d2, 0xb4d2, 0xd4d2, 0x54d2,
  652. 0x32d2, 0xb2d2, 0xd2d2, 0x52d2, 0xcad2, 0x4ad2, 0x2ad2, 0xaad2,
  653. 0x3352, 0xb352, 0xd352, 0x5352, 0xcb52, 0x4b52, 0x2b52, 0xab52,
  654. 0xcd52, 0x4d52, 0x2d52, 0xad52, 0x3552, 0xb552, 0xd552, 0x5552,
  655. 0xccca, 0x4cca, 0x2cca, 0xacca, 0x34ca, 0xb4ca, 0xd4ca, 0x54ca,
  656. 0x32ca, 0xb2ca, 0xd2ca, 0x52ca, 0xcaca, 0x4aca, 0x2aca, 0xaaca,
  657. 0x334a, 0xb34a, 0xd34a, 0x534a, 0xcb4a, 0x4b4a, 0x2b4a, 0xab4a,
  658. 0xcd4a, 0x4d4a, 0x2d4a, 0xad4a, 0x354a, 0xb54a, 0xd54a, 0x554a,
  659. 0x332a, 0xb32a, 0xd32a, 0x532a, 0xcb2a, 0x4b2a, 0x2b2a, 0xab2a,
  660. 0xcd2a, 0x4d2a, 0x2d2a, 0xad2a, 0x352a, 0xb52a, 0xd52a, 0x552a,
  661. 0xccaa, 0x4caa, 0x2caa, 0xacaa, 0x34aa, 0xb4aa, 0xd4aa, 0x54aa,
  662. 0x32aa, 0xb2aa, 0xd2aa, 0x52aa, 0xcaaa, 0x4aaa, 0x2aaa, 0xaaaa
  663. };