fixed_armv5e.h 4.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151
  1. /* Copyright (C) 2007-2009 Xiph.Org Foundation
  2. Copyright (C) 2003-2008 Jean-Marc Valin
  3. Copyright (C) 2007-2008 CSIRO
  4. Copyright (C) 2013 Parrot */
  5. /*
  6. Redistribution and use in source and binary forms, with or without
  7. modification, are permitted provided that the following conditions
  8. are met:
  9. - Redistributions of source code must retain the above copyright
  10. notice, this list of conditions and the following disclaimer.
  11. - Redistributions in binary form must reproduce the above copyright
  12. notice, this list of conditions and the following disclaimer in the
  13. documentation and/or other materials provided with the distribution.
  14. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  15. ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  16. LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  17. A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
  18. OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19. EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20. PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  21. PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  22. LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  23. NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  24. SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25. */
  26. #ifndef FIXED_ARMv5E_H
  27. #define FIXED_ARMv5E_H
  28. #include "fixed_armv4.h"
  29. /** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */
  30. #undef MULT16_32_Q16
  31. static OPUS_INLINE opus_val32 MULT16_32_Q16_armv5e(opus_val16 a, opus_val32 b)
  32. {
  33. int res;
  34. __asm__(
  35. "#MULT16_32_Q16\n\t"
  36. "smulwb %0, %1, %2\n\t"
  37. : "=r"(res)
  38. : "r"(b),"r"(a)
  39. );
  40. return res;
  41. }
  42. #define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv5e(a, b))
  43. /** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */
  44. #undef MULT16_32_Q15
  45. static OPUS_INLINE opus_val32 MULT16_32_Q15_armv5e(opus_val16 a, opus_val32 b)
  46. {
  47. int res;
  48. __asm__(
  49. "#MULT16_32_Q15\n\t"
  50. "smulwb %0, %1, %2\n\t"
  51. : "=r"(res)
  52. : "r"(b), "r"(a)
  53. );
  54. return SHL32(res,1);
  55. }
  56. #define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv5e(a, b))
  57. /** 16x32 multiply, followed by a 15-bit shift right and 32-bit add.
  58. b must fit in 31 bits.
  59. Result fits in 32 bits. */
  60. #undef MAC16_32_Q15
  61. static OPUS_INLINE opus_val32 MAC16_32_Q15_armv5e(opus_val32 c, opus_val16 a,
  62. opus_val32 b)
  63. {
  64. int res;
  65. __asm__(
  66. "#MAC16_32_Q15\n\t"
  67. "smlawb %0, %1, %2, %3;\n"
  68. : "=r"(res)
  69. : "r"(SHL32(b,1)), "r"(a), "r"(c)
  70. );
  71. return res;
  72. }
  73. #define MAC16_32_Q15(c, a, b) (MAC16_32_Q15_armv5e(c, a, b))
  74. /** 16x32 multiply, followed by a 16-bit shift right and 32-bit add.
  75. Result fits in 32 bits. */
  76. #undef MAC16_32_Q16
  77. static OPUS_INLINE opus_val32 MAC16_32_Q16_armv5e(opus_val32 c, opus_val16 a,
  78. opus_val32 b)
  79. {
  80. int res;
  81. __asm__(
  82. "#MAC16_32_Q16\n\t"
  83. "smlawb %0, %1, %2, %3;\n"
  84. : "=r"(res)
  85. : "r"(b), "r"(a), "r"(c)
  86. );
  87. return res;
  88. }
  89. #define MAC16_32_Q16(c, a, b) (MAC16_32_Q16_armv5e(c, a, b))
  90. /** 16x16 multiply-add where the result fits in 32 bits */
  91. #undef MAC16_16
  92. static OPUS_INLINE opus_val32 MAC16_16_armv5e(opus_val32 c, opus_val16 a,
  93. opus_val16 b)
  94. {
  95. int res;
  96. __asm__(
  97. "#MAC16_16\n\t"
  98. "smlabb %0, %1, %2, %3;\n"
  99. : "=r"(res)
  100. : "r"(a), "r"(b), "r"(c)
  101. );
  102. return res;
  103. }
  104. #define MAC16_16(c, a, b) (MAC16_16_armv5e(c, a, b))
  105. /** 16x16 multiplication where the result fits in 32 bits */
  106. #undef MULT16_16
  107. static OPUS_INLINE opus_val32 MULT16_16_armv5e(opus_val16 a, opus_val16 b)
  108. {
  109. int res;
  110. __asm__(
  111. "#MULT16_16\n\t"
  112. "smulbb %0, %1, %2;\n"
  113. : "=r"(res)
  114. : "r"(a), "r"(b)
  115. );
  116. return res;
  117. }
  118. #define MULT16_16(a, b) (MULT16_16_armv5e(a, b))
  119. #ifdef OPUS_ARM_INLINE_MEDIA
  120. #undef SIG2WORD16
  121. static OPUS_INLINE opus_val16 SIG2WORD16_armv6(opus_val32 x)
  122. {
  123. celt_sig res;
  124. __asm__(
  125. "#SIG2WORD16\n\t"
  126. "ssat %0, #16, %1, ASR #12\n\t"
  127. : "=r"(res)
  128. : "r"(x+2048)
  129. );
  130. return EXTRACT16(res);
  131. }
  132. #define SIG2WORD16(x) (SIG2WORD16_armv6(x))
  133. #endif /* OPUS_ARM_INLINE_MEDIA */
  134. #endif