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+/* Synchronous mode SCSI implementation.
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+ *
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+ * In synchronous mode, the handshake mechanism is not used. Instead
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+ * either end of the communication will just send a bunch of bytes
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+ * and only afterwards checks that the number of acknowledgement
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+ * pulses matches.
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+ *
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+ * The receiving end should latch in the data at the falling edge of
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+ * the request pulse (on either REQ or ACK pin). We use the GD32 EXMC
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+ * peripheral to implement this latching with the NWAIT pin when
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+ * reading data from the host. NOE is used to generate the REQ pulses.
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+ *
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+ * Writing data to the host is simpler, as we can just write it out
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+ * from the GPIO port at our own pace. A timer is used for generating
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+ * the output pulses on REQ pin.
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+ */
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+
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+#include "scsi_accel_sync.h"
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+#include <AzulSCSI_log.h>
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+#include <gd32f20x_exmc.h>
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+#include <scsi.h>
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+
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+#ifndef SCSI_SYNC_MODE_AVAILABLE
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+
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+void scsi_accel_sync_init() {}
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+
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+void scsi_accel_sync_recv(uint8_t *data, uint32_t count, int* parityError, volatile int *resetFlag) {}
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+void scsi_accel_sync_send(const uint8_t* data, uint32_t count, volatile int *resetFlag) {}
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+
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+#else
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+
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+/********************************/
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+/* Transfer from host to device */
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+/********************************/
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+
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+#define SYNC_DMA_BUFSIZE 512
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+static uint32_t g_sync_dma_buf[SYNC_DMA_BUFSIZE];
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+
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+void scsi_accel_sync_init()
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+{
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+ rcu_periph_clock_enable(RCU_EXMC);
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+ rcu_periph_clock_enable(SCSI_EXMC_DMA_RCU);
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+ rcu_periph_clock_enable(SCSI_SYNC_TIMER_RCU);
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+
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+ exmc_norsram_timing_parameter_struct timing_param = {
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+ .asyn_access_mode = EXMC_ACCESS_MODE_A,
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+ .syn_data_latency = EXMC_DATALAT_2_CLK,
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+ .syn_clk_division = EXMC_SYN_CLOCK_RATIO_2_CLK,
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+ .bus_latency = 1,
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+ .asyn_data_setuptime = 2,
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+ .asyn_address_holdtime = 2,
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+ .asyn_address_setuptime = 16
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+ };
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+
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+ exmc_norsram_parameter_struct sram_param = {
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+ .norsram_region = EXMC_BANK0_NORSRAM_REGION0,
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+ .write_mode = EXMC_ASYN_WRITE,
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+ .extended_mode = DISABLE,
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+ .asyn_wait = ENABLE,
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+ .nwait_signal = ENABLE,
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+ .memory_write = DISABLE,
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+ .nwait_config = EXMC_NWAIT_CONFIG_DURING,
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+ .wrap_burst_mode = DISABLE,
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+ .nwait_polarity = EXMC_NWAIT_POLARITY_HIGH,
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+ .burst_mode = DISABLE,
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+ .databus_width = EXMC_NOR_DATABUS_WIDTH_16B,
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+ .memory_type = EXMC_MEMORY_TYPE_SRAM,
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+ .address_data_mux = DISABLE,
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+ .read_write_timing = &timing_param
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+ };
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+
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+ EXMC_SNCTL(EXMC_BANK0_NORSRAM_REGION0) &= ~EXMC_SNCTL_NRBKEN;
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+ exmc_norsram_init(&sram_param);
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+
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+ // DMA used to transfer data from EXMC to RAM
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+ // DMA is used so that if data transfer fails, we can at least abort by resetting CPU.
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+ // Accessing EXMC from the CPU directly hangs it totally if ACK pulses are not received.
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+ dma_parameter_struct exmc_dma_config =
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+ {
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+ .periph_addr = EXMC_NOR_PSRAM,
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+ .periph_width = DMA_PERIPHERAL_WIDTH_16BIT,
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+ .memory_addr = (uint32_t)g_sync_dma_buf,
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+ .memory_width = DMA_MEMORY_WIDTH_16BIT,
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+ .number = 0, // Filled before transfer
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+ .priority = DMA_PRIORITY_MEDIUM,
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+ .periph_inc = DMA_PERIPH_INCREASE_DISABLE,
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+ .memory_inc = DMA_MEMORY_INCREASE_ENABLE,
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+ .direction = DMA_PERIPHERAL_TO_MEMORY
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+ };
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+ dma_init(SCSI_EXMC_DMA, SCSI_EXMC_DMACH, &exmc_dma_config);
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+ dma_memory_to_memory_enable(SCSI_EXMC_DMA, SCSI_EXMC_DMACH);
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+
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+ gpio_init(SCSI_IN_ACK_EXMC_NWAIT_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_IN_ACK_EXMC_NWAIT_PIN);
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+ gpio_init(SCSI_TIMER_IN_PORT, GPIO_MODE_IN_FLOATING, 0, SCSI_TIMER_IN_PIN);
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+
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+ // TIMER1 is used to count ACK pulses
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+ TIMER_CTL0(SCSI_SYNC_TIMER) = 0;
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+ TIMER_SMCFG(SCSI_SYNC_TIMER) = TIMER_SLAVE_MODE_EXTERNAL0 | TIMER_SMCFG_TRGSEL_CI0FE0;
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+ TIMER_CAR(SCSI_SYNC_TIMER) = 65535;
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+ TIMER_PSC(SCSI_SYNC_TIMER) = 0;
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+ TIMER_CHCTL0(SCSI_SYNC_TIMER) = 0x0001; // CH0 as input
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+}
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+
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+void scsi_accel_sync_recv(uint8_t *data, uint32_t count, int* parityError, volatile int *resetFlag)
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+{
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+ // Enable EXMC to drive REQ from EXMC_NOE pin
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+ EXMC_SNCTL(EXMC_BANK0_NORSRAM_REGION0) |= EXMC_SNCTL_NRBKEN;
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+ uint32_t oldmode = GPIO_CTL0(SCSI_OUT_REQ_EXMC_NOE_PORT);
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+ uint32_t newmode = oldmode & ~(0xF << (SCSI_OUT_REQ_EXMC_NOE_IDX * 4));
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+ newmode |= 0xB << (SCSI_OUT_REQ_EXMC_NOE_IDX * 4);
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+ GPIO_CTL0(SCSI_OUT_REQ_EXMC_NOE_PORT) = newmode;
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+
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+ while (count > 0)
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+ {
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+ uint32_t blocksize = (count > SYNC_DMA_BUFSIZE * 2) ? (SYNC_DMA_BUFSIZE * 2) : count;
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+ count -= blocksize;
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+
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+ DMA_CHCNT(SCSI_EXMC_DMA, SCSI_EXMC_DMACH) = blocksize;
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+ DMA_CHCTL(SCSI_EXMC_DMA, SCSI_EXMC_DMACH) |= DMA_CHXCTL_CHEN;
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+
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+ uint16_t *src = (uint16_t*)g_sync_dma_buf;
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+ uint8_t *dst = data;
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+ uint8_t *end = data + blocksize;
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+ uint32_t start = millis();
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+ while (dst < end)
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+ {
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+ uint32_t remain = DMA_CHCNT(SCSI_EXMC_DMA, SCSI_EXMC_DMACH);
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+
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+ while (dst < end - remain)
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+ {
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+ *dst++ = ~(*src++) >> SCSI_EXMC_DATA_SHIFT;
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+ }
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+
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+ if ((uint32_t)(millis() - start) > 500 || *resetFlag)
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+ {
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+ // We are in a pinch here: without ACK pulses coming, the EXMC and DMA peripherals
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+ // are locked up. The only way out is a whole system reset.
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+ azlog("SCSI Synchronous read timeout: resetting system");
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+ NVIC_SystemReset();
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+ }
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+ }
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+
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+ DMA_CHCTL(SCSI_EXMC_DMA, SCSI_EXMC_DMACH) &= ~DMA_CHXCTL_CHEN;
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+ data = end;
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+ }
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+
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+ GPIO_CTL0(SCSI_OUT_REQ_EXMC_NOE_PORT) = oldmode;
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+ EXMC_SNCTL(EXMC_BANK0_NORSRAM_REGION0) &= ~EXMC_SNCTL_NRBKEN;
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+}
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+
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+/********************************/
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+/* Transfer from device to host */
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+/********************************/
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+
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+// Simple delay, about 10 ns.
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+// This is less likely to get optimized away by CPU pipeline than nop
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+#define ASM_DELAY() \
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+" ldr %[tmp2], [%[reset_flag]] \n"
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+
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+// Take 8 bits from d and format them for writing
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+// d is name of data operand, b is bit offset
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+#define ASM_LOAD_DATA(b) \
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+" ubfx %[tmp1], %[data], #" b ", #8 \n" \
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+" ldr %[tmp1], [%[byte_lookup], %[tmp1], lsl #2] \n"
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+
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+// Write data to SCSI port and set REQ high
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+#define ASM_SEND_DATA() \
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+" str %[tmp1], [%[out_port_bop]] \n"
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+
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+// Set REQ low
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+#define ASM_SET_REQ_LOW() \
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+" mov %[tmp2], %[bop_req_low] \n" \
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+" str %[tmp2], [%[out_port_bop]] \n"
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+
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+// Wait for ACK_TIMER - n to be less than num_bytes
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+#define ASM_WAIT_ACK_TIMER(n) \
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+ "wait_acks_" n "_%=: \n" \
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+ " ldr %[tmp2], [%[ack_timer]] \n" \
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+ " sub %[tmp2], # " n " \n" \
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+ " cmp %[tmp2], %[num_bytes] \n" \
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+ " ble got_acks_" n "_%= \n" \
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+ " ldr %[tmp2], [%[reset_flag]] \n" \
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+ " cmp %[tmp2], #0 \n" \
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+ " bne all_done_%= \n" \
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+ " b wait_acks_" n "_%= \n" \
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+ "got_acks_" n "_%=: \n"
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+
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+// Send 4 bytes
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+#define ASM_SEND_4BYTES() \
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+ASM_LOAD_DATA("0") \
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+ASM_SEND_DATA() \
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+ASM_DELAY1() \
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+ASM_SET_REQ_LOW() \
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+ASM_DELAY2() \
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+ASM_LOAD_DATA("8") \
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+ASM_SEND_DATA() \
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+ASM_DELAY1() \
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+ASM_SET_REQ_LOW() \
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+ASM_DELAY2() \
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+ASM_LOAD_DATA("16") \
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+ASM_SEND_DATA() \
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+ASM_DELAY1() \
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+ASM_SET_REQ_LOW() \
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+ASM_DELAY2() \
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+ASM_LOAD_DATA("24") \
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+ASM_SEND_DATA() \
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+ASM_DELAY1() \
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+ASM_SET_REQ_LOW()
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+
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+// Send 1 byte, wait for ACK_TIMER to be less than num_bytes + n and send 3 bytes more
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+// This interleaving minimizes the delay caused by WAIT_ACK_TIMER.
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+#define ASM_SEND_4BYTES_WAIT(n) \
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+ASM_LOAD_DATA("0") \
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+ASM_SEND_DATA() \
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+ASM_DELAY2() \
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+ASM_LOAD_DATA("8") \
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+ASM_SET_REQ_LOW() \
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+ASM_DELAY2() \
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+" ldr %[tmp2], [%[ack_timer]] \n" \
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+" sub %[tmp2], # " n " \n" \
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+ASM_SEND_DATA() \
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+" cmp %[tmp2], %[num_bytes] \n" \
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+" ble got_acks_" n "_%= \n" \
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+ASM_WAIT_ACK_TIMER(n) \
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+ASM_DELAY2() \
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+ASM_SET_REQ_LOW() \
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+ASM_DELAY2() \
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+ASM_LOAD_DATA("16") \
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+ASM_SEND_DATA() \
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+ASM_DELAY1() \
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+ASM_SET_REQ_LOW() \
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+ASM_DELAY2() \
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+ASM_LOAD_DATA("24") \
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+ASM_SEND_DATA() \
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+ASM_DELAY1() \
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+ASM_SET_REQ_LOW() \
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+
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+// Specialized routine for settings:
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+// <=100 ns period, >=15 outstanding REQs
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+static void sync_send_100ns_15off(const uint8_t *buf, uint32_t num_bytes, volatile int *resetFlag)
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+{
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+ volatile uint32_t *out_port_bop = (volatile uint32_t*)&GPIO_BOP(SCSI_OUT_PORT);
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+ volatile uint32_t *ack_timer = &TIMER_CNT(SCSI_SYNC_TIMER);
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+ const uint32_t *byte_lookup = g_scsi_out_byte_to_bop;
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+ register uint32_t tmp1 = 0;
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+ register uint32_t tmp2 = 0;
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+ register uint32_t data = 0;
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+
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+#define ASM_DELAY1()
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+#define ASM_DELAY2() ASM_DELAY()
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+
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+ asm volatile (
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+ "main_loop_%=: \n"
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+ " subs %[num_bytes], %[num_bytes], #16 \n"
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+ " bmi last_bytes_%= \n"
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+
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+ /* At each point make sure there is at most 15 bytes in flight */
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES_WAIT("22")
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+ ASM_DELAY2()
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES()
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+ ASM_DELAY2()
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES_WAIT("14")
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+ ASM_DELAY2()
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES()
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+
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+ " cbz %[num_bytes], all_done_%= \n"
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+ " b main_loop_%= \n"
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+
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+ "last_bytes_%=: \n"
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+ " add %[num_bytes], %[num_bytes], #16 \n"
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+ "last_bytes_loop_%=: \n"
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+ " ldrb %[data], [%[buf]], #1 \n"
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+ ASM_LOAD_DATA("0")
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+
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+ ASM_WAIT_ACK_TIMER("15")
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+ ASM_SEND_DATA()
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+ ASM_DELAY1()
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+ ASM_SET_REQ_LOW()
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+ ASM_DELAY2()
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+
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+ " subs %[num_bytes], %[num_bytes], #1 \n"
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+ " bne last_bytes_loop_%= \n"
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+ "all_done_%=: \n"
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+ ASM_DELAY1()
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+
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+ : /* Output */ [tmp1] "+l" (tmp1), [tmp2] "+l" (tmp2), [data] "+r" (data),
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+ [buf] "+r" (buf), [num_bytes] "+r" (num_bytes)
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+ : /* Input */ [ack_timer] "r" (ack_timer),
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+ [bop_req_low] "I" (SCSI_OUT_REQ << 16),
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+ [out_port_bop] "r"(out_port_bop),
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+ [byte_lookup] "r" (byte_lookup),
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+ [reset_flag] "r" (resetFlag)
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+ : /* Clobber */);
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+
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+#undef ASM_DELAY1
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+#undef ASM_DELAY2
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+
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+ SCSI_RELEASE_DATA_REQ();
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+}
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+
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+// Specialized routine for settings:
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+// <=200 ns period, >=15 outstanding REQs
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+static void sync_send_200ns_15off(const uint8_t *buf, uint32_t num_bytes, volatile int *resetFlag)
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+{
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+ volatile uint32_t *out_port_bop = (volatile uint32_t*)&GPIO_BOP(SCSI_OUT_PORT);
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+ volatile uint32_t *ack_timer = &TIMER_CNT(SCSI_SYNC_TIMER);
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+ const uint32_t *byte_lookup = g_scsi_out_byte_to_bop;
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+ register uint32_t tmp1 = 0;
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+ register uint32_t tmp2 = 0;
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+ register uint32_t data = 0;
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+
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+#define ASM_DELAY1() ASM_DELAY() ASM_DELAY() ASM_DELAY()
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+#define ASM_DELAY2() ASM_DELAY() ASM_DELAY() ASM_DELAY() ASM_DELAY()
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+
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+ asm volatile (
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+ "main_loop_%=: \n"
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+ " subs %[num_bytes], %[num_bytes], #16 \n"
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+ " bmi last_bytes_%= \n"
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+
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+ /* At each point make sure there is at most 15 bytes in flight */
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES_WAIT("22")
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+ ASM_DELAY2()
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES()
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+ ASM_DELAY2()
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES_WAIT("14")
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+ ASM_DELAY2()
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+ " ldr %[data], [%[buf]], #4 \n"
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+ ASM_SEND_4BYTES()
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+
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+ " cbz %[num_bytes], all_done_%= \n"
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+ " b main_loop_%= \n"
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+
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+ "last_bytes_%=: \n"
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+ " add %[num_bytes], %[num_bytes], #16 \n"
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+ "last_bytes_loop_%=: \n"
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+ " ldrb %[data], [%[buf]], #1 \n"
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+ ASM_LOAD_DATA("0")
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+
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+ ASM_WAIT_ACK_TIMER("15")
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+ ASM_SEND_DATA()
|
|
|
+ ASM_DELAY1()
|
|
|
+ ASM_SET_REQ_LOW()
|
|
|
+ ASM_DELAY2()
|
|
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+
|
|
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+ " subs %[num_bytes], %[num_bytes], #1 \n"
|
|
|
+ " bne last_bytes_loop_%= \n"
|
|
|
+ "all_done_%=: \n"
|
|
|
+ ASM_DELAY1()
|
|
|
+
|
|
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+ : /* Output */ [tmp1] "+l" (tmp1), [tmp2] "+l" (tmp2), [data] "+r" (data),
|
|
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+ [buf] "+r" (buf), [num_bytes] "+r" (num_bytes)
|
|
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+ : /* Input */ [ack_timer] "r" (ack_timer),
|
|
|
+ [bop_req_low] "I" (SCSI_OUT_REQ << 16),
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|
|
+ [out_port_bop] "r"(out_port_bop),
|
|
|
+ [byte_lookup] "r" (byte_lookup),
|
|
|
+ [reset_flag] "r" (resetFlag)
|
|
|
+ : /* Clobber */);
|
|
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+
|
|
|
+#undef ASM_DELAY1
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|
|
+#undef ASM_DELAY2
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|
|
+
|
|
|
+ SCSI_RELEASE_DATA_REQ();
|
|
|
+}
|
|
|
+
|
|
|
+// Specialized routine for settings:
|
|
|
+// <=260 ns period, >=7 outstanding REQs
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|
|
+static void sync_send_260ns_7off(const uint8_t *buf, uint32_t num_bytes, volatile int *resetFlag)
|
|
|
+{
|
|
|
+ volatile uint32_t *out_port_bop = (volatile uint32_t*)&GPIO_BOP(SCSI_OUT_PORT);
|
|
|
+ volatile uint32_t *ack_timer = &TIMER_CNT(SCSI_SYNC_TIMER);
|
|
|
+ const uint32_t *byte_lookup = g_scsi_out_byte_to_bop;
|
|
|
+ register uint32_t tmp1 = 0;
|
|
|
+ register uint32_t tmp2 = 0;
|
|
|
+ register uint32_t data = 0;
|
|
|
+
|
|
|
+#define ASM_DELAY1() ASM_DELAY() ASM_DELAY() ASM_DELAY() ASM_DELAY() \
|
|
|
+ ASM_DELAY() ASM_DELAY()
|
|
|
+#define ASM_DELAY2() ASM_DELAY() ASM_DELAY() ASM_DELAY() ASM_DELAY() \
|
|
|
+ ASM_DELAY() ASM_DELAY() ASM_DELAY() ASM_DELAY()
|
|
|
+
|
|
|
+ asm volatile (
|
|
|
+ "main_loop_%=: \n"
|
|
|
+ " subs %[num_bytes], %[num_bytes], #4 \n"
|
|
|
+ " bmi last_bytes_%= \n"
|
|
|
+
|
|
|
+ /* At each point make sure there is at most 3 bytes in flight */
|
|
|
+ " ldr %[data], [%[buf]], #4 \n"
|
|
|
+ ASM_SEND_4BYTES_WAIT("7")
|
|
|
+
|
|
|
+ " cbz %[num_bytes], all_done_%= \n"
|
|
|
+ " b main_loop_%= \n"
|
|
|
+
|
|
|
+ "last_bytes_%=: \n"
|
|
|
+ " add %[num_bytes], %[num_bytes], #4 \n"
|
|
|
+ "last_bytes_loop_%=: \n"
|
|
|
+ " ldrb %[data], [%[buf]], #1 \n"
|
|
|
+ ASM_LOAD_DATA("0")
|
|
|
+
|
|
|
+ ASM_WAIT_ACK_TIMER("5")
|
|
|
+ ASM_SEND_DATA()
|
|
|
+ ASM_DELAY1()
|
|
|
+ ASM_SET_REQ_LOW()
|
|
|
+ ASM_DELAY2()
|
|
|
+
|
|
|
+ " subs %[num_bytes], %[num_bytes], #1 \n"
|
|
|
+ " bne last_bytes_loop_%= \n"
|
|
|
+ "all_done_%=: \n"
|
|
|
+ ASM_DELAY1()
|
|
|
+
|
|
|
+ : /* Output */ [tmp1] "+l" (tmp1), [tmp2] "+l" (tmp2), [data] "+r" (data),
|
|
|
+ [buf] "+r" (buf), [num_bytes] "+r" (num_bytes)
|
|
|
+ : /* Input */ [ack_timer] "r" (ack_timer),
|
|
|
+ [bop_req_low] "I" (SCSI_OUT_REQ << 16),
|
|
|
+ [out_port_bop] "r"(out_port_bop),
|
|
|
+ [byte_lookup] "r" (byte_lookup),
|
|
|
+ [reset_flag] "r" (resetFlag)
|
|
|
+ : /* Clobber */);
|
|
|
+
|
|
|
+#undef ASM_DELAY1
|
|
|
+#undef ASM_DELAY2
|
|
|
+
|
|
|
+ SCSI_RELEASE_DATA_REQ();
|
|
|
+}
|
|
|
+
|
|
|
+void scsi_accel_sync_send(const uint8_t* data, uint32_t count, volatile int *resetFlag)
|
|
|
+{
|
|
|
+ // Timer counts down from the initial number of bytes.
|
|
|
+ TIMER_CNT(SCSI_SYNC_TIMER) = count;
|
|
|
+ TIMER_CTL0(SCSI_SYNC_TIMER) = TIMER_CTL0_CEN | TIMER_CTL0_DIR;
|
|
|
+
|
|
|
+ int syncOffset = scsiDev.target->syncOffset;
|
|
|
+ int syncPeriod = scsiDev.target->syncPeriod;
|
|
|
+
|
|
|
+ if (syncOffset >= 15 && syncPeriod <= 25)
|
|
|
+ {
|
|
|
+ sync_send_100ns_15off(data, count, resetFlag);
|
|
|
+ }
|
|
|
+ else if (syncOffset >= 15 && syncPeriod <= 50)
|
|
|
+ {
|
|
|
+ sync_send_200ns_15off(data, count, resetFlag);
|
|
|
+ }
|
|
|
+ else if (syncOffset >= 7 && syncPeriod <= 65)
|
|
|
+ {
|
|
|
+ sync_send_260ns_7off(data, count, resetFlag);
|
|
|
+ }
|
|
|
+ else
|
|
|
+ {
|
|
|
+ azdbg("No optimized routine for syncOffset=", syncOffset, " syndPeriod=", syncPeriod, ", using fallback");
|
|
|
+ while (count-- > 0)
|
|
|
+ {
|
|
|
+ while (TIMER_CNT(SCSI_SYNC_TIMER) > count + syncOffset && !*resetFlag);
|
|
|
+
|
|
|
+ SCSI_OUT_DATA(*data++);
|
|
|
+ delay_ns(syncPeriod * 2);
|
|
|
+ SCSI_OUT(REQ, 0);
|
|
|
+ delay_ns(syncPeriod * 2);
|
|
|
+ }
|
|
|
+ delay_ns(syncPeriod * 2);
|
|
|
+ SCSI_RELEASE_DATA_REQ();
|
|
|
+ }
|
|
|
+
|
|
|
+ while (TIMER_CNT(SCSI_SYNC_TIMER) > 0 && !*resetFlag);
|
|
|
+
|
|
|
+ TIMER_CTL0(SCSI_SYNC_TIMER) = 0;
|
|
|
+}
|
|
|
+
|
|
|
+
|
|
|
+#endif
|
Alex Perez
