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@@ -76,21 +76,16 @@ void EXTI4_IRQHandler()
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}
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}
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-#if 0
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-uint8_t
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-scsiReadDBxPins()
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+static void assertFail()
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{
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- return
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- (SCSI_ReadPin(SCSI_In_DBx_DB7) << 7) |
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- (SCSI_ReadPin(SCSI_In_DBx_DB6) << 6) |
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- (SCSI_ReadPin(SCSI_In_DBx_DB5) << 5) |
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- (SCSI_ReadPin(SCSI_In_DBx_DB4) << 4) |
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- (SCSI_ReadPin(SCSI_In_DBx_DB3) << 3) |
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- (SCSI_ReadPin(SCSI_In_DBx_DB2) << 2) |
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- (SCSI_ReadPin(SCSI_In_DBx_DB1) << 1) |
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- SCSI_ReadPin(SCSI_In_DBx_DB0);
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+ while (1)
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+ {
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+ s2s_ledOn();
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+ s2s_delay_ms(100);
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+ s2s_ledOff();
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+ s2s_delay_ms(100);
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+ }
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}
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-#endif
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static void
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startScsiRx(uint32_t count)
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@@ -103,6 +98,12 @@ startScsiRx(uint32_t count)
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uint8_t
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scsiReadByte(void)
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{
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+#if FIFODEBUG
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+ if (!scsiPhyFifoAltEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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startScsiRx(1);
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trace(trace_spinPhyRxFifo);
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@@ -111,6 +112,16 @@ scsiReadByte(void)
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uint8_t val = scsiPhyRx();
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// TODO scsiDev.parityError = scsiDev.parityError || SCSI_Parity_Error_Read();
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+#if FIFODEBUG
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+ if (!scsiPhyFifoEmpty()) {
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+ int j = 0;
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+ uint8_t k __attribute((unused));
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+ while (!scsiPhyFifoEmpty()) { k = scsiPhyRx(); ++j; }
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+
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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return val;
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}
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@@ -176,6 +187,13 @@ scsiRead(uint8_t* data, uint32_t count)
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chunk = chunk & 0xFFFFFFF8;
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}
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+#if FIFODEBUG
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+ if (!scsiPhyFifoAltEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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+
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startScsiRx(chunk);
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// Wait for the next scsi interrupt (or the 1ms systick)
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__WFI();
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@@ -208,6 +226,14 @@ scsiRead(uint8_t* data, uint32_t count)
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};
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}
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+#if FIFODEBUG
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+ if (!scsiPhyFifoEmpty()) {
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+ int j = 0;
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+ while (!scsiPhyFifoEmpty()) { scsiPhyRx(); ++j; }
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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i += chunk;
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}
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}
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@@ -215,12 +241,25 @@ scsiRead(uint8_t* data, uint32_t count)
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void
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scsiWriteByte(uint8_t value)
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{
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+#if FIFODEBUG
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+ if (!scsiPhyFifoEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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trace(trace_spinPhyTxFifo);
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scsiPhyTx(value);
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scsiPhyFifoFlip();
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trace(trace_spinTxComplete);
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while (!scsiPhyComplete() && likely(!scsiDev.resetFlag)) {}
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+
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+#if FIFODEBUG
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+ if (!scsiPhyFifoAltEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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}
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static void
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@@ -277,6 +316,13 @@ scsiWrite(const uint8_t* data, uint32_t count)
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uint32_t chunk = ((count - i) > SCSI_FIFO_DEPTH)
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? SCSI_FIFO_DEPTH : (count - i);
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+#if FIFODEBUG
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+ if (!scsiPhyFifoEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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+
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if (chunk < 16)
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{
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scsiWritePIO(data + i, chunk);
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@@ -305,6 +351,14 @@ scsiWrite(const uint8_t* data, uint32_t count)
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}
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while (!scsiPhyComplete() && likely(!scsiDev.resetFlag)) {}
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+
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+#if FIFODEBUG
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+ if (!scsiPhyFifoAltEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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+
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scsiPhyFifoFlip();
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#if 0
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// TODO NEED SCSI IRQs
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@@ -314,6 +368,13 @@ scsiWrite(const uint8_t* data, uint32_t count)
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i += chunk;
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}
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while (!scsiPhyComplete() && likely(!scsiDev.resetFlag)) {}
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+
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+#if FIFODEBUG
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+ if (!scsiPhyFifoAltEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+#endif
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}
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static inline void busSettleDelay(void)
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@@ -325,22 +386,25 @@ static inline void busSettleDelay(void)
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void scsiEnterBusFree()
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{
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- *SCSI_CTRL_PHASE = 0;
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*SCSI_CTRL_BSY = 0x00;
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+ // We now have a Bus Clear Delay of 800ns to release remaining signals.
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+ *SCSI_CTRL_PHASE = 0;
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}
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void scsiEnterPhase(int phase)
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{
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// ANSI INCITS 362-2002 SPI-3 10.7.1:
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// Phase changes are not allowed while REQ or ACK is asserted.
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-#if 0
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- while (likely(!scsiDev.resetFlag) &&
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- (SCSI_ReadPin(SCSI_In_REQ) || SCSI_ReadFilt(SCSI_Filt_ACK))
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- ) {}
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-#endif
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+ while (likely(!scsiDev.resetFlag) && scsiStatusACK()) {}
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int newPhase = phase > 0 ? phase : 0;
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- if (newPhase != *SCSI_CTRL_PHASE)
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+ int oldPhase = *SCSI_CTRL_PHASE;
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+
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+ if (!scsiPhyFifoEmpty() || !scsiPhyFifoAltEmpty()) {
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+ // Force a lock-up.
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+ assertFail();
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+ }
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+ if (newPhase != oldPhase)
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{
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*SCSI_CTRL_PHASE = newPhase;
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busSettleDelay();
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@@ -349,6 +413,7 @@ void scsiEnterPhase(int phase)
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{
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s2s_delay_us(100);
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}
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+
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}
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}
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@@ -466,13 +531,7 @@ void scsiPhyReset()
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{
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if (scsiDev.data[j] != (uint8_t) j)
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{
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- while (1)
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- {
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- s2s_ledOn();
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- s2s_delay_ms(100);
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- s2s_ledOff();
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- s2s_delay_ms(100);
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- }
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+ assertFail();
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}
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}
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