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@@ -56,9 +56,6 @@
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// Replaced with method due to delays
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// #define scsiFifoReady() (HAL_GPIO_ReadPin(GPIOE, FPGA_GPIO3_Pin) != 0)
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-#define scsiPhyFifoFull() ((*SCSI_STS_FIFO & 0x01) != 0)
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-#define scsiPhyFifoEmpty() ((*SCSI_STS_FIFO & 0x02) != 0)
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-
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#define scsiPhyTx(val) *SCSI_FIFO_DATA = (val)
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// little endian specific !. Also relies on the fsmc outputting the lower
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