|  | @@ -767,7 +767,7 @@ static void scsidma_config_gpio()
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														|  |      else if (g_scsi_dma_state == SCSIDMA_WRITE)
 |  |      else if (g_scsi_dma_state == SCSIDMA_WRITE)
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														|  |      {
 |  |      {
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														|  |          // Make sure the initial state of all pins is high and output
 |  |          // Make sure the initial state of all pins is high and output
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														|  | -        pio_sm_set_pins(SCSI_DMA_PIO, SCSI_DATA_SM, is202309a() ? 0x801FF : 0x201FF);
 |  | 
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														|  | 
 |  | +        pio_sm_set_pins(SCSI_DMA_PIO, SCSI_DATA_SM, scsi_pins.SCSI_ACCEL_PINMASK);
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														|  |          // Binary of 0x3FF is is 0 0 1 1 11111111
 |  |          // Binary of 0x3FF is is 0 0 1 1 11111111
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														|  |          //                       ? A R P DBP
 |  |          //                       ? A R P DBP
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														|  |          // A = ACK, R = REQ, DBP are the data pins
 |  |          // A = ACK, R = REQ, DBP are the data pins
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														|  | @@ -775,7 +775,7 @@ static void scsidma_config_gpio()
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														|  |          // 100000010000000000111111111
 |  |          // 100000010000000000111111111
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														|  |          // Probably right to left here, so 0 - 9 are set 'high' and 10/11 are set 'low'
 |  |          // Probably right to left here, so 0 - 9 are set 'high' and 10/11 are set 'low'
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														|  |          pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, 0, 9, true);
 |  |          pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, 0, 9, true);
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														|  | -        pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, is202309a() ? 19 : 17, 1, true);
 |  | 
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														|  | 
 |  | +        pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, scsi_pins.OUT_REQ, 1, true);
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														|  |  
 |  |  
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														|  |          iobank0_hw->io[SCSI_IO_DB0].ctrl  = GPIO_FUNC_PIO0;
 |  |          iobank0_hw->io[SCSI_IO_DB0].ctrl  = GPIO_FUNC_PIO0;
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														|  |          iobank0_hw->io[SCSI_IO_DB1].ctrl  = GPIO_FUNC_PIO0;
 |  |          iobank0_hw->io[SCSI_IO_DB1].ctrl  = GPIO_FUNC_PIO0;
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														|  | @@ -794,16 +794,16 @@ static void scsidma_config_gpio()
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														|  |          {
 |  |          {
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														|  |              // Asynchronous read
 |  |              // Asynchronous read
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														|  |              // Data bus as input, REQ pin as output
 |  |              // Data bus as input, REQ pin as output
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														|  | -            pio_sm_set_pins(SCSI_DMA_PIO, SCSI_DATA_SM, is202309a() ? 0x801FF : 0x201FF);
 |  | 
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														|  | 
 |  | +            pio_sm_set_pins(SCSI_DMA_PIO, SCSI_DATA_SM, scsi_pins.SCSI_ACCEL_PINMASK);
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														|  |              pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, 0, 9, false);
 |  |              pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, 0, 9, false);
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														|  | -            pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, is202309a() ? 19 : 17, 1, true);
 |  | 
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														|  | 
 |  | +            pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, scsi_pins.OUT_REQ, 1, true);
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														|  |          }
 |  |          }
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														|  |          else
 |  |          else
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														|  |          {
 |  |          {
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														|  |              // Synchronous read, REQ pin is written by SYNC_SM
 |  |              // Synchronous read, REQ pin is written by SYNC_SM
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														|  | -            pio_sm_set_pins(SCSI_DMA_PIO, SCSI_SYNC_SM, is202309a() ? 0x801FF : 0x201FF);
 |  | 
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														|  | 
 |  | +            pio_sm_set_pins(SCSI_DMA_PIO, SCSI_SYNC_SM, scsi_pins.SCSI_ACCEL_PINMASK);
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														|  |              pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, 0, 9, false);
 |  |              pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_DATA_SM, 0, 9, false);
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														|  | -            pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_SYNC_SM, is202309a() ? 19 : 17, 1, true);
 |  | 
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														|  | 
 |  | +            pio_sm_set_consecutive_pindirs(SCSI_DMA_PIO, SCSI_SYNC_SM, scsi_pins.OUT_REQ, 1, true);
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														|  |          }
 |  |          }
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														|  |  
 |  |  
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														|  |          iobank0_hw->io[SCSI_IO_DB0].ctrl  = GPIO_FUNC_SIO;
 |  |          iobank0_hw->io[SCSI_IO_DB0].ctrl  = GPIO_FUNC_SIO;
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														|  | @@ -870,7 +870,7 @@ void scsi_accel_rp2040_init()
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														|  |      g_scsi_dma.pio_offset_async_write = pio_add_program(SCSI_DMA_PIO, &scsi_accel_async_write_program);
 |  |      g_scsi_dma.pio_offset_async_write = pio_add_program(SCSI_DMA_PIO, &scsi_accel_async_write_program);
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														|  |      g_scsi_dma.pio_cfg_async_write = scsi_accel_async_write_program_get_default_config(g_scsi_dma.pio_offset_async_write);
 |  |      g_scsi_dma.pio_cfg_async_write = scsi_accel_async_write_program_get_default_config(g_scsi_dma.pio_offset_async_write);
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														|  |      sm_config_set_out_pins(&g_scsi_dma.pio_cfg_async_write, SCSI_IO_DB0, 9);
 |  |      sm_config_set_out_pins(&g_scsi_dma.pio_cfg_async_write, SCSI_IO_DB0, 9);
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														|  | -    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_async_write, is202309a() ? 19 : 17);
 |  | 
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														|  | 
 |  | +    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_async_write, scsi_pins.OUT_REQ);
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														|  |      sm_config_set_fifo_join(&g_scsi_dma.pio_cfg_async_write, PIO_FIFO_JOIN_TX);
 |  |      sm_config_set_fifo_join(&g_scsi_dma.pio_cfg_async_write, PIO_FIFO_JOIN_TX);
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														|  |      sm_config_set_out_shift(&g_scsi_dma.pio_cfg_async_write, true, false, 32);
 |  |      sm_config_set_out_shift(&g_scsi_dma.pio_cfg_async_write, true, false, 32);
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														|  |  
 |  |  
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														|  | @@ -883,7 +883,7 @@ void scsi_accel_rp2040_init()
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														|  |      g_scsi_dma.pio_offset_sync_write = pio_add_program(SCSI_DMA_PIO, &scsi_sync_write_program);
 |  |      g_scsi_dma.pio_offset_sync_write = pio_add_program(SCSI_DMA_PIO, &scsi_sync_write_program);
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														|  |      g_scsi_dma.pio_cfg_sync_write = scsi_sync_write_program_get_default_config(g_scsi_dma.pio_offset_sync_write);
 |  |      g_scsi_dma.pio_cfg_sync_write = scsi_sync_write_program_get_default_config(g_scsi_dma.pio_offset_sync_write);
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														|  |      sm_config_set_out_pins(&g_scsi_dma.pio_cfg_sync_write, SCSI_IO_DB0, 9);
 |  |      sm_config_set_out_pins(&g_scsi_dma.pio_cfg_sync_write, SCSI_IO_DB0, 9);
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														|  | -    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_sync_write, is202309a() ? 19 : 17);
 |  | 
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														|  | 
 |  | +    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_sync_write, scsi_pins.OUT_REQ);
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														|  |      sm_config_set_out_shift(&g_scsi_dma.pio_cfg_sync_write, true, true, 32);
 |  |      sm_config_set_out_shift(&g_scsi_dma.pio_cfg_sync_write, true, true, 32);
 | 
											
												
													
														|  |      sm_config_set_in_shift(&g_scsi_dma.pio_cfg_sync_write, true, true, 1);
 |  |      sm_config_set_in_shift(&g_scsi_dma.pio_cfg_sync_write, true, true, 1);
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														|  |  
 |  |  
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														|  | @@ -891,14 +891,14 @@ void scsi_accel_rp2040_init()
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														|  |      g_scsi_dma.pio_offset_read = pio_add_program(SCSI_DMA_PIO, &scsi_accel_read_program);
 |  |      g_scsi_dma.pio_offset_read = pio_add_program(SCSI_DMA_PIO, &scsi_accel_read_program);
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														|  |      g_scsi_dma.pio_cfg_read = scsi_accel_read_program_get_default_config(g_scsi_dma.pio_offset_read);
 |  |      g_scsi_dma.pio_cfg_read = scsi_accel_read_program_get_default_config(g_scsi_dma.pio_offset_read);
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														|  |      sm_config_set_in_pins(&g_scsi_dma.pio_cfg_read, SCSI_IO_DB0);
 |  |      sm_config_set_in_pins(&g_scsi_dma.pio_cfg_read, SCSI_IO_DB0);
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														|  | -    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_read, is202309a() ? 19 : 17);
 |  | 
 | 
											
												
													
														|  | 
 |  | +    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_read, scsi_pins.OUT_REQ);
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														|  |      sm_config_set_out_shift(&g_scsi_dma.pio_cfg_read, true, false, 32);
 |  |      sm_config_set_out_shift(&g_scsi_dma.pio_cfg_read, true, false, 32);
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														|  |      sm_config_set_in_shift(&g_scsi_dma.pio_cfg_read, true, true, 32);
 |  |      sm_config_set_in_shift(&g_scsi_dma.pio_cfg_read, true, true, 32);
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														|  |  
 |  |  
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														|  |      // Synchronous SCSI read pacer
 |  |      // Synchronous SCSI read pacer
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														|  |      g_scsi_dma.pio_offset_sync_read_pacer = pio_add_program(SCSI_DMA_PIO, &scsi_sync_read_pacer_program);
 |  |      g_scsi_dma.pio_offset_sync_read_pacer = pio_add_program(SCSI_DMA_PIO, &scsi_sync_read_pacer_program);
 | 
											
												
													
														|  |      g_scsi_dma.pio_cfg_sync_read_pacer = scsi_sync_read_pacer_program_get_default_config(g_scsi_dma.pio_offset_sync_read_pacer);
 |  |      g_scsi_dma.pio_cfg_sync_read_pacer = scsi_sync_read_pacer_program_get_default_config(g_scsi_dma.pio_offset_sync_read_pacer);
 | 
											
												
													
														|  | -    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_sync_read_pacer, is202309a() ? 19 : 17);
 |  | 
 | 
											
												
													
														|  | 
 |  | +    sm_config_set_sideset_pins(&g_scsi_dma.pio_cfg_sync_read_pacer, scsi_pins.OUT_REQ);
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														|  |  
 |  |  
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														|  |      // Read parity check
 |  |      // Read parity check
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														|  |      g_scsi_dma.pio_offset_read_parity = pio_add_program(SCSI_DMA_PIO, &scsi_read_parity_program);
 |  |      g_scsi_dma.pio_offset_read_parity = pio_add_program(SCSI_DMA_PIO, &scsi_read_parity_program);
 |